12results about "Angle demodulation by phase difference detection" patented technology

Systems and methods for synchronizing networks are described. A phase monitor circuit can determine at least one phase offset among a plurality of reference clock signals. A timing circuit can generate an output clock signal using a primary reference clock. The primary reference clock can be among the plurality of reference clock signals. The timing circuit can determine failure of the primary reference clock. The timing circuit can, in response to the failure of the primary reference clock, generate the output clock signal using a specific phase offset and a secondary reference clock for the PLL. The specific phase offset can be among the at least one phase offset determined by the phase monitor circuit, the specific phase offset is between the primary reference clock and the secondary reference clock, and the secondary reference clock can be among the plurality of reference clock signals.

The disclosure includes a memory, a horizontal synchronization detection circuit, a phase comparator, a lock circuit, a PLL, and a frequency divider. The memory that reads out a written video signal in response to a read clock signal and outputs it as an output video signal. The horizontal synchronization detection circuit detects a horizontal synchronization signal from the video signal. The phase comparator generates a phase difference signal indicating a phase difference between the horizontal synchronization signal and a frequency-divided clock signal. The lock circuit receives a free-running clock signal and generates a reference clock signal in which a phase signal is shifted by an amount of the phase difference indicated by the phase difference signal. The PLL generates the read clock signal that is locked to the phase of the reference clock signal. The frequency divider generates the frequency-divided clock signal by dividing the read clock signal.

A phase detector is provided according to this disclosure. The phase detector of this disclosure comprises a first transistor leg and a second transistor leg. Each of the first and second transistor legs includes a pair of transistors connected to each other at a plurality of common nodes. The phase detector of this disclosure further comprises an input section connected to the first transistor leg. The input section is configured to receive a first input signal and a second input signal. The phase detector of this disclosure further comprises an output section connected to the second transistor leg. The output section is configured to provide an output signal. The output signal includes a component indicating the phase difference between the first input signal and the second input signal.

Certain aspects of the present disclosure are directed towards apparatus and techniques for receiver calibration. An example apparatus generally includes: a first receiver having a first oscillating signal generation circuit, an output of the first oscillating signal generation circuit being coupled to an input of a first splitter, wherein the first splitter has multiple outputs; a second receiver having a second oscillating signal generation circuit coupled to an LO input of each of a first plurality of mixers of the second receiver; and signal paths between the multiple outputs of the first splitter and signal inputs of the first plurality of mixers, respectively.

A method of operating an interface device including a first elastic buffer is provided. The method of operating the interface device includes performing a link equalization operation, checking a transmission mode of the interface device, and determining a transmission parameter of the interface device based on a status of the first elastic buffer or a status of a second elastic buffer included in another interface device communicating with the interface device when the transmission mode is a transmission parameter adjustment mode.

An apparatus is described comprising a plurality of phase modulator pairs arranged in series, each phase modulator pair comprising a first phase modulator and a second phase modulator. The modulators of the first pair of the plurality receive a modulation signal and a carrier signal. Each modulator pair includes a phase shift circuit for phase shifting the carrier signal based on the modulation signal. The modulators of the last pair of the plurality provide outputs of carrier signals modulated based on the modulation signal.

A circuit includes (i) an input terminal for receiving a single-ended input signal; (ii) an operational amplifier (op-amp) comprising an inverting input, a non-inverting input, and an op-amp output; (iii) a capacitor coupled between the inverting input and the op-amp output; (iv) a first resistor coupled between the inverting input and the input terminal; and (v) a second resistor coupled between the non-inverting input and the input terminal. In an example, a phase locked loop (PLL) includes the circuit, and a voltage controlled oscillator (VCO) is coupled to the output of the operational amplifier.

An apparatus is described comprising a plurality of phase modulator pairs arranged in series, each phase modulator pair comprising a first phase modulator and a second phase modulator. The modulators of the first pair of the plurality receive a modulation signal and a carrier signal. Each modulator pair includes a phase shift circuit for phase shifting the carrier signal based on the modulation signal. The modulators of the last pair of the plurality provide outputs of carrier signals modulated based on the modulation signal.

A multiple-frequency receiver is disclosed and includes a single voltage-controlled oscillator (VCO) configured to generate an output frequency; a first division circuit configured to divide the output frequency by a first value to generate a first local oscillator (LO) frequency for a first frequency chain; and a second division circuit configured to divide the output frequency by a second value to generate a second LO frequency for a second frequency chain, wherein the first value is different than the second value.

The application discloses a lubricating oil metal debris monitoring device and method, which is applied to the technical field of signal detection and comprises a lubricating oil metal debris sensor, an excitation circuit, a routing circuit, an analog-digital conversion circuit, a collection circuit for outputting a received induction signal to the analog-digital conversion circuit after demodulation and amplification, and a processing circuit for applying an excitation signal through the excitation circuit in an adaptation mode, obtaining an induction signal from the lubricating oil metal debris sensor output by a first output end of the routing circuit through the analog-digital conversion circuit, and determining a phase difference between the excitation signal and the induction signal; in a monitoring mode, a reference signal for demodulation is generated based on the phase difference and sent to the collection circuit, and a detection result of the metal debris is obtained by analyzing an output signal of the analog-digital conversion circuit. The scheme of the application can be flexibly adapted to lubricating oil metal debris sensors of different manufacturers.

The invention relates to a method for demodulation comprising the following steps: - exciting a oscillation element (1) which is mounted such that it can oscillate and is designed as a beam, at least in some sections, to oscillate in the range of a resonant frequency of the oscillation element (1), an excitation signal (Aact) which varies over time, particularly periodically, being used for the excitation, and at least the variation of the excitation signal (uact) over time being known or being determined; - detecting a modulated oscillation of the oscillation element (1) by means of at least one sensor (2), the sensor (2) supplying a sensor measured variable (SMG) which varies over time as a function of an amplitude (Ac) and a phase (φc) of the modulated oscillation of the oscillation element (1). According to the invention, the method comprises the following step: - generating a first comparison signal (VS1) by amplitude modulation of a known demodulation signal (DMS) which varies over time, particularly periodically, by means of the sensor measured variable (SMG) which varies over time.

A spectroscopic measurement system, comprising: a laser source (110) configured to generate a pump beam (BP) and a Stokes beam (BS), a modulator (120) configured to modulate one of the beams (BP, BS), a beam overlap system (130) configured to spatially and temporally overlap the beams (BP, BS), a sample holder (140) configured to receive the overlapped beams, at least one detector (150) configured to detect a signal resulting from Stimulated Raman Scattering (SRS), and a lock-in amplifier (160) configured to generate an output signal based on an input signal from the detector (150) and a reference signal (REF), characterized in that the drive signal for the modulator (120) and the reference signal (REF) for the lock-in amplifier (160) are both provided by the internal reference oscillator (INT_TRG) of the lock-in amplifier (160).