701 results about "Oversampling" patented technology

A low-delay signal processing system and method are provided which includes a delta-sigma analog-to-digital converter, an oversampling processor, and a delta-sigma digital-to-analog converter. The delta-sigma analog-to-digital converter receives an input or audio signal and generates a digital sample signal at a high oversampling rate. The oversampling processor is connected to the analog-to-digital converter for processing the digital sample signal at the high oversampling rate with low-delay. The delta-sigma digital-to-analog converter is connected to the oversampling processor for receiving the digital sample signal at the high oversampling rate with low-delay for generating an analog signal. The oversampling processor includes a low-delay filter and a programmable delay element. In this manner, the analog signal is produced with a low delay and high accuracy.

A high-definition multimedia interface (HDMI) receiver recovers high speed encoded data which are transmitted differentially over data channels of a lossy cable, along with a clock. Inter symbol interference, high-frequency loss, skew between the clock and data channels, and differential skew within a differential signal are compensated by analog circuits which are automatically tuned for best performance by observing the quality of the recovered analog signal. Oversampling is used to provide a 24-bit digital representation of the analog signal for determining the quality of the signal. A corresponding method of deskewing a differential signal and a system and circuit therefor are also provided.

Methods and compositions that reduce complexity of libraries of variant biological molecules, that reduce oversampling of these libraries during screening and that improve screening efficiency are provided. Sets of efficient degenerate codon sets are provided that efficiently encode all, or nearly all canonical amino acids. Degenerate oligonucleotides comprising these codons are provided, as are polynucleotide variants. Variant pooling strategies are used during library construction. Logical filtering is applied to select codon sites for mutagenesis, or to select amino acid sets to be incorporated at such sites. Methods for reducing non-optimal oversampling during screening are provided.

PCT No. PCT/EP96/02209 Sec. 371 Date Nov. 17, 1997 Sec. 102(e) Date Nov. 17, 1997 PCT Filed May 23, 1996 PCT Pub. No. WO96/41458 PCT Pub. Date Dec. 19, 1996In the case of the OFDM method, a large number of modulated carriers are transmitted using frequency division multiplexing, a spectrum having a virtually rectangular shape being produced as a result of the large number of carriers. In order to separate the carriers from one another again in the receiver, a Fast-Fourier-Transformation is carried out, it then being possible to separate each carrier cleanly from the others provided the carriers are exactly orthogonal with respect to one another. The carrier orthogonality can, however, be disturbed by various causes. Furthermore, the wanted signal must be separated from the undesired adjacent channel signals by analog or digital filtering in the receiver. In order to improve carrier and channel separation, the selectivity of the FFT filtering can be increased by enlarging the number of FFT components. However, this normally leads to an undesirably sharp increase in the computation complexity. The refinement according to the invention of the time window which is used for the FFT and the oversampling before the FFT make it possible, however, to dispense with calculation of some of the coefficients.

A method and apparatus for 2× oversampling of data having jitter. In some embodiments, the invention is a clock and data recovery device including an alternating edge sampling binary phase detector, and which is configured to stabilize loop characteristics in various jitter environments and can be implemented with small hardware overhead. A transceiver that embodies the invention can be implemented as a CMOS integrated circuit using a 0.18 μm CMOS process, with the transceiver chip being capable of recovering data having a data rate of up to 11.5 Gbps from a signal received over a serial link, while consuming no more than 540 mW from 1.8V supply, and with a bit error rate of less than 10⁻¹².

Disclosed is a LMMSE receiver that restores orthogonality of spreading codes in the downlink channel for a spread spectrum signal received over N receive antennas. The FFT-based chip equalizer tap solver reduces the direct matrix inverse of the prior art to the inverse of some submatrices of size N×N with the dimension of the receive antennas, and most efficiently reduces matrix inverses to no larger than 2×2. Complexity is further reduced over a conventional Fast Fourier Transform approach by Hermitian optimization to the inverse of submatrices and tree pruning. For a receiver with N=4 or N=2 with double oversampling, the resulting 4×4 matrices are partitioned into 2×2 block sub-matrices, inverted, and rebuilt into a 4×4 matrix. Common computations are found and repeated computations are eliminated to improve efficiency. Generic design architecture is derived from the special design blocks to eliminate redundancies in complex operations. Optimally, the architecture is parallel and pipelined.

In one set of embodiments the invention comprises a highly accurate, low-power, compact size DAC utilizing charge redistribution techniques. Two complementary conversions may be performed and added together to form a final DAC output voltage by performing charge redistribution a first time, and again a second time in a complementary fashion, followed by a summing of the two charge distributions, in effect canceling the odd order capacitor mismatch errors. By canceling all odd order mismatch errors the accuracy of the DAC may become a function of the square of the mismatch of the two capacitors, resulting in greatly increased accuracy. When performing the complementary conversions for multiple bits, the sequence in which each of the two capacitors is charged may be determined to minimize the even-order errors, especially second-order errors. The DEM technique may be applied, in conjunction with the complementary conversions, with less oversampling than required by current DEM implementations, resulting in even-order errors being substantially reduced in addition to all odd-order errors being eliminated.

An apparatus for generating a high frequency audio signal that includes an analyzer for analyzing an input signal to determine a transient information adaptively. Additionally a spectral converter is provided for converting the input signal into an input spectral representation. A spectral processor processes the input spectral representation to generate a processed spectral representation including values for higher frequencies than the input spectral representation. A time converter is configured for converting the processed spectral representation to a time representation, wherein the spectral converter or the time converter are controllable to perform a frequency domain oversampling for the first portion of the input signal having the transient information associated and to not perform the frequency domain oversampling for the second portion of the input signal not having the associated transient information.

A baseband processing unit includes a baseband processor configured to receive a plurality of component carriers of a radio access technology wireless service, and a delta-sigma digitization interface configured to digitize at least one carrier signal of the plurality of component carriers into a digitized bit stream, for transport over a transport medium, by (i) oversampling the at least one carrier signal, (ii) quantizing the oversampled carrier signal into the digitized bit stream using two or fewer quantization bits.

A digital clipper is highly oversampled to decrease aliasing and increase accuracy. The difference between the clipper's input and output is then downsampled and added to the delayed, unclipped signal at 1x sample rate to achieve clipping. Filters operating at 1x can be placed in series with the downsampled differentially-clipped signal to achieve overshoot compensation, bandlimiting of the clipped signal, and other goals.

The invention relates to a classification method based on an improved DBSCAN-SMOTE algorithm for an intra-class unbalanced condition in data sample space processing, firstly, in a data sample set, which are belongs to boundary samples is judged, the boundary samples are divided into majority boundary samples and minority boundary samples, and cluster is performed on the boundary samples in a majority boundary sample space; a PSO algorithm is adopted to optimize oversampling rate of the boundary samples and safe samples in cluster, oversampling with different sampling rates is performed on minority boundary samples through an SMOTE algorithm; wherein the cluster is based on the improved DBSCAN algorithm, the algorithm can generate cluster of minority, perform oversampling in the sample cluster, and can fully resolve the problem of uneven distribution and data fragment or small disjunct in intra-class unbalance.

The present invention has many aspects. One aspect of the invention is to perform equalization using a sliding window approach. A second aspect reuses information derived for each window for use by a subsequent window. A third aspect utilizes a discrete Fourier transform based approach for the equalization. A fourth aspect relates to handling oversampling of the received signals and channel responses. A fifth aspect relates to handling multiple reception antennas. A sixth embodiment relates to handling both oversampling and multiple reception antennas.

The invention relates to a device and method for realizing broadband digital magnetic resonance radio frequency receiving. The device comprises a radio frequency receiving signal conditioner, a clock phase jitter suppressor, a high-speed analog to digital converter and a digital down converter, wherein the radio frequency receiving signal conditioner conducts front-end voltage amplification and anti-aliasing filtering for a magnetic resonance signal received by an external device; the clock phase jitter suppressor is used for suppressing phase jitter of a system clock and providing a high-stability clock source in a picosecond or femtosecond order of magnitude for the high-speed analog to digital converter and the digital down converter; the high-speed analog to digital converter is used for realizing digitalized conversion of the radio frequency receiving signal; and the digital down converter is used for conducting orthogonal coherent detection, filtering and frequency down conversion for data output by the high-speed analog to digital converter to obtain broadband data, of a real part and an imaginary part, to be output to the external device. The device can ensure higher channel signal to noise ratio, realizes orthogonal coherent detection and conducts accurate control for nuclear magnetic resonance signal receiving phases. In the process of applying a direct oversampling or undersampling technology, the device can ensure good receiving channel signal to noise ratio and has good instantaneity.

Techniques are provided for use with an implantable cardiac stimulation device equipped for multi-site left ventricular (MSLV) pacing using a multi-pole LV lead. In one example, referred to herein as QuickStim, cardiac pacing configurations are optimized based on an assessment of hemodynamic benefit and device longevity. In another example, referred to herein as QuickSense, cardiac sensing configurations are optimized based on sensing profiles input by a clinician. Various virtual sensing channels are also described that provide for the multiplexing or gating of sensed signals. Anisotropic oversampling is also described.

Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time, continuously variable signal. An exemplary converter preferably includes: (1) multiple oversampling converters, each processing a different frequency band, operated in parallel; (2) multirate (i.e., polyphase) delta-sigma modulators (preferably second-order or higher); (3) multi-bit quantizers; (4) multi-bit-to-variable-level signal converters, such as resistor ladder networks or current source networks; (5) adaptive non-linear, bit-mapping to compensate for mismatches in the multi-bit-to-variable-level signal converters (e.g., by mimicking such mismatches and then shifting the resulting noise to a frequently range where it will be filtered out by a corresponding bandpass (reconstruction) filter); (6) multi-band (e.g., programmable noise-transfer-function response) bandpass delta-sigma modulators; and/or (7) a digital pre-distortion linearizer (DPL) for canceling noise and distortion introduced by an analog signal bandpass (reconstruction) filter bank.

The invention provides a spectrum sensing device and method based on cognitive radio and communication terminal equipment. The spectrum sensing device comprises a sampling unit, a recovery unit and a spectrum detection unit, wherein the sampling unit is configured to sample at a compression sensing-based sampling rate which is lower than a Nyquist rate specific to a signal which comes from a main user and is received by R antennae of at least one secondary user, wherein R is a natural number of more than 1; the recovery unit is configured to recover a sampled signal obtained by using the sampling unit into a sampled signal at the Nyquist rate; and the spectrum detection unit is configured to perform spectrum detection on a signal recovered by using the recovery unit to obtain the distribution situation of idle spectrums in usable spectrums of the main user. According to the spectrum sensing device and method based on cognitive radio and the communication terminal equipment disclosed by the embodiment of the invention, a multi-antenna technology is combined with compression spectrum sensing, so that the detection performance is enhanced. Moreover, the implementation complexity can be lowered.

Cross-well electromagnetic (EM) imaging is performed using high-power pulsed magnetic field sources, time-domain signal acquisition, low-noise magnetic field sensors, spatial oversampling and super-resolution image enhancement and injected contrast fluids. The contrast fluids increase the electromagnetic character of the formation and fluids, either the magnetic permeability or the dielectric permittivity. The acquired signals are processed and inter-well images are generated mapping electromagnetic (EM) signal speed (group velocity) rather than conductivity maps. EM velocity maps with improved resolution for both native and injected fluids are provided.

A method for sampling multichannel analog signal includes using an individual circuit and applying differential signal form inputted by balanced mode to transmit analog signal in each channel, receiving differential signal by multiple channel interfaces in parallel mode simultaneously and carrying out A / D conversion simultaneously, applying over sampling mode in A / D conversion, using high speed serial communication mode to carry out data exchange between A / D converted digital signal to microprocessor, applying serial interface to carry out system initialization and program controlled command transmission.

The invention is suitable for the digital communication field, and provides a high-speed parallel interface circuit. The high-speed parallel interface circuit comprises a low voltage differential signaling (LVDS) receiving module, a data sampling module, a data restoring module and a word synchronization module, wherein the LVDS receiving module receives and shapes data; the data sampling module is connected with the LVDS receiving module and samples the data output by the LVDS receiving module under a plurality of phase clocks; the data restoring module is connected with the data sampling module, selects optimal sampling data from oversampling data output from the data sampling module and restores original data by non return to zero inverse (NRZI) decoding; and the word synchronization module is connected with the data restoring module and carries out shift adjustment to the data output by the data restoring module. In the high-speed parallel interface circuit, oversampling and word synchronization are combined to carry out accurate sampling restoration and synchronization to source-synchronous parallel data; and data in the center of an effective window can be dynamically and accurately sampled and restored in real time by dynamically synchronizing, filtering, discriminating phase, selecting the oversampling data and the like.