274results about "Power amplifiers" patented technology

Provided is a power amplifier system based on in-phase power synthesis, including an input port; an output port; a plurality of power amplification branches, each of the plurality of power amplification branches is connected to the input port, the plurality of power amplification branches include at least one main power amplification branch and at least one auxiliary power amplification branch, each of the plurality of power amplification branches is configured to amplify an input signal of a same phase received from the input port; and an in-phase synthesizer is connected between the plurality of power amplification branches and the output port, the in-phase synthesizer is configured to perform power synthesis on the amplified signal at the same phase output from each of the plurality of power amplification branches to obtain a synthesized output signal, and transmit the synthesized output signal to the output port for output.

An apparatus for wireless communications includes a power amplifier, a low-noise amplifier, a power detector, and a transformer. The transformer includes a first inductor coupled to an output of the power amplifier, and a second inductor coupled to an antenna, wherein the second inductor is magnetically coupled with the first inductor. The transformer also includes a third inductor coupled to an input of the low-noise amplifier, wherein the third inductor is magnetically coupled with the second inductor. The transformer also includes a coupling inductor coupled to an input of the power detector, wherein the coupling inductor is magnetically coupled with at least one of the first inductor and the second inductor.

A transistor device package includes a component assembly comprising an interconnect structure, a transistor die having a front surface including gate, drain, and source terminal on a first surface of the interconnect structure, and one or more passive electrical components electrically coupled to the gate, drain, and / or source terminal by the interconnect structure. A thermally conductive flange is attached to a back surface of the transistor die, which is opposite the front surface, by a conductive adhesive. Respective patterns of the conductive adhesive are provided on the first surface of the interconnect structure, and least one of the respective patterns of the conductive adhesive provides an input, output, or ground signal path for the transistor device package. Related fabrication methods are also discussed.

Disclosed herein is reducing equivalent series resistance (ESR) of a power management circuit during a single transmission. The power management circuit includes a plurality of power amplifier circuits each configured to amplify a signal for transmission. The power management circuit includes a main multi-stage charge pump (MCP), a first voltage modulation circuit, a light-weight MCP, and a second voltage modulation circuit. When only one of the power amplifiers is active to amplify a signal for a single transmission, the power management circuit will opportunistically couple the main MCP, the first voltage modulation circuit, the light-weight MCP, and the second voltage modulation circuit to the active power amplifier. Thus, the active power amplifier will see a reduced ESR collectively presented by the main MCP, the first voltage modulation circuit, the light-weight MCP, and the second voltage modulation circuit, and can therefore operate with improved efficiency during the single transmission.

An RF amplifier includes a transistor die, an impedance matching circuit, and a baseband termination circuit. The impedance matching circuit includes a first inductive element connected between a transistor terminal and a first node, a second inductive element connected between the first node and an RF input / output, and a first capacitance connected between the first node and a ground reference node. The baseband termination circuit includes a multiple-cell resonator and an envelope capacitor coupled in series between the first node and the ground reference node. The multiple-cell resonator includes at least 4 resonator cells. Each resonator cell includes an RF isolation inductor and an RF isolation capacitor coupled in parallel between the first node and the envelope capacitor, which form a parallel resonant circuit in proximity to a center operating frequency of the RF amplifier. The baseband termination circuit also includes one or more envelope resistors.

The application provides a power amplification circuit, a radio frequency circuit, a radio frequency chip and an electronic device. The power amplification circuit comprises a power amplification unit, a signal conversion unit and a resonance unit. The power amplification unit has an input end and an output end, can perform power amplification processing on an input signal input from the input end to form a corresponding amplified signal, and outputs the amplified signal through the output end. The input signal is a differential signal comprising a first frequency band local oscillator signal, and the amplified signal is a differential signal comprising a second frequency band interference signal and the first frequency band local oscillator signal. The signal conversion unit is connected with the output end of the power amplification unit, and the signal conversion unit is used for converting the amplified signal from the differential signal into a single-ended signal. The resonance unit is connected with the signal conversion unit and is connected between the signal conversion unit and the output end of the power amplification circuit.

Systems and techniques are provided for power amplifier gain error compensation for a Digital Power Amplifier (DPA). In some aspects, a compensation method includes obtaining in-phase (I) and quadrature-phase (Q) components of a baseband sample corresponding to in-phase input amplitude codes and quadrature-phase input amplitude codes. The in-phase input amplitude codes can be distorted based on first gain pre-compensation information corresponding to an in-phase signal branch of the DPA, to generate pre-distorted output amplitude codes of the I component. The quadrature-phase input amplitude codes can be distorted based on second gain pre-compensation information corresponding to a quadrature-phase signal branch of the DPA, to generate pre-distorted output amplitude codes of the Q component. The DPA can be driven using the pre-distorted output amplitude codes of the I and Q components to generate a Radio Frequency (RF) output.

A method for use with an acoustic system (referred to as a plant in control theory) (125) including a loudspeaker set (120), the method comprising obtaining an input audio sample (r n ) and a measured current (m n-d ) drawn by the loudspeaker set, and for a current time step, using a state space model of the loudspeaker set to generate a state vector (x n ) and a model-based estimated current (y n ), generating a predicted current (y n ) for a next time step based on the state vector (x e,n+1 ), generating a replacement audio sample (u n ) based on the state vector (x L,n ) for the current time step, generating a feedback signal (f n-d ) that contributes to the generation of the state vector (x n-d ) for a next time step based on the measured current (m n+1 ) and a time-aligned model-based estimated current (y n ), and generating an output audio sample (u n ) for the current time step, wherein when the predicted current (y e,n+1 ) is higher in amplitude than a threshold (I max ), the output audio sample (u n ) is either the input audio sample (r n ) or the replacement audio sample (u L,n ) for the current time step.

A distributed power management apparatus is provided. The distributed power management apparatus includes an envelope tracking (ET) integrated circuit (ETIC) and a distributed ETIC separated from the ETIC. The ETIC is configured to generate a number of ET voltages for a number of power amplifier circuits and the distributed ETIC is configured to generate a distributed ET voltage(s) for a distributed power amplifier circuit(s). In a non-limiting example, the number of power amplifier circuits and the distributed power amplifier circuit(s) can be disposed on opposite sides (e.g., top and bottom) of a wireless device. As such, in embodiments disclosed herein, the ETIC is provided closer to the power amplifier circuits and the distributed ETIC is provided closer to the distributed power amplifier circuit(s). By providing the ETIC and the distributed ETIC closer to the respective power amplifier circuits, it is possible to reduce trace inductance and unwanted signal distortion.

Embodiments of a compensation circuit for a power amplifier (PA) and a method of PA compensation are disclosed. In an embodiment, a compensation circuit for a power amplifier (PA) includes an envelope detector configured to measure an input power of the PA and a bias offset generator configured to apply a voltage offset in response to the input power of the PA to generate bias voltages that are applied to back gates of transistor devices of the PA for distortion compensation and second harmonic (HD2) compensation of the PA.

The application relates to a continuous inverse class-F power amplifier based on source harmonic phase difference control and belongs to the wireless communication field. The power amplifier uses a special source matching network to control a transistor gate waveform, the source matching network is composed of a DC blocking network, a bias network and a harmonic control network; under the condition of a continuous inverse class-F load impedance, the source matching network designed by the application controls the second harmonic phase difference value of the transistor input end by using a series ladder microstrip line to form a T-shaped structure, so that excellent efficiency can be obtained, the load impedance design space can be expanded, and the complexity of a load matching network can be reduced.

The technology of this application relates to a high electron mobility transistor, including a substrate and a GaN channel layer and an AlGaN barrier layer that are sequentially stacked on the substrate. Two through holes that are spaced apart from each other are opened in the AlGaN barrier layer. Each of the through holes penetrates the AlGaN barrier layer along a thickness direction of the AlGaN barrier layer, and a hole wall of each of the through holes has at least one stepped structure. Each of the through holes has an upper opening away from the substrate and a lower opening close to the substrate. The high electron mobility transistor further includes a source and a drain, where the source and the drain each fill up a through hole and are directly in contact with and connected to the GaN channel layer.

The application relates to the field of wireless communication technology and provides a power amplifier, a power amplification module and a multi-mode multi-frequency power amplifier. The power amplifier comprises a first-stage low-frequency power amplifier, a second-stage low-frequency power amplifier, a harmonic suppression circuit, a first output matching circuit, a first filter circuit and a second filter circuit; the first-stage low-frequency power amplifier and the second-stage low-frequency power amplifier are used for amplifying low-frequency signals; the harmonic suppression circuit is used for suppressing the harmonics output by the first-stage low-frequency power amplifier and the second-stage low-frequency power amplifier; and the output end of the first output matching circuit is used for outputting signals. The first output end of the first filter circuit and the output end of the second filter circuit respectively provide filtered power supply voltages for the first-stage low-frequency power amplifier and the second-stage low-frequency power amplifier. The application can optimize the harmonic leakage of the multi-mode multi-frequency power amplifier.

A power amplifier (100) includes an input end (RFIN), an output end (RFOUT), a first amplification circuit (PA1), a second amplification circuit (PA3), a bias circuit (BIAS3), a current detection circuit (110), and a first protection circuit (120). The first amplification circuit (PA1) includes a first signal input end (IN1) coupled to the input end (RFIN) and a first signal output end (OUT1). The bias circuit (BIAS3) outputs a bias current (IBIAS3) to the second amplification circuit (PA3). The current detection circuit (110) generates a digital control signal (VOCP) according to the bias current (IBIAS3). The first protection circuit (120) selectively reduces the radio frequency signal (RF) input to the first signal input end (IN1) according to the digital control signal (VOCP).

This invention provides an amplifier with improved bias tracking performance based on a DSP chip. It includes a file acquisition module that directly acquires the audio file to be played via an interface. The audio file is pre-input into the DSP for standard waveform analysis, which speeds up processing and reduces latency during actual playback. During actual playback, the actual played energy is compared with the pre-calculated energy to determine if it matches the pre-designed output. If it matches, the pre-designed output is used directly; otherwise, it is further input into a model for processing, ensuring operational stability and safety.

A radio-frequency module includes a first switch, a first filter, second filters, a power amplifier, and a low-noise amplifier. The first switch has a first terminal, a second terminal, and a third terminal. The first terminal is coupled to an antenna terminal. The first filter is coupled to the second terminal. The second filters are coupled to the third terminal. The first filter includes a common filter circuit and an additional filter circuit. The additional filter circuit is coupled between the power amplifier and the common filter circuit. The low-noise amplifier is coupled to a path that branches off from a path connecting between the common filter circuit and the additional filter circuit. The common filter circuit is coupled between the additional filter circuit and the first switch.

The present disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate, and a class-F amplifier (500) according to an embodiment of the present disclosure may comprise: an input matching network (IMN) (510) including an input harmonic tuning network (511) and an input fundamental matching network (512); a power amplifier (PA) (520) electrically connected to the input matching network (510); and a class-F output matching network (F-OMN) (530) electrically connected to the power amplifier (520).

The application relates to the technical field of wireless communication, in particular to an AI-based radio frequency amplifier protection control method and device and a storage medium. The method comprises the following steps: identifying a heat dissipation state according to the temperature and humidity in a cabinet and the power amplifier junction temperature, extracting equipment performance degradation features according to the power amplifier nonlinear distortion coefficient and the DPD iteration convergence number, and comprehensively determining a basic risk level; determining a dynamic reflected power tolerance threshold based on a historical reflected power sequence and a service type mixed entropy; determining a dynamic power backoff amount according to the output power fluctuation feature, the carrier aggregation imbalance degree and the basic risk level in an analysis period; fusing the dynamic reflected power tolerance threshold, the dynamic power backoff amount and the reflected power, and performing reflected power anomaly prediction and power suppression control; extracting resource allocation features in the analysis period, and optimizing the power suppression control process. The application significantly improves the working reliability, service life and network service quality in a harsh environment.

An amplifying circuit (10) comprises: electric power amplifiers (11 and 12); a combining circuit (14) that is connected to an output end of the electric power amplifier (11) and an output end of the electric power amplifier (12); and a first series circuit that is composed of a first switch and a capacitor (171) that are connected in series to each other. The first series circuit is connected between the ground and a connection node (n1) on a path that connects the output end of the electric power amplifier (12) and the combining circuit (14).

The application discloses a power amplifier dynamic predistortion optimization processing method and system based on fusion reinforcement learning, relates to the technical field of radio frequency power amplifier signal processing, and comprises the following steps: collecting feedback signals and environmental change signs during power amplifier operation, unifying time scales and frequency band scales, generating a comprehensive reference draft of the feedback signals and the environmental change signs, and establishing a common reference for subsequent comparison. The application distinguishes interference behaviors from power amplifier operation states by constructing a comprehensive reference draft with unified scales and extracting interference rhythms and interference fingerprints, and avoids false updates of reinforcement learning during interference. By setting a freezing point, inserting a silent sampling window and a reverse reward mask, the application ensures that predistortion adjustment bypasses interference, so that parameter updating is more reliable and the linearization state of the power amplifier remains stable.

The application provides a universal low-power signal generator device, belonging to the technical field of signal generation and industrial control, which comprises a mode control module, an industrial control module and a power amplification module; the mode control module is used for switching control modes and outputting control signals; the industrial control module receives the control signals and converts them into basic analog signals; the power amplification module adjusts the basic analog signals into bipolar signals through a level shifting circuit, amplifies the bipolar signals into output analog signals through a power amplification circuit, improves the load driving capability, and detects feedback to the industrial control module through an output voltage detection circuit and an output current detection circuit. The application integrates multiple control modes and closed-loop detection functions, has strong universality, stable and reliable output, high safety and control precision, and is suitable for low-power signal driving scenes.

A digital pre-distortion circuit and technique for a signal being amplified. Digital pre-distortion is performed using a model-based pre-distortion function. Pre-distortion is further corrected using a data-driven pre-distortion function. The model-based pre-distortion function and the data-driven pre-distortion function are trained using training data including a digital loopback signal generated by sampling a loopback signal of an amplifier, the digital pre-distorted signal input to the amplifier for a time period, and an intermediate signal output from the model-based pre-distortion function driven by the digital loopback signal or an output of the data-driven pre-distortion function. Parameters may be continually updated in order to account for changes in characteristics of the amplifier.

A particular aspect of the present disclosure comprises a first amplifier (402-1), a first power supply having an output coupled to the supply input of the first amplifier (402-1) and configured to supply a first power to the supply input of the first amplifier (402-1), a second amplifier (402-n), a second power supply having an output coupled to the supply input of the second amplifier (402-n) and configured to supply a second power to the supply input of the second amplifier (402-n), and a third amplifier (406) having a supply input coupled to the first and second power supplies, wherein the first and second power supplies are further configured to supply a third power to the supply input of the third amplifier, This applies to amplification circuits (400) that include the following.

The present application relates to the technical field of wireless communications. Disclosed are a digital pre-distortion processing method and apparatus, and a terminal device and a computer storage medium. The digital pre-distortion processing method comprises: receiving original input data of a radio-frequency power amplifier; pre-processing the original input data to obtain compressed data; and performing nonlinear processing on the compressed data, so as to obtain output data as actual input data of the radio-frequency power amplifier.

A packaged amplifier device includes a device input terminal, first and second device output terminals, a power amplifier, a power splitter circuit, and first and second impedance matching circuits coupled to a package body. The power amplifier includes a transistor, a transistor input terminal electrically coupled to the device input terminal, and a transistor output terminal. The power splitter circuit includes a splitter input terminal electrically coupled to the transistor output terminal, a first splitter output terminal, and a second splitter output terminal. The first impedance matching circuit is directly connected to the first splitter output terminal and to the first device output terminal, and the second impedance matching circuit is directly connected to the second splitter output terminal and to the second device output terminal. A multiple-stage, multiple-path power amplifier includes the packaged amplifier device and additional amplifier transistors coupled to the first and second device output terminals.

An amplifier includes a transistor, an input circuit coupled between an amplifier input and a transistor input terminal, and an output circuit coupled between a transistor output and a transistor output terminal. The input circuit includes an input-side harmonic termination circuit having a first inductor and a first capacitor connected in series between the transistor input terminal and ground. The output circuit includes a second inductor, an output-side harmonic termination circuit, and a parallel inductor network. The second inductor is coupled between the transistor output terminal and the amplifier output. The output-side harmonic termination circuit includes a third inductor and a second capacitor connected in series between the amplifier output and ground. The parallel inductor network includes a fourth inductor and a third capacitor connected in series between the amplifier output and ground. The input-side and output-side harmonic termination circuits resonate at harmonic frequencies of the amplifier's operating fundamental frequency.

Disclosed in the present invention is a high‑linearity, high‑power GaAs HBT power amplifier having a power detection function, characterized in that: the GaAs HBT power amplifier comprises a radio frequency path, a bias module and a power detection circuit. The radio frequency path is used to perform power amplification on a radio frequency signal, a negative feedback network is used to improve the stability and expand the bandwidth, and second harmonic suppression improves the overall linearity. The bias circuit is used to provide, to a three-stage amplification circuit, a bias voltage that dynamically changes along with an input power, so as to solve the problems of linearity degradation and current instability caused by a self-heating effect in a GaAs HBT transistor under high-power input, thereby mitigating amplitude-amplitude distortion and amplitude-phase distortion of the power amplifier. The power detection circuit is used to output a direct current voltage that is positively correlated with an output power, so as to achieve accurate control of the output power of the power amplifier. By fully integrating negative feedback, dynamic biasing and harmonic suppression techniques, the present invention effectively improves the overall linearity of the amplifier.

The application provides a power amplifier bias voltage timing control circuit and belongs to the technical field of radio frequency power amplifiers.The circuit comprises a power amplifier, a gate voltage power supply module, a drain voltage power supply module, an inverter, a first reference voltage module, a second reference voltage module, a first comparator, a second comparator, a processor, a three-input logic AND gate, an NPN transistor, a PNP transistor, an energy storage capacitor and a radio frequency choke.The output voltage of the gate voltage power supply module is converted into a negative voltage by the inverter and is supplied to the gate of the power amplifier.When the TDD timing sequence voltage output by the first comparator, the second comparator and the processor is at a high level, the three-input logic AND gate outputs a high level, at this time, the drain voltage power supply module supplies power to the drain of the power amplifier through Q2, and when the three-input logic AND gate circuit outputs a low level, the power amplifier is turned off, and C1 and L1 are rapidly discharged through the transistor Q4.Under the premise of meeting the power amplifier bias voltage power-on and power-off timing sequence protection, the application realizes the rapid switching of the GaN power amplifier in the on and off states and the rapid switching of the charging and discharging of the power amplifier energy storage capacitor in the mobile communication TDD timing sequence.

Embodiments include a modular high-frequency emission source. In an embodiment, the modular high-frequency emission source includes a plurality of high-frequency emission modules, where each high-frequency emission module comprises and oscillator module, an amplification module, and an applicator. In an embodiment the oscillator module comprises a voltage control circuit and a voltage controlled oscillator. In an embodiment, the amplification module is coupled to the oscillator module. In an embodiment, the applicator is coupled to the amplification module. In an embodiment, each high-frequency emission module includes a different oscillator module.