1141results about "Analogue conversion" patented technology

Signal processing is applied to a digital input audio signal. An analog audio output signal is provided based on the digital input audio signal via a switching converter circuit driven by a PWM signal. The analog audio output signal is sensed to generate an analog feedback signal. The applied signal processing includes: producing a digital error signal indicative of a difference between the digital input audio signal and a digital word signal; applying digital-to-analog conversion to the digital error signal to produce an analog replica of the digital error signal; producing an analog difference signal indicative of a difference between the analog replica of the digital error signal and the analog feedback signal; applying analog-to-digital conversion to the analog difference signal to produce the digital word signal; applying digital filtering to the digital word signal to produce a filtered digital word signal that generates the PWM signal.

A method of operating a microelectromechanical system (MEMS) includes, in a first operational mode, converting an analog output of the MEMS into a first internal data stream and a first external data stream having a first sampling rate; transitioning from the first operational mode to a second operation mode without restarting the MEMS; and in the second operational mode, converting the analog output of the MEMS into a second internal data stream having a second sampling rate different from the first sampling rate, and performing a sampling rate conversion of the second internal data stream to generate a second external data stream.

In accordance with an embodiment, a continuous-time delta-sigma analog-to-digital converter (ADC) includes: a continuous-time loop filter having an input coupled to an input of the continuous-time delta-sigma ADC; a multi-bit quantizer coupled to an output of the continuous-time loop filter; a 1-bit or 1.5 bit digital delta-sigma modulator having an input coupled to an output of the multi-bit quantizer and an output coupled to an input of the continuous-time loop filter; and a multi-bit digital delta-sigma modulator configured to requantize quantization error of the 1-bit or 1.5-bit digital delta-sigma modulator and having an output coupled to the input of the continuous-time loop filter and to an input of the 1-bit or 1.5-bit digital delta-sigma modulator.

A linear voltage regulator includes a converter circuit that provides a serial bitstream having a pulse density that is indicative of a difference between a regulated voltage of the linear voltage regulator and a reference voltage. The linear voltage regulator also includes a digital to analog converter circuit that includes an input to receive the serial bitstream. The digital to analog converter circuit includes an averager circuit that produces an output signal to control a voltage of a control terminal of a power transistor of the linear voltage regulator for regulating the regulated voltage based on the pulse density of the serial bitstream.

The invention discloses a frequency control type wide-range variable quiescent current source and a CT-sigma delta modulator, the frequency control type wide-range variable quiescent current source comprises a frequency control type bias generation circuit and a current mirror circuit, the frequency control type bias generation circuit comprises at least one capacitor bias diode circuit, and the current mirror circuit comprises at least one capacitor bias diode circuit. The bias circuit is used for generating bias voltage. The current mirror circuit is used for copying current flowing through a diode load in the capacitor bias diode circuit according to the bias voltage, and the current linearly changes along with the clock frequency. The frequency control type wide-range variable quiescent current source is simple in circuit, the scaling range of the generated variable quiescent current is large, control is easy and convenient, linear scaling of the CT-sigma delta modulator system power consumption along with the sampling frequency is achieved, and the high energy efficiency of the system under different sampling frequencies is guaranteed.

The noise-shaping successive-approximation-register analog-to-digital converter includes a capacitive digital-to-analog-converter, a loop filter including a plurality of integration capacitors, and a multi-input comparator. During an integration phase, the capacitive digital-to-analog converter couples to the plurality of integration capacitors to develop an integration voltage. The integration capacitors are then arranged to passively apply a first gain to the integration voltage. The multi-input comparator also provides a second gain to the integration voltage.

The invention discloses a discrete time increment type analog-to-digital converter and a control method thereof, the analog-to-digital converter comprises a modulator and a digital filter, and the modulator comprises an integrator module, a single-bit quantizer, an FIR feedback digital-to-analog converter, a first compensation path and a second compensation path. The control method comprises the following steps: carrying out noise shaping processing on an input signal and an output signal of a single-bit quantizer to obtain a preliminary output signal; and the digital filter is used for filtering the preliminary output signal to obtain an output signal of the analog-to-digital converter. According to the analog-to-digital converter, hardware consumption and digital power consumption can be reduced, the conversion precision of the analog-to-digital converter is improved, and the signal distortion degree of the analog-to-digital converter is reduced. The circuit can be widely applied to the technical field of mixed signal circuits.

According to an embodiment, a digital microphone includes an analog-to-digital converter (ADC) for receiving an analog input signal; a DC blocker component coupled to the ADC; a digital low pass filter coupled to the DC block component; and a nonlinear compensation component coupled to the digital low pass filter for providing a digital output signal.

The invention relates to an integrator circuit for eliminating thermal noise and a Delta-sigma modulator, and belongs to the technical field of electronic signal processing, the modulator comprises at least two stages of integrators, a quantizer, a feedback DAC and an adder; the integrator comprises an integrator circuit, and the integrator circuit comprises a sampling module for sampling an input signal source; the double-path multi-phase clock control pre-amplification auxiliary storage circuit module alternately samples and stores thermal noise voltage and offset voltage; the integral amplifier is used for amplifying a signal output by the double-path multi-phase clock control pre-amplification auxiliary storage circuit module; and the integrating capacitor is connected between the integrating amplifier and the two-way multi-phase clock control pre-amplification auxiliary storage circuit module, and feeds back the signal after integration processing to the two-way multi-phase clock control pre-amplification auxiliary storage circuit module to realize signal modulation and noise shaping. The thermal noise introduced in the sampling process is effectively reduced, and the area of the whole chip is reduced while the signal-to-noise ratio is improved.

A voltage meter includes a sampler, a gain circuit, an accumulator and a feedback circuit. The sampler samples an input signal to generate a series of first signals and a series of second signals. The gain circuit, coupled to the sampler, modifies at least one of the series of first signals and the series of second signals, to generate a series of modified first signals and a series of modified second signals. The accumulator, coupled to the gain circuit, accumulates an operational result of the series of modified first signals and the series of modified second signals, to generate an accumulation result. The feedback circuit, coupled between the accumulator and the sampler, sends a feedback signal back to the sampler according to the accumulation result.

The invention discloses a data converter based on a voltage-controlled oscillator and an implementation method of the data converter. The data converter based on the voltage-controlled oscillator comprises a sampling circuit, a multi-bit successive approximation type data converter and a multi-bit multi-order Delta-Sigma data converter. An incremental scaling type data converter based on a voltage-controlled oscillator is improved, a feed-forward compensation method suitable for the voltage-controlled oscillator is designed, the characteristics of a Delta-Sigma data converter clock are fully utilized, a feed-forward phase is firstly added into a total differential phase of the voltage-controlled oscillator and then subtracted after quantization is finished, and therefore feed-forward compensation of a phase domain is equivalently achieved. A new time sequence is not introduced, so that the implementation cost is low; the voltage-controlled oscillator is completely isolated from sensitive nodes in the circuit, so that kickback noise is avoided; according to the invention, the high-energy-efficiency data converter based on the voltage-controlled oscillator can be constructed more simply, and can be widely applied to the fields of Internet of Things, smart medical treatment and the like.

The invention provides a continuous time Sigma-Delta modulator with constant transconductance bias and negative resistance compensation. The continuous time Sigma-Delta modulator comprises a loop filter, a quantizer and a digital-to-analog converter, the loop filter is used for amplifying a signal in an effective signal bandwidth and attenuating an out-of-band signal at the same time, and the loop filter comprises a first-stage negative resistance compensation integrator and a second-stage negative resistance compensation integrator which are connected in sequence, the first-stage negative resistance compensation integrator comprises a first negative resistance unit containing a negative resistance of a constant transconductance bias circuit and a first integrator unit containing an operational amplifier, and a single operational amplifier resonator structure is formed to generate a second-order response; the integrator of the second-stage negative resistance compensation comprises a second negative resistance unit and a second integrator unit comprising an operational amplifier; and the quantizer is connected with the loop filter, adopts a successive approximation analog-to-digital converter, and is used for converting the analog voltage signal into a digital signal and outputting the digital signal. And the digital-to-analog converter is used for converting the digital signal into an analog signal and feeding back the analog signal to the loop filter.

A digital microphone includes at least one integrator; a state detection and parameter control component directly coupled to an output of the integrator; and a signal processing component coupled to an output of the state detection and parameter control component, wherein a parameter of the signal processing component includes a first value in a first operational mode and a second value in a second operational mode different from the first operational mode.

Aspects of the disclosure provide an integrated circuit. The integrated circuit includes an ADC with a continuous time integrator. The continuous time integrator includes an amplifier having an amplifier input and an amplifier output, a capacitor coupled between the amplifier input and the amplifier output, and a resistor. The resistor provides a first current for an integration in response to an analog input. The ADC also includes a DAC configured to generate a second current at an DAC output based on a digital output of the ADC and includes a switch circuit with a first switch circuit terminal coupled with the DAC output and a second switch circuit terminal coupled with the amplifier input. The switch circuit is configured to couple the DAC output with the amplifier input for a summation of the second current with the first current for the integration based on an integration control signal.

A photoelectric conversion apparatus includes a pixel which includes a photoelectric conversion element; a signal line connected with the pixel; a voltage-current conversion unit configured to convert a voltage signal of the signal line into current; and a conversion unit that includes an oversampling type analog-to-digital conversion circuit that converts the current outputted from the voltage-current conversion unit into digital signals. The voltage-current conversion unit converts the voltage signal of the signal line into the current without sampling and holding and outputs the converted current to the conversion unit.

A photoelectric conversion apparatus includes a light receiving circuit configured to convert light into an electrical signal, a readout circuit configured to read out an analog signal corresponding to the electrical signal, a ΔΣ A / D converter configured to convert the analog signal into a digital signal, and a control circuit configured to change a gain of the photoelectric conversion apparatus in accordance with a change of a driving mode of the photoelectric conversion apparatus. The analog signal read out by the readout circuit is an analog current signal. The readout circuit includes a variable resistor on a signal path for supplying the analog current signal to the ΔΣ A / D converter. The control circuit changes the gain of the photoelectric conversion apparatus by changing a resistance value of the variable resistor.

In accordance with an embodiment, a nested floating inverter dynamic amplifier (FIDA) includes: a first FIDA amplifier comprising a plurality of first inverters switchably coupled to a first reservoir capacitor; and a second FIDA amplifier comprising a plurality of second inverters switchably coupled to a second reservoir capacitor, wherein outputs of the plurality of first inverters are coupled to corresponding inputs of the plurality of second inverters.

An analog-to-digital converter circuit module utilizing dither to reduce multiplicative noise. A dither generation circuit generates a noise-shaped analog dither signal having lower amplitudes at frequencies below a cutoff frequency than at frequencies above the cutoff frequency. The noise-shaped analog dither signal is added to the input analog signal to be converted and the summed signal applied to an analog-to-digital converter The dither generation circuit may be implemented as an analog dither generator followed by an analog high-pass filter. The dither generation circuit may alternatively be implemented digitally, for example with a digital noise-shaping filter applying a high-pass digital filter to a pseudo-random binary sequence. The digital dither generation circuit may alternatively be implemented by one or more 1-bit sigma-delta modulators, each generating a bit of a digital dither sequence that is converted to analog.

A comparator compares a differential voltage between a voltage to be converted as an analog input voltage and a comparative voltage generated by a D / A converting unit with a comparison reference voltage. A switching circuit selectively connects a capacitor, associated with the analog input voltage selected as the voltage to be converted, to an output terminal of an integrator. The integrator integrates the differential voltage in a state where an A / D converting section has performed conversion operation on a least significant bit. A comparison reference voltage generating unit uses, as the comparison reference voltage, a charge voltage for the capacitor associated with the analog input voltage selected as the voltage to be converted.

Methods, controllers and electric machine systems are described that facilitate pulsed control of electric machines (e.g., electric motors and generators) to improve the machine's energy conversion efficiency. Under selected operating conditions, the electric machine is intermittently driven (pulsed). The pulsed operation causes the output of the electric machine to alternate between a first output level and an off state. The output levels are selected such that the electric machine has a higher energy conversion efficiency during the pulsed operation than the electric machine would have when operated at a third output level that would be required to drive the electric machine in a continuous manner to deliver the desired output. In some embodiments, the power converter it turned off during at least portions of the time that the electric machine is pulsed off.

The invention discloses a low-noise and high-precision analog front-end circuit for biological signal acquisition. The low-noise and high-precision analog front-end circuit comprises a chopping capacitance coupling type instrument amplifier circuit, a switched capacitor type programmable gain amplifier circuit and a Sigma-Delta analog-to-digital converter modulator circuit. T-type capacitance feedback, chopping modulation and programmable technologies are introduced on the basis of an existing amplifier, and the low-noise and programmable gain functions of the pre-amplifier are achieved. Through the three-order one-bit quantized feed-forward chopping type Sigma-Delta modulator, the signal to noise ratio and the effective bit number of the signal are improved. Compared with the prior art, the analog front-end circuit not only has the capability of changing the gain multiple according to the bio-electricity signal, but also has the low-noise and high-precision signal processing effect, and the problems that a traditional analog front-end circuit is large in noise and low in signal processing precision are solved. In addition, the biological signal acquisition-oriented circuit provided by the invention can also be used in other analog front ends, such as an audio processor and the like, and is wide in application range.

An apparatus for calibrating a digital filter to replicate a transfer function of a signal processing device comprising a detector with a first input to receive a first signal; a second input to receive a response signal of the signal processing device to the first signal; a signal modification block; a comparison block and a decimation block; wherein the comparison-block compares a phase and amplitude of the first signal after a correction has been applied by the signal modification block and decimation has been applied by the decimation block; and a feedback loop; wherein detector is configured to determine at least a feedback control signal at a first frequency and a second frequency, different to the first frequency and determine calibration information for programming of the transfer function of said digital filter.

The present application discloses an analog-to-digital conversion circuit, a chip, and a recording device. The analog-to-digital conversion circuit comprises a main path module, a dynamic range enhancement module, and a dynamic digital-to-analog conversion module. The main path module is used for converting an analog signal and an analog feedback signal into a digital signal to be processed for outputting to the dynamic range enhancement module, and obtaining a digital signal on the basis of the digital signal to be processed and a digital gain signal and outputting the digital signal. The dynamic range enhancement module is used for performing dynamic quantization processing on the digital signal to be processed to obtain a control signal, and generating the digital gain signal. The dynamic digital-to-analog conversion module is used for, on the basis of the control signal, dynamically controlling the activation and deactivation of each DAC element in a digital-to-analog conversion array, and generating an analog feedback signal. According to the analog-to-digital conversion circuit of the present application, the need for a front-end fixed-gain OPA is eliminated, reducing power consumption and reducing costs; moreover, dynamically controlling the activation and deactivation of each DAC element in the digital-to-analog conversion array further reduces the power consumption.

A nested Δ-Σ analog-to-digital conversion system and method, compromising: an analog filter, an analog comparator, a first feedback digital-to-analog converter (DAC), a second feedback DAC placed in front of the first feedback DAC, and a digital filter and an MSB quantizer placed at the output of the analog comparator; wherein the input of the first feedback DAC is connected to the output of the analog comparator; the analog filter, the analog comparator, and the first feedback DAC form an internal analog Δ-Σ loop; the input of the second feedback DAC is connected to the output of the MSB quantizer; the output of the second feedback DAC is connected to the output of the first feedback DAC and to the input of the analog filter; and the second feedback DAC, the internal analog Δ-Σ loop, the digital filter, and the MSB quantizer form an external hybrid Δ-Σ loop.

A calibration circuit for correcting timing errors introduced by a DAC in a signal path of an ADC, the calibration circuit comprising: an input subtraction module configured to subtract an estimated error from an output of the ADC and provide a corrected output; a filter module configured to approximate an error transfer function corresponding to the DAC timing errors; a correlation module configured to correlate the corrected output with an output from the filter module to extract an error term; an integrator module configured to integrate the error term to provide an updated error coefficient; and a correction module configured to correlate the updated error coefficient with the output from the filter module to provide the estimated error to the input subtraction module.

The invention relates to the technical field of industrial automation field data acquisition, in particular to an ultrahigh-precision load data implementation method and circuit and a measurement and control instrument. The method comprises the steps that an excitation signal is provided for the load sensor through the precise low-drift direct-current power supply, and the excitation signal is applied to the power input end of the sensor after high-frequency noise is eliminated through the pi-type filter network. According to the method, a temperature-load coupled multi-broken-line nonlinear regression curve cluster is constructed, and a temperature variable is introduced into dynamic interpolation calculation of segmented endpoints, so that an error nonlinear cumulative effect caused by endpoint drift under a wide-temperature working condition is effectively inhibited. In the hardware level, the background noise of a sensor signal is suppressed to a microvolt level through the collaborative design of a precise low-drift power supply and multi-stage anti-aliasing filtering, and original data with a high signal-to-noise ratio is provided for a software compensation algorithm.

A digital to analog converter (DAC) maps a digital word to an analog output. The DAC bits may have amplitude and timing errors. These errors (or sometimes referred herein as "non-idealities") result in distortion and degradation of the dynamic range in DACs. To reduce these negative effects, delta-sigma patterns can be provided to two bit cells, a reference bit cell and a bit cell under calibration, to perform, e.g., amplitude calibration and timing skew calibration. Delta-sigma patterns are particularly advantageous over square wave signals, which cannot be scaled to perform amplitude calibration between bit cells having different bit weights and are limited in frequency to integer fractions of the sampling clock.

The invention discloses a high-precision integrated temperature sensor circuit and application, and relates to the technical field of integrated circuits, and the high-precision integrated temperature sensor circuit comprises a band-gap reference circuit, a buffer circuit, an analog-to-digital conversion circuit, a two-phase non-overlapping clock generation circuit and an FIR (Finite Impulse Response) digital filter. It needs to be explained that a key circuit sigma-delta modulator adopts an integrator cascade feed-forward structure CIFF, compared with a CIFB with a feedback structure, an STF function of an ADC of a feed-forward structure is close to 1, a peak value can appear only at a high frequency, only a very small error signal can pass through a whole loop, and therefore the stability of the analog-to-digital converter is greatly improved. Therefore, the gain of the amplifier in the first-stage integrator can be made relatively large, and noise and nonlinearity generated by the rear-stage integrator are effectively suppressed. Moreover, each stage of integrator does not process a feedback signal with high-frequency noise, so that the bandwidth requirement on the next stage of operational amplifier is reduced, the power consumption required by the CIFF structure is lower, and meanwhile, the output swing has better stability due to no feedback structure.

The invention relates to the technical field of amplifiers, and discloses an analog-to-digital converter combination instrument amplifier which comprises a first-stage amplifier, the first-stage amplifier is in signal connection with a second-stage amplifier, the second-stage amplifier is in signal connection with a front-end low-pass filter (LPF), the front-end low-pass filter (LPF) is in signal connection with an analog-to-digital converter (ADC), and the analog-to-digital converter (ADC) is in signal connection with the analog-to-digital converter. And an unbalanced input-to-balanced differential circuit output module is arranged between the second-stage amplifier signal and a front-end low-pass filter (LPF). From the perspective of signal processing and conversion, a precise signal transition bridge is constructed by adding an unbalanced input-to-balanced differential circuit output module, unbalanced signals output by a second-stage amplifier are converted into double-end balanced differential signals, common-mode noise interference is effectively resisted through a differential transmission mode, the signal purity is guaranteed, and the signal quality is improved. The front-end low-pass filter and the analog-to-digital converter are adaptive to differential signals, so that the signal transmission is stable and anti-interference, and the analog-to-digital conversion is more accurate.

The utility model relates to the technical field of digital-to-analog conversion, and discloses a Delta-Sigma ADC data reading device, which comprises a power supply circuit, a photoelectric conversion circuit and a minimum system unit, one end of the power supply circuit is connected with an external direct-current power supply, and the other end of the power supply circuit is connected with the power supply end of the photoelectric conversion circuit and the power supply end of the minimum system unit; one end of the photoelectric conversion circuit is connected with an optical signal input end, and the other end of the photoelectric conversion circuit is connected with a signal end of the minimum system unit. According to the utility model, the minimum system unit with the built-in digital filter is adopted to replace a bit stream data conversion chip in the traditional scheme, so that the cost is reduced, and the area of a printed circuit board is saved; and the data interaction process between the active filter chip and the MCU is omitted, and the information transmission efficiency is improved.