368 results about "Switched capacitor" patented technology

A system and method are used to maintain a variance in feedback factors of an amplifier between the first and second phases either below a threshold value or within a specified range. The system includes the amplifier and first through third capacitances. The amplifier is coupled between an input node and an output node that operates during first and second phases of operation. The first capacitance is coupled across the amplifier and between the input node and the output node during the first and second phases of operation. The second capacitance is coupled to the input node during the first phase of operation. The third capacitance is coupled to one of the input and output nodes during one or both of the first and second phases of operation.

The invention discloses an ultra-wideband circulator based on a periodic modulation topology circuit, and belongs to the technical field of microwave and radio frequency nonreciprocal circuits. The working bandwidth range of the circulator is widened, and non-reciprocal transmission is achieved through non-magnetic materials. A time sequence control unit is respectively connected with a Floquet topology circuit layer, a clock signal driving module, a reset signal driving module and a start signal driving module; the Floquet topology circuit layer is respectively connected with a first coupling port, a second coupling port and a third coupling port; the other ends of the first coupling port, the second coupling port, the third coupling port, the clock signal driving module, the reset signal driving module and the starting signal driving module are respectively grounded; the Floquet topology circuit layer adopts a six-layer parallel network structure, and each layer of network structure comprises a coupling capacitor and three N-type MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) switches. The advantages of the switched capacitor structure are utilized, and the signal processing capacity which is high in integration level, small in size and capable of breaking through delay-bandwidth limitation is achieved.

The invention relates to a clock delay circuit for reducing interleaving distortion of a time interleaving pipeline ADC, and belongs to the field of analog-to-digital converters. Comprising a four-channel time-interleaved sampling switched capacitor array, an allowance amplifier module and four groups of delay control circuits, the four-channel time-interleaved sampling switched capacitor array comprises four sampling switched capacitor arrays which are connected in parallel; the four sampling switch capacitor arrays connected in parallel are all communicated with the allowance amplifier module; each group of delay control circuits is correspondingly connected with one sampling switch capacitor array; the delay control circuit comprises a clock generation circuit and a programmable current source array; the programmable current source array is connected with the clock generation circuit; the output end of the clock generation circuit is connected with the corresponding sampling switch capacitor array; according to the invention, the effect of reducing interleaving distortion in the four-channel time-interleaving pipeline analog-to-digital converter is realized, and the performance of the whole analog-to-digital converter is further improved.

Switched capacitor power converter circuitry configured to receive an input voltage and to output an output voltage, the switched capacitor power converter circuitry comprising: a switch network; a flying capacitor coupled to the switch network; and an output capacitor coupled to an output node of the switch network, wherein the switched capacitor power converter circuitry is operable in: a first mode in which the switch network operates at a fixed duty cycle; and a second mode in which the switch network operates at a variable duty cycle based on a predetermined flying capacitor charging threshold and a predetermined flying capacitor discharging threshold.

The invention relates to the technical field of radio frequency integrated circuits, and discloses a low-noise voltage-controlled oscillator circuit which comprises a source electrode following low-noise bias circuit with digital calibration, a source electrode following low-noise bias circuit with digital calibration, a source electrode following low-noise bias circuit with digital calibration and a source electrode following low-noise bias circuit with digital calibration, the cross-coupled amplifier array is composed of a plurality of units, and the source electrode of the cross-coupled amplifier array suppresses low-frequency noise through a resistance-capacitance feedback network and receives a digital amplitude calibration signal so as to dynamically adjust the number of working units and stabilize the output amplitude; the amplitude self-calibration loop consists of digital logic and a peak detector; the switched capacitor unit array is provided with stable direct-current bias; and a wide linear variable capacitor array driven by the stepped bias voltage. Through deep fusion of digital and analog technologies, the phase noise is remarkably reduced, the linear tuning range is widened, the amplitude stability is ensured, the power consumption is reduced, and the method is particularly suitable for a high-performance radio frequency communication chip of the Internet of Things.

The invention discloses a load transient detection circuit of a COT Buck, a corresponding COT Buck and a switching power supply. The load transient detection circuit comprises an input end, three resistors connected in series, two comparators and a switched capacitor sampling hold circuit, wherein the input end is grounded after passing through the three resistors in sequence. A node between the input end and the first resistor and a node between the second resistor and the third resistor are connected to the input ends of the first comparator and the second comparator through a switched capacitor sampling hold circuit structure. Valley voltage information and peak voltage information of inductive current are obtained through the switched capacitor sampling hold circuit, whether a load is transiently changed or not is judged by comparing inductive current ripples with a valley value and a peak value, and it is guaranteed that the switching power supply has appropriate transient detection trigger threshold voltage under any load. According to an output signal of the load transient detection circuit, the COT Buck can increase the turn-on or turn-off time so as to enhance the transient response speed.

A three-phase wireless electric energy transmission device disclosed by the present invention comprises a three-phase inverter, a three-phase switch capacitor, a coil magnetic field coupling structure and a rectifier, the coil magnetic field coupling structure comprises a primary coil and a secondary coil which are arranged in mirror symmetry, the primary coil is provided with two layers, each layer comprises a three-phase coil, each phase coil occupies a 120-degree angle range of the circumference, and the rectifier is connected with the primary coil and the secondary coil. The two layers of coils form a staggered angle, each phase of switched capacitor of the three-phase switched capacitor comprises a first capacitor branch and a second capacitor branch which are arranged in parallel, the first capacitor branch is provided with a first capacitor, and the second capacitor branch comprises a second capacitor and a switch module which are arranged in series; the switch module adjusts the equivalent capacitance value of the second capacitor branch through the duty ratio and adjusts the transmission power of the three-phase wireless power transmission device. The invention further discloses a load power adjusting method of the three-phase wireless power transmission device, the transmission efficiency can be kept unchanged within the adjusting range, and soft switching can be achieved within the adjusting range.

This application relates to sensing of signals with a common-mode variation. Embodiments describe a switching driver circuit with a modulator configured to control modulation of an output node between different switching voltages and a current sensor configured to sense a voltage drop across a sense resistor connected in series with the output node. The current sensor performs sensing during a first time window that occurs at regular intervals and the modulator avoids any transition in switching voltage at the first output node during the first time window. Embodiments also describe a sensing circuit for sensing a differential voltage with a common-mode variation which has a first sensing portion implemented to provide a floating voltage domain and a second sensing portion implemented to provide a static voltage domain. At least one switched capacitor provides a boundary between the voltage domains and is switched to transfer charge between the voltage domains.

According to an embodiment, a biopotential measurement system includes an analog front-end and digital circuits. The analog front-end circuit includes a sensing electrode, a forward amplifier, and a feedback amplifier with an integration capacitor. A feature is the attenuation circuit between the forward and feedback amplifiers, which provides an attenuation factor determining the integration capacitor's value for achieving the desired high-pass corner frequency. With configurable attenuation factors, the system can process different biopotential signals. Multiple analog front-end circuits can be used to process different signals simultaneously. The digital circuit includes a processor for signal processing, dynamic adjustment of attenuation factors, and anomaly detection. Additional components like switched capacitors, pseudo-resistors, and multiplexers can enhance the system's functionality. The design allows flexible, multi-parameter physiological monitoring with adjustable frequency responses and gain settings.

The present invention discloses a hybrid switching converter with a single inductor and multiple outputs and a control method thereof, configured to convert an input voltage to a first and a second output voltages. The hybrid switching converter includes: a sub-switching converter, which converts the input voltage to an intermediate voltage; a first and a second output switches, which conduct the intermediate voltage during a first and a second inductance periods, respectively, to generate the first and second output voltages. The sub-switching converter comprises: a switched capacitor voltage divider circuit, which controls multiple switches through pulse-width modulation (PWM) signals to generate two divided voltage levels in each inductance cycle for supplying an inductor therein; and a control circuit, which generates PWM signals to control the multiple switches and the output switches in a time-division manner, and regulates the output voltages to target values according to output voltage feedback signals.

The invention discloses a pixel unit circuit for a dynamic vision sensor. The pixel unit circuit comprises a photodiode, an IV conversion circuit, a switched capacitor amplifier, a comparison circuit and a pixel readout logic circuit, the switched capacitor amplifier comprises a first capacitor, a second capacitor, an operational amplifier and a reset switch tube, the first capacitor is connected between the output end of the IV conversion circuit and the inverted input end of the operational amplifier, the in-phase input end of the operational amplifier is connected with a reference power supply, and the output end of the operational amplifier serves as the output end of the switched capacitor amplifier; the operational amplifier is connected with the comparison circuit, the second capacitor is connected between the inverted input end and the output end of the operational amplifier, the drain electrode and the source electrode of the reset switch tube are connected with the inverted input end and the output end of the operational amplifier respectively, and the substrate of the reset switch tube is connected with the output end of the switched capacitor amplifier; the comparison circuit is used for outputting event signals; and the pixel read-out logic circuit is used for reading out the event signal and is connected with the grid electrode of the reset switch tube.

In an embodiment an amplifier includes a first MOS transistor having a drain connected to an output of the amplifier and a source coupled to a first node configured to receive a first power supply potential, a first capacitive element connected between an input of the amplifier and a gate of the first MOS transistor, a first current source connecting the drain of the first MOS transistor to a second node configured to receive a second power supply potential and a resistive element and a second capacitive element connected in parallel between the gate and the drain of the first MOS transistor, the resistive element including a switched capacitor.

An apparatus as discussed herein can be configured to include a first analog-to-digital converter operative to convert a first analog voltage into a first digital signal; a digital-to-analog converter operative to convert the first digital signal into a second analog voltage; a switched capacitor circuit coupled to the digital-to-analog converter, the switched capacitor circuit is operative to store a sample of the second analog voltage; and a second analog-to-digital converter operative to convert an analog error voltage into a second digital signal, the analog error voltage based on a difference between the sample of the second analog voltage received from the switched capacitor circuit and a sample of the first analog voltage.

The invention provides a multi-resonant switched capacitor efficient cooperative operation method suitable for battery active equalization, and the method comprises the steps: building a zero-voltage soft switching realization condition model of a single-module resonant unit, and determining the amplitude constraint and direction constraint of a soft switching current needed by a switching tube for realizing zero-voltage switching; based on topology, identifying current paths of the half bridges located at the top layer, the middle layer and the bottom layer in the soft switching transient process, and determining a mathematical relationship between the soft switching current of each layer of half bridge and the current of each resonant cavity; respectively establishing equivalent circuit models at switching moments for the top-layer half-bridge, the middle-layer half-bridge and the bottom-layer half-bridge, and solving to obtain each initial current value of the corresponding junction capacitor voltage at the switching moments; and substituting each initial current value obtained by solving into the established constraint condition, and drawing an operation parameter boundary of the topology capable of realizing soft switching in all working modes. According to the invention, by determining the operation boundaries of all half-bridge soft switches of the multi-resonant switched capacitor structure, the switching loss is reduced, and the operation efficiency is improved.

The invention relates to a W-band low-noise voltage-controlled oscillator based on a transformer resonant cavity and harmonic extraction. The W-band low-noise voltage-controlled oscillator comprises a dual-core in-phase coupled oscillator core, a two-bit switched capacitor bank, a linear variable capacitor bank and an output buffer, the dual-core in-phase coupled oscillator core comprises a transformer resonant cavity and a harmonic extraction network, a fundamental wave oscillation signal is generated in the transformer resonant cavity and is coupled and output to the output buffer, and a high-power second harmonic oscillation signal is generated in the harmonic extraction network and is output as a target oscillation signal; the two-bit switched capacitor bank adopts an HBT switch with excellent high-frequency performance, the tuning range of the oscillator is divided into four sub-bands, and the tuning gain is reduced; the capacitance value of the linearized variable capacitor bank is linearly changed along with the tuning voltage height, and a conversion mechanism of flicker noise is inhibited; and the output buffer realizes load isolation and buffering of the fundamental wave oscillation signal. The voltage-controlled oscillator has low tuning gain and high output power in the W wave band, and excellent phase noise is achieved.

A tail regulated switched capacitor converter can include a plurality of switched capacitor stages each having a flying capacitor and a plurality of switching devices. The plurality of switching devices can include a first group of one or more switches that selectively couple the flying capacitor to one of an input or output voltage rail via a first current path and a second group of one or more switches that selectively couple the flying capacitor to a tail voltage rail via a second current path. The first and second groups of one or more switches can be switched complementarily to one another with a 50% duty cycle. The tail regulated switched capacitor converter can further include a regulated converter coupled to the tail voltage rail that provides voltage regulation of the output voltage rail while carrying half of a full output current of the tail regulated switched capacitor converter.

The invention discloses an adjustable self-bias closed-loop ring amplifier which comprises a first-stage MOS tube, a second-stage MOS tube, a third-stage MOS tube and a bias resistor unit, each stage of MOS tube comprises two MOS tubes, grid electrodes of the two MOS tubes of the first-stage MOS tube are connected and then connected with an input node, an output of the first-stage MOS tube is connected with grid electrodes of the two MOS tubes of the second-stage MOS tube, and the bias resistor unit is connected with the first-stage MOS tube and the second-stage MOS tube. The bias resistor unit is connected between drain electrodes of two MOS tubes in the second-stage MOS tube, partial voltage of the bias resistor unit is used for generating a first bias voltage and a second bias voltage, the first bias voltage and the second bias voltage are respectively connected with grid electrodes of two MOS tubes of the third-stage MOS tube, and an output end of the third-stage MOS tube is used for outputting voltage to a rear-end circuit. The adjustable self-biased closed-loop ring amplifier can quickly amplify residual voltage, is suitable for high-speed occasions, can also realize higher gain, and can work in a sub-threshold value by biasing the MOS tube, so that the stability of the adjustable self-biased closed-loop ring amplifier is improved. The invention further discloses a switched capacitor circuit comprising the adjustable self-biased closed-loop ring amplifier.

The application discloses a high-side power tube driving circuit and method applied to a 4:1 switched capacitor voltage converter. The internal node voltage of the switched capacitor voltage converter with an input-output voltage conversion ratio of 4:1 is utilized to change in the switching action process, three bootstrap capacitors and two power sources VIN and REGN are used to drive four high-side power tubes in the voltage converter by controlling the switching sequence, and the source following structure is avoided, so that the chip cost area can be saved, the power consumption is reduced, and the chip conversion efficiency is improved on the basis of ensuring high reliability.

The invention relates to a linearity detection system for an input buffer, and the system comprises a main buffer, a terminating resistor unit, an auxiliary buffer, a switched capacitor unit, an observation comparator, and a judgment unit. The input end of the main buffer and the first input end of the terminating resistor unit receive input signals respectively; the second input end of the terminating resistor unit is connected to a first common-mode voltage, the output end of the terminating resistor unit is connected to the input end of the auxiliary buffer, and the output end of the auxiliary buffer and the output end of the main buffer are connected to the input end of the observation comparator through the switched capacitor unit. The output end of the observation comparator is connected to the input end of the judgment unit, and the output end of the judgment unit is connected to the output end of the main buffer; the determination unit is used for determining a determination result for the main buffer and determining a compensation mode. The current linearity state of the main buffer can be rapidly detected in real time and a corresponding compensation mode can be obtained on the premise that a main signal chain is not interfered.

The utility model relates to chip calibration technical field, especially, a kind of beamformer and ultrasonic chip, including the calibration circuit being coupled with sampling circuit, the relationship between the sampling capacitor C s And parasitic capacitance C p Between by the calibration circuit is indeed, to realize the calibration of the relationship between the input signal and output signal of the sampling circuit, avoid the influence of parasitic capacitance and ultrasonic chip output signal bandwidth, realize the decoupling of the limiting relationship of parasitic capacitance and ultrasonic chip output signal bandwidth, so that the switch capacitor circuit of ultrasonic chip can adopt smaller sampling capacitor, more simple layout layout reaches sufficient bandwidth simultaneously;Smaller sampling capacitor greatly reduces chip area, while reducing the load of front-stage circuit, thereby reducing the power consumption of chip.

The utility model relates to a kind of ladder form switch capacitor conversion circuit, conversion circuit includes ladder determination module, switch control module, output capacitor at least one flying capacitor;Current input end is connected with voltage output end in turn through at least two switch tubes, voltage output end is also grounded through output capacitor;One end of flying capacitor is connected between voltage input end and the common point of adjacent two switch tubes of voltage output end, its other end is grounded through a switch tube, and also be connected to the common point of output capacitor and voltage output end through another switch;When the ratio of input voltage and output voltage is non-integer, switch control module controls the charge-discharge process of flying capacitor, so that the voltage of last flying capacitor is equal to output voltage or input voltage.The present application realizes the efficient conversion of fixed integer ratio and / or non-integer ratio of input and output voltage by the switch capacitor control mode of multiple ladder, using the ladder voltage variation of flying capacitor.

To provide an overcurrent detection circuit which can detect overcurrent without efficiency deterioration of a switched capacitor converter.SOLUTION: An overcurrent detection circuit (2) is configured to detect overcurrent of current outputted from a switched capacitor converter (SCC2) having a plurality of capacitors (C1 to C3) and a plurality of switching elements (M1 to M8). The overcurrent detection circuit includes: a first application end (T1) configured so that input voltage of the switched capacitor converter is applied; a second application end (T2) configured so that output voltage of the switched capacitor is applied; and detection parts (R1 to R2, R4 to R7, OP1, IS1, Q1 to Q5, COMP1) configured to detect the overcurrent based on a difference between the output voltage and an integer multiple or reciprocal integer multiple of the input voltage.SELECTED DRAWING: Figure 4

The present application relates to the field of integrated circuits and photoelectric detection technology, in particular to a low-noise hybrid domain CMOS detector readout circuit.The circuit includes a capacitance feedback transimpedance amplification unit, a switched capacitor reference unit, an analog domain readout unit, a time domain quantization unit and an output selection unit.The transimpedance amplification unit converts the pixel current into voltage.The switched capacitor reference unit filters out the reference voltage noise in the reset stage and maintains the reference potential in the integration stage.The analog domain readout unit outputs analog voltage, and the time domain quantization unit outputs digital time code through saturation time detection.The output selection unit defaults to output analog signal, and switches to digital output when the transimpedance amplifier output voltage reaches the preset threshold.The present application also provides a corresponding readout method.The present application can effectively filter out the reference voltage source noise and power supply ripple, significantly improve the signal-to-noise ratio of micro-light detection, realize high dynamic range in a single frame, significantly expand the linear response range of the detector, and can be integrated on chip.

The application belongs to the technical field of switching power supply, and an auxiliary circuit is added between two branches of a traditional two-phase Dickson converter; in a dead time when all main power tubes are closed, the auxiliary circuit can transfer the charge of one branch to another branch, realizes zero-voltage turn-on of all main power tubes, and reduces switching loss.

This disclosure relates to a multiphase hybrid converter. A multiphase hybrid DC-DC converter using switching capacitor technology is described. The multiphase hybrid converter can reduce the volt-seconds across the converter's inductors, thereby reducing the inductor size. Furthermore, the multiphase hybrid converter can utilize the inductor as a current source to charge and discharge the flying capacitor, which can reduce the size of the intermediate capacitor and increase the solution density. Since the charging and discharging operations are performed by the inductor, the multiphase hybrid converter can eliminate capacitor-to-capacitor charge transfer. Therefore, the multiphase hybrid converter does not require high capacitance to achieve efficient operation, which further increases the solution density.

The invention relates to a hybrid oversampling analog-to-digital converter. A circuit (100) includes a switched capacitor amplifier circuit (102), a multi-bit quantizer circuit (104), an accumulator circuit (106), a loop result register (110), and a result combining circuit (112). The switched capacitor amplifier circuit (102) has an output. The multi-bit quantizer circuit (104) has an input and an output, the input coupled to the output of the switched capacitor amplifier circuit (102). The accumulator circuit (106) has an input and an output, the input coupled to the output of the multi-bit quantizer circuit (104). The loop result register (110) has an input and an output, the input coupled to the output of the multi-bit quantizer (104). The result combining circuit (112) has a first input coupled to the output of the accumulator circuit (106) and a second input coupled to the output of the loop result register (110).

The application discloses an inverter which is composed of a switched capacitor circuit and a bridge switching circuit; the switched capacitor circuit and the bridge switching circuit are connected with each other; the bridge switching circuit is composed of a left half bridge switching circuit and a right half bridge switching circuit; the left half bridge switching circuit and the right half bridge switching circuit are connected with the switched capacitor circuit respectively. The inverter contains a single direct current input source, six switching tubes, one capacitor and one inductor; the process of charging and discharging of the capacitor in a capacitor period realizes self-balancing of the capacitor voltage, each capacitor keeps the same working state, and stable output of the inverter is realized.

The application relates to a configurable time domain pipeline analog-to-digital converter, comprising: a first configurable analog-to-digital converter and a plurality of cascaded second configurable analog-to-digital converters, wherein the first configurable analog-to-digital converter serves as a first stage of the configurable time domain pipeline analog-to-digital converter, is used for converting an input voltage signal into a time signal, and transmitting the quantized time signal to the plurality of cascaded second configurable analog-to-digital converters; the second configurable analog-to-digital converter is used for amplifying and quantizing the input residual time signal stage by stage to generate corresponding digital codes and residual time signals; wherein the first configurable analog-to-digital converter and the second configurable analog-to-digital converter realize the time gain configurable function through a set of discharge and charge switch capacitor arrays. The application adopts the structure of the configurable TA and SA TDC, avoids the use of a voltage amplifier, has high linearity, meets the precision configuration requirements of the ADC, and does not need a time residual generator.

A voltage measurement circuit (23) is provided with: a first switched capacitor filter (9) connected to a first cell (C2) constituting a battery pack (50); a second switched capacitor filter (10) connected to a second cell (C3) constituting the battery pack (50); and a first amplifier (19) shared by the first switched capacitor filter (9) and the second switched capacitor filter (10), the first switched capacitor filter (9) comprising a first switch group (3), a first capacitor (5) and a third switch group (4), and the second switched capacitor filter (10) comprising a second switch group (6), a second capacitor (8) and a fourth switch group (7), the first switching group (3) and the second switching group (6) are electrically insulated from the third switching group (4) and the fourth switching group (7) by the first capacitor (5) and the second capacitor (8), respectively.

This invention relates to an active dual-switched capacitor coupled DC / DC converter with a reverse magnetic winding, belonging to the field of optics. It solves the problem that existing DC converters cannot simultaneously achieve low turns ratios and high voltage gain. The invention combines inductors, capacitors, diodes, and coupled inductors (N1, N2) in a specific series-cross connection to form an integrated high-gain unit. Through a reverse-coupled inductor voltage multiplier circuit (composed of multi-winding coupled inductors N1 and N2 connected in reverse, diode D1, and capacitor C1) and an active dual-switched capacitor structure (composed of power switches S1 and S2, capacitor C2, and diodes D2 and D3), the proposed converter can generate high voltage gain at low turns ratios. This invention is primarily applied in high boost ratio DC power conversion applications.