26 results about "RC oscillator" patented technology

The invention provides a design method and system of a high-speed RC clock system. The system comprises a high-speed RC oscillator, a reference clock module, a clock calibration module, a trigger module and a state machine module. The method comprises the following steps of: controlling a calibration process through a state machine module, counting a high-frequency clock signal by taking a theoretical count value as a reference after a clock calibration module is triggered, judging whether the frequency has deviation or not and the direction of the deviation according to a counting result, performing stepping adjustment on a calibration value, and performing frequency adjustment on a high-speed RC oscillator. And circularly executing the calibration step until the counting result falls into an allowable error range. A phase-locked loop circuit does not need to be additionally arranged, high and low temperature calibration in the production stage does not need to be introduced, the chip design complexity, the manufacturing cost and the production test cost can be effectively reduced, meanwhile, high precision and stability of clock signals are ensured, and output of a low-cost, high-frequency and high-precision RC clock is achieved.

The present application belongs to the field of analog integrated circuit, and particularly relates to an RC oscillator without starting circuit. The present application uses Schmitt trigger as the comparator in the RC oscillator, and uses the hysteresis effect and positive feedback characteristics of the Schmitt trigger to reduce the influence of kickback noise. Meanwhile, a reset port is added to the Schmitt trigger, so that the working state of the input end of the RS flip-flop is simultaneously low when the circuit starts; and the two output signals of the RS flip-flop are respectively applied to the reset ends of the two Schmitt triggers through the delay control module, so that the reset signal of the Schmitt trigger cannot control the output result in advance before the input signal changes, and the timing error is avoided. The present application effectively solves the problems of the existing RC oscillator, such as the need of starting circuit and high noise.

The application discloses a low-temperature-drift calibratable RC relaxation oscillator circuit, which comprises an oscillator core module, a voltage reference module, a voltage-to-current conversion module and a current DAC module, wherein the voltage reference module generates a reference voltage VREF; the voltage-to-current conversion module converts the obtained reference voltage into a reference current IREF; the current DAC module provides the adjusted currents I1, I2 and I3 to the oscillator core module, and the non-linear influence of process corners on the output frequency of the RC oscillator is reduced by adjusting the currents; the oscillator core module finally generates a clock signal CLK, and the problems that the comparator delay and the comparator offset are greatly changed with temperature are reduced by using the current self-compensation technology and the chopping technology, and thus the performance of the oscillator output frequency is improved. Compared with the traditional RC relaxation oscillator, the application reduces the temperature drift of the output frequency and improves the accuracy of the frequency by structural optimization and technical innovation.

This application discloses a low-power temperature-compensated RC oscillator, comprising a low-voltage linear buffer, an RC core circuit, a comparator, a Schmitt trigger, a non-overlapping clock generator, and a level shifter. The low-voltage linear buffer uses intrinsic transistors to reduce operating voltage and power consumption; the RC core circuit employs temperature compensation technology, including a series low-temperature drift resistor and a temperature-dependent current source, causing the equivalent resistance to increase with temperature; the comparator compares a triangular wave signal with a reference voltage and outputs a reference clock; the Schmitt trigger filters out clock glitches; the non-overlapping clock generator generates a two-phase clock with dead time to control charging and discharging; and the level shifter converts the low-voltage domain clock to the high-voltage domain. This oscillator eliminates the influence of comparator offset voltage through two-phase switching control and employs low-voltage and temperature compensation technology to achieve a high-precision, low-temperature drift reference frequency in a small area with low power consumption, making it suitable for compact sensing and measurement systems.

The present disclosure relates to a starting method and starting circuit of a crystal oscillator, and belongs to the technical field of electronic circuits, which can realize fast starting of the crystal oscillator. The starting method of the crystal oscillator comprises: receiving a crystal oscillator starting signal, wherein the crystal oscillator starting signal is used to indicate that the crystal oscillator needs to be started; in response to the crystal oscillator starting signal, starting an RC oscillator, and selecting, by an injection selector, a signal generated by the RC oscillator as a first injection signal to be injected into the crystal oscillator; starting a phase-locked loop to make the phase-locked loop work under the driving of a square wave signal output by the crystal oscillator, wherein the square wave signal is generated by the crystal oscillator based on the first injection signal; after the phase-locked loop is locked, selecting, by the injection selector, a signal generated by the phase-locked loop as a second injection signal to be injected into the crystal oscillator.

Embodiments of the present disclosure disclose an RC oscillator, an electronic device and a chip. The RC oscillator comprises: a current generation circuit comprising a transistor and a resistor, configured to output a bias current according to a power supply voltage, an inter-electrode voltage of the transistor and a resistance value of the resistor; a charging and discharging control circuit comprising a capacitor and connected to the current generation circuit, configured to charge the capacitor by the power supply voltage or discharge the capacitor by the bias current; and a logic control circuit connected to the current generation circuit and the charging and discharging control circuit, configured to compare a capacitor voltage of the capacitor with a voltage threshold determined based on the inter-electrode voltage, and control the charging and discharging control circuit to switch to a first stage or a second stage. The present disclosure does not need to design a complex voltage reference and current reference circuit, greatly simplifies the overall circuit structure, and saves chip area and power consumption.

An RC oscillator circuit is provided. An output terminal of the first current source unit is connected to the oscillation resistor and non-inverting inputs of the comparators, and the other end of the oscillation resistor is grounded. The second current source unit has two output terminals. Sources of the two oscillation MOS transistors are grounded, drains of the oscillation MOS transistors are connected to a corresponding oscillation capacitor, and gates of the oscillation MOS transistors are connected to an output of the RS latch. The first current source unit includes four MOS transistors and a first resistor. The frequency of the output clock signal is unaffected by substrate bias effects of MOS transistors and resistor variations, thereby ensuring a highly stable output frequency with minimal deviation, and greatly improving the reliability and stability of the RC oscillator circuit.

The invention provides a terminal, a clock synchronization circuit, system and method and a storage medium. The clock synchronization circuit comprises a crystal oscillator which is started to provide a first clock signal in a terminal working state; the RC oscillator is started to provide a second clock signal different from the first clock signal when the terminal is in a dormant state; the timer is connected with the RC oscillator and starts timing based on a second clock signal when the terminal is in a dormant state; when the timing time reaches the preset time, the terminal is in a working state, and the crystal oscillator starts the RC oscillator to keep starting; the calibrator is connected with the crystal oscillator and the RC oscillator, starts to detect the first clock signal and the second clock signal in a working dormant state and judges whether a preset condition is met or not, and if not, the second clock signal is calibrated based on the first clock signal; and the controller is connected with the crystal oscillator RC oscillator timer and the calibrator, controls the starting or closing of the crystal oscillator RC oscillator timer and the calibrator, and controls the terminal to switch between a working state and a dormant state, so that the balance of low cost, low power consumption and clock accuracy is realized.

The invention discloses a low-power-consumption low-temperature-drift high-frequency oscillator circuit capable of internally dividing frequency, and relates to the technical field of oscillators. The oscillator circuit comprises a digital power supply voltage generating circuit, a reference voltage generating circuit and an RC oscillator, the digital power supply voltage generating circuit is used for generating digital power supply voltage VDDD and inputting the digital power supply voltage VDDD to the RC oscillator, and the reference voltage generating circuit is used for outputting reference voltage VREF and bias current IB, the reference voltage VREF and the bias current IB are input to the RC oscillator, and the RC oscillator is used for outputting frequency under the action of the digital power supply voltage generating circuit and the reference voltage generating circuit. The oscillator circuit can accurately carry out frequency division, and the output frequency is stable.

The invention provides a low-power RC oscillator circuit and a working method thereof. The low-power RC oscillator circuit comprises a chopper circuit, a path delay offset loop, a power supply structure and an RC circuit, the chopper circuit is connected with the path delay offset loop and the RC circuit and is used for eliminating the offset influence of the comparator; the path delay counteracting loop is also connected with the RC circuit and is used for extracting delay to counteract path delay; the power supply structure is used for supplying power to the chopper circuit, the path delay offset loop and the RC circuit; the RC circuit is used for generating an oscillation signal; therefore, the frequency precision of the circuit is improved, the performance of low voltage and low power consumption is realized, and a more stable clock signal is realized under the condition that the temperature and the power supply change.

The application relates to low temperature drift low adjustment RC oscillator, relates to integrated circuit technology, and the application comprises reference source circuit, the reference source circuit comprises reference current signal output end and reference voltage output end, characterized by further comprising shared comparison circuit, first capacitive oscillator with discharge switch, second capacitive oscillator with discharge switch, first comparator, second comparator and RS trigger, the application offsets temperature changes of the reference current and the reference voltage, so that the output clock frequency of the oscillator circuit is basically not changed with temperature, the oscillator circuit structure is symmetrical, and the error caused by the comparator hysteresis to the clock frequency is eliminated.

The application discloses a frequency calibration method for an LED driving chip, an LED driving chip and an LED lamp, and is applied to the LED driving chip connected with an external host through an I2C bus. The method comprises the following steps: monitoring a serial clock line in real time during normal I2C communication, and generating a calibration window after detecting a self-calibration enabling signal; counting the output pulse of a built-in RC oscillator in the calibration window, and obtaining a single counting value; performing average operation on the single counting values of multiple different calibration windows, and generating a sampling average value; comparing the sampling average value with a pre-stored standard counting value to obtain a frequency error value; and adjusting the tuning control parameter of the RC oscillator to correct the output frequency according to the frequency error value. The application uses the SCL clock signal in the I2C communication as a calibration reference, does not need to add a hardware pin, does not need the host to participate in operation, does not interrupt normal display business, and independently completes dynamic and real-time calibration of the frequency of the RC oscillator in the normal working process of the chip.

This application provides a timing calibration method, a chip timing system, and a chip. The timing calibration method includes: synchronously starting a first counter and a second counter for counting; wherein the first counter uses a first clock signal provided by an external crystal oscillator as a first counting clock source, and the second counter uses a second clock signal provided by an RC oscillator inside the timing chip as a second counting clock source; when the first count value of the first counter equals the counting period corresponding to a preset calibration time, the counting of the first counter and the second counter is stopped synchronously, and the second count value of the second counter is used to calibrate the timing of the RC oscillator inside the timing chip. This application achieves the calibration of the timing of the RC oscillator inside the timing chip, ensuring the accuracy of timing using the RC oscillator, and at the same time, by waking up the external crystal oscillator only when timing calibration is needed, it reduces the power consumption required to use the external crystal oscillator, achieving low-power calibration timing.

The application provides a terminal, a clock synchronization circuit, a system, a method and a storage medium. The clock synchronization circuit comprises: a crystal oscillator which is started to provide a first clock signal in a working state of the terminal; an RC oscillator which is started to provide a second clock signal different from the first clock signal in a sleep state of the terminal; a timer which is connected to the RC oscillator and is started to time based on the second clock signal in the sleep state of the terminal; the timing time reaches a preset time, the terminal is in the working state, the crystal oscillator is started, and the RC oscillator is kept started; a calibrator which is connected to the crystal oscillator and the RC oscillator, detects the first clock signal and the second clock signal in the working and sleep states, and judges whether a preset condition is met, and if not, calibrates the second clock signal based on the first clock signal; and a controller which is connected to and controls the crystal oscillator, the RC oscillator, the timer and the calibrator to start or stop and controls the terminal to switch between the working state and the sleep state, so that a trade-off among low cost, low power consumption and clock accuracy is realized.

The application relates to the field of oscillators, and discloses an RC oscillator and an electronic device, the RC oscillator comprising a bias circuit, a comparison circuit and an oscillation circuit; the bias circuit is used for copying a reference current accessed by the bias circuit into two paths of bias current output through two-stage current mirror units; the oscillation circuit is used for charging and discharging corresponding capacitors in the oscillation circuit according to the two paths of bias current, so as to perform high-low level inversion; and the comparison circuit is used for generating a periodic clock oscillation signal according to the first path of bias current and the result of high-low level inversion. According to the embodiment of the application, the two-stage current mirror units can effectively shield the coupling interference of the oscillation frequency on the current, and the frequency precision of the clock oscillation signal output by the RC oscillator is improved; and the size of the required resistance and capacitance in the RC oscillator is correspondingly reduced by adjusting the ratio of the two paths of bias current copied and output by the two-stage current mirror units, so that the chip area is effectively reduced.

The invention discloses a cmos low-power-consumption temperature sensor and a sensing circuit thereof, relates to the field of sensors, and is applicable to temperature sensor demand scenes with ultra-low power consumption and ultra-small area. The sensor circuit generates complementary CTAT current and PTAT current through the temperature sensing current generation circuit, one of the CTAT current and the PTAT current is mirrored to the two amplifier circuits and connected to the two input ends of the RC oscillator circuit, and the other one controls the enabling state of the RC oscillator circuit. The output end of the RC oscillator controls bypass states of the two amplifier circuits through the two loop switch circuits. A clock signal output by the RC oscillator circuit is subjected to ADC sampling through a clock sampling circuit composed of two stages of counters, and a temperature value is mapped through a counting result. According to the invention, the positive and negative temperature coefficient current synergic temperature measurement is carried out, the detection precision is high, the core circuit works at the nA level, the occupied wafer area is less than 0.02 mm < 2 >, and the requirements of ultra-low power consumption, ultra-small area and high-precision temperature measurement are met.

The invention relates to a digital clock generation circuit capable of realizing fast frequency calibration, comprising a digital RC oscillator which is provided with a control bus input end and a clock signal output end and is used for generating a digital clock signal CKOSC according to an input control value RFT; the frequency divider is provided with a control bus, a clock signal input end and a clock signal output end, and is used for carrying out frequency division on the CKOSC according to an input control value NFT to generate a final digital clock output signal CKO; the counting sampling module is provided with a first clock signal input end, a second clock signal input end, a data bus and a trigger signal output end, and is used for counting edges of the CKO and outputting a counting value SMP and a trigger digital signal CKSMP under the driving of the reference clock signal CKP; and the frequency calibration module is provided with a clock signal, a trigger signal, a data bus input end and at least two control bus output ends, and is used for calculating adjustment amounts of the RFT and the NFT according to the SMP and a preset target count value CN, and adjusting the RFT and the NFT according to the triggering of the CKSMP so as to calibrate the frequency of the final output CKO.

The invention discloses a PT symmetric circuit based on a feedback RC oscillator and a use method thereof, the PT symmetric circuit comprises a gain side circuit and a loss side circuit, the gain side circuit and the loss side circuit are connected through a coupling circuit, the gain side circuit is a single feedback RC oscillator, the loss side circuit comprises the feedback RC oscillator and a series resistor Rx, and the series resistor Rx is connected with the gain side circuit. The feedback type RC oscillators on the gain side and the loss side are the same in structure, capacitance values and resistance values contained in the two feedback type RC oscillators are equal, the series resistor Rx enables equivalent resistance of a gain side circuit and equivalent resistance of a loss side circuit to be equal in size and opposite in sign, and gain loss balance is achieved. The sensitivity of the resonant frequency of the circuit along with the change of element parameters is greatly improved, stable time-domain oscillation can be generated, and the change of the resonant frequency of a system can be conveniently and directly monitored from the time-domain oscillation.

The invention relates to the technical field of CAN bus wake-up, and discloses a CAN bus wake-up device and a CAN bus communication chip, the CAN bus wake-up device comprises a CAN simulation unit, a first logic processing unit, an enabling unit, an RC oscillator, a delay unit, a first decoding unit, a second decoding unit and a second logic processing unit; during use, the first logic processing unit is used for processing a digital signal output by the CAN simulation unit, and the enabling unit is used for controlling whether the RC oscillator outputs a clock or not, so that when a CAN bus is in an idle state, the RC oscillator does not output the clock, and the power consumption is reduced; when the CAN bus is changed from an idle state to a use state, the first logic processing unit controls the RC oscillator to output a clock to enable the device to carry out information transmission, at the moment, loss of digital signals can be avoided through delay of the delay unit, and the second logic processing unit processes real-time decoding information and delay decoding information to output complete CAN bus information. And the information integrity of the CAN bus is ensured.

The invention discloses a cmos low-power-consumption pressure sensor and a sensing circuit thereof, relates to the field of sensors, and is used for realizing ultra-low-power-consumption and ultra-small-area pressure detection. The sensor circuit provides working current through the reference current circuit, a first branch mirror working current, the two amplifier circuits are connected to two stages of substrates of the pressure sensing capacitor respectively to act on the mirror working current, and the RC oscillator circuit is connected with the two amplifier circuits to act on the mirror working current. And the bypass state of the two amplifier circuits is controlled through the two loop switch circuits, so that the oscillation frequency is controlled, and finally a clock signal indicating the oscillation frequency is output. A clock signal is subjected to ADC sampling by a clock sampling circuit formed by two stages of counters, and a pressure value is mapped through a counting result. The product provided by the invention can work at an nA level, the circuit area can be designed below 0.02 mm < 2 >, and the scene requirements of ultra-low power consumption and ultra-small area are met.

The utility model discloses a low-power-consumption RC oscillator. The low-power-consumption RC oscillator comprises a starting circuit, a current source circuit and a core oscillation circuit. The starting circuit is responsible for enabling the whole circuit to successfully reach a designed working point, and is turned off after being started; the current source circuit is responsible for generating a PTAT current; the core oscillation circuit is responsible for generating square wave oscillation. According to the utility model, an AVDD / AVSS dual-power supply architecture and a multipath current mirror structure are adopted, the stability of oscillation frequency is ensured, and meanwhile, the technical bottlenecks of starting time delay, temperature drift, power consumption efficiency compromise and the like of a traditional RC oscillator are effectively solved through the collaborative optimization design of the core oscillation circuit and the buffer output stage; and a novel solution is provided for the power management module of a miniaturized electronic system.

The application discloses a photovoltaic panel fault detection circuit, and relates to the technical field of photovoltaic panel fault detection.The photovoltaic panel fault detection circuit comprises a diode, a photoelectric isolation module and a double NOT gate RC oscillator, the diode is connected in parallel across the photovoltaic panel, the first input end of the photoelectric isolation module is connected with the negative electrode of the diode, the second input end of the photoelectric isolation module is connected with the positive electrode of the diode, and the output end of the photoelectric isolation module is connected with the input end of the double NOT gate RC oscillator.Because the frequency signal can be transmitted at a long distance, maintenance personnel can detect the fault photovoltaic panel by measuring the frequency signal output by the double NOT gate RC oscillator.The circuit of the application can ensure that other photovoltaic panels connected in series with the fault photovoltaic panel are normally used during detection of the photovoltaic panel and during manual maintenance or replacement of the fault photovoltaic panel, and the manual detection speed and work efficiency are improved.

This invention relates to the field of oscillation circuit technology, and discloses a low-power RC oscillation circuit, an RC oscillator, and an analog signal chip. The circuit constructs a highly efficient and collaborative oscillation system by dividing the circuit into a power supply module, a switch control module, a reference resistor module, a capacitor charging / discharging module, and a comparison switching module, and clearly defining the electrical connections and signal transmission relationships between each module. This architecture fundamentally solves the circuit complexity problem of traditional RC oscillators. Oscillation is achieved through a single comparison correlation module in conjunction with switch control, significantly reducing the number of active devices and the continuous operating time. Simultaneously, the precise coordination of each module allows for the sharing of the reference resistor, greatly improving frequency stability. Furthermore, the optimized connections between modules reduce the layout space occupied by redundant circuits, and the precise control of the charging / discharging process by the switch control module reduces static current consumption, thus meeting the overall design requirements of low power consumption, high integration, and high precision.

The present application provides a comparator dynamic current generation circuit and a comparator and an RC oscillator comprising the comparator dynamic current generation circuit, comprising: a current source circuit configured to provide a current to the comparator dynamic current generation circuit; a differential input circuit configured to receive a comparator first input and a comparator second input and generate an output; a dynamic current output circuit configured to receive the output of the differential input circuit as an input and generate a bias current for biasing of the comparator.

This invention belongs to the field of RC oscillator technology, specifically providing a laser-tuned RC oscillator circuit, including: a bias voltage generation circuit for generating a standard voltage VREF, an RC charging and discharging circuit, a comparator circuit, and a clock jitter circuit for reducing clock jitter. The input terminal of the clock jitter circuit is connected to a power supply, and the output terminal of the clock jitter circuit is connected to one end of the RC charging and discharging circuit, and then together connected to the first input terminal of the comparator. The other end of the RC charging and discharging circuit is grounded. The second input terminal of the comparator is connected to the standard voltage VREF, and the output terminal of the comparator outputs an oscillation signal. This circuit uses a current-based capacitor charging and discharging structure plus a comparator, which saves chip area compared to the traditional capacitor charging and discharging structure plus two comparators. Furthermore, the calibration accuracy is within 0.5%, and this circuit can be applied to any circuit requiring a clock. On the other hand, the clock jitter output by this circuit is relatively small.

This invention discloses a multi-dimensional adaptive calibration method for RC oscillators applied to IoT SOC chips. First, a low-power wireless communication device using an IoT SOC chip is prepared for sub-cycle calibration and coefficient calculation. Then, a local RC oscillator drives a real-time clock (RTC) counter for sleep timing. Time synchronization is maintained through the processor and memory, achieving multi-dimensional adaptive calibration of the RC oscillator applied to the IoT SOC chip. This invention solves the critical problem of "thermal transient frequency overshoot" during the "active-deep sleep" transition in crystal-free IoT chips. By introducing a feedforward parameter backoff mechanism, it overcomes the failure limitation of existing temperature compensation algorithms caused by sensor sampling lag. Its sub-cycle phase capture technology improves TSF timing accuracy from milliseconds to microseconds, enhancing the synchronization accuracy of low-cost IoT chips under ultra-long DTIM cycles, and has potential scalability in future multi-band concurrent scenarios.