677 results about "Level shifting" patented technology

The invention belongs to the technical field of integrated circuits, and particularly relates to a speed regulation driving and anomaly detection circuit of a cooling fan. Comprising a current expansion driving module for providing a voltage FCC stabilized by an LDO for a fan and performing current expansion on an output current of the LDO to drive the fan; the logic control module is connected with the current expansion driving module and is used for adjusting a control signal ADJlt; n: 0gt; the value of the voltage FCC output by the LDO is changed, so that the speed of the fan is regulated; and the sampling detection module is connected with the logic control module and the VIN port of the LDO, samples the current of the fan through a sampling resistor, converts the current into a voltage V0, compares the voltage V0 with a reference voltage Vref, and outputs a voltage signal to the level shift circuit. The speed-adjustable fan driving circuit is integrated, detection of various abnormal states of the fan is achieved, and the speed-adjustable fan driving circuit has the outstanding advantages of being simple in PCB layout and low in cost.

The invention belongs to the technical field of integrated circuits, and particularly relates to an integrated speed regulation fan and an abnormal state detection circuit. Comprising a current expansion driving module for providing a voltage FCC stabilized by an LDO for a fan and performing current expansion on an output current of the LDO to drive the fan; the logic control module is connected with the current expansion driving module and is used for adjusting a control signal ADJlt; n: 0gt; the value of the voltage FCC output by the LDO is changed, so that the speed of the fan is regulated; and the sampling detection module is connected with the logic control module and the fan, samples the current of the fan through a sampling resistor, converts the current into a voltage V0, compares the voltage V0 with a reference voltage Vref, and outputs a voltage signal to a level shift circuit. The speed-adjustable fan driving circuit is integrated, detection of various abnormal states of the fan is achieved, and the speed-adjustable fan driving circuit has the outstanding advantages of being simple in PCB layout and low in cost.

The invention discloses a high-speed level conversion circuit, and belongs to the technical field of integrated circuit design, the circuit mainly comprises an input signal processing module, a voltage boosting module, a differential signal generation module, a signal amplification module and an output module, the input signal processing module converts a low-voltage input signal into a complementary logic signal pair; the voltage boosting module raises the voltage amplitude of the complementary logic signal by using a charge pump principle; the lifted signal drives a thick gate transistor in the differential signal generation module to generate a differential signal; the signal amplification module adopts a cross coupling structure to quickly amplify the differential signal; and finally, the output module outputs a high-voltage domain signal in an inverted manner. By introducing voltage bootstrap before gate driving, the overdrive voltage of a core switch tube is remarkably increased, so that the problem of low conversion speed of a traditional level conversion circuit is effectively solved on the premise of not increasing the device size and static power consumption, and high-speed and high-efficiency level conversion is realized.

The invention relates to the field of digital power supplies, and particularly provides a method for identifying CCM and DCM modes in a high-power digital power supply, which comprises the following steps: acquiring an inductive current sampling voltage signal and a reference voltage signal, and detecting the level conversion states of the two through a comparator module; if the comparison result accords with a preset error range, recording a DCM mode identifier and calculating an average sampling current value; adjusting an interrupt priority order to match a time sequence characteristic of the capture event, and generating a current state parameter of a mode switching boundary; calculating a correction factor of the average sampling current by combining the overflow times of the counter and rising edge fluctuation frequency data; a duty ratio parameter is updated based on the corrected current value, and a new PWM control signal is generated and output; when the duty ratio deviation exceeds a switching threshold value, dynamically adjusting an interrupt priority parameter and updating a reference value of a counter; and generating a real-time tracking data set of the inductive current zero point according to the final adjustment parameter.

A method of encoding and decoding downlink instructions based on mud flow rate includes an encoding method and a decoding method. The encoding method and the decoding method are configured to transmit and receive instructions by controlling the mud flow rate during drilling process. The method of encoding and decoding downlink instructions based on mud flow rate does not require a fixed threshold of voltage as a judgement standard for “0” and “1” symbols, but uses voltage change rate as a standard for judging the level transition, avoiding decoding failure caused by the inability of voltage sampling values to reach the fixed threshold after well depth is increased.

In one embodiment, a method includes: receiving, in a level shifter, an input signal from a first voltage domain that operates according to a first supply voltage; level shifting the input signal to at least one level-shifted signal having a second voltage greater than the first supply voltage; based on the at least one level-shifted signal, generating a first pulse signal and a second pulse signal; latching the first pulse signal through a latch circuit to form an output signal; and outputting the output signal to a second voltage domain, the second voltage domain to operate according to a second supply voltage greater than the first supply voltage.

The invention discloses a wide-level-range high-speed level conversion circuit, and relates to the technical field of electronic circuits. A level conversion module in the level conversion circuit comprises a first PMOS (P-channel Metal Oxide Semiconductor) tube and a second PMOS tube; a first NMOS tube and a second NMOS tube in the input module are NMOS devices with the voltage grade lower than the device grade corresponding to the main power supply voltage of the chip; the bias voltage generation module is connected with a power supply voltage and is used for generating a bias voltage; the bias voltage is dynamically adjusted along with the change of the power supply voltage; and a signal access selection unit in the input module is respectively connected with the grid electrode of the third NMOS tube and the grid electrode of the fourth NMOS tube, and is used for controlling the grid electrode to be connected with a bias voltage or a ground potential. The pull-down capability of the level conversion circuit can be adaptively adjusted along with the change of the pull-up capability caused by the change of the main power supply voltage, so that the level conversion circuit can realize high-speed level conversion in a wide level range.

The invention discloses an LDO (Low Dropout Regulator) circuit based on a level conversion and pre-adjustment module. The LDO circuit comprises a reference source, an error amplifier, a pre-adjustment module, a level conversion module, a power switch tube P1, a power circuit tube N1 and resistance feedback networks R1 and R2. The pre-adjustment module carries out voltage reduction processing on an input high-voltage power supply, and the level conversion module generates bias voltage according to an enable signal and the high-voltage power supply, controls a power switch and a switch in the operational amplifier, and ensures that the circuit is resistant to high voltage and extremely low in drain. The error amplifier adjusts the grid voltage of the power circuit according to the feedback and reference voltage difference value, and controls the current to stably output the voltage. And the resistance feedback network realizes closed-loop regulation of the output voltage. Under the condition that the LDO is enabled to be closed, the power tube can be ensured to be completely closed no matter the LDO is under the working voltage of 3V or 5V, so that the electric leakage condition of the LDO is greatly improved, and the LDO has the characteristic of low electric leakage.

The invention relates to the technical field of Internet of Things, in particular to a circuit for simultaneously converting UART (Universal Asynchronous Receiver / Transmitter) to multi-path different level communication, which comprises a double-USB input module, a power supply processing module, a USB-UART core conversion module and a multi-path level conversion module, the double-USB input module comprises an MINI-USB interface J6 and a USB-B interface J8, VBUS pins of the two interfaces are connected in parallel through a Schottky diode and then output to the power supply processing module, and data differential pair pins are connected in parallel and then connected to the USB-UART core conversion module; and the power supply processing module comprises an LDO (Low Dropout Regulator) voltage stabilizing chip and a filter capacitor, and is used for converting 5V voltage output by the double-USB input module into 3.3 V stable voltage. The circuit design that the UART is connected with various different levels for communication is adopted, the tool integration technology is achieved, the design that the two USB ports are connected in parallel is adopted, the compatibility of the USB data line can be effectively improved, the demands of customers are met, and the technical difficulty that one UART bus is connected with multiple USB ports is broken through.

The present invention discloses a level conversion circuit and chip for converting an input signal in a first voltage domain into an output signal in a second voltage domain. The level conversion circuit includes: a switch unit including a first MOS transistor and a second MOS transistor, wherein the control end of the first MOS transistor and the control end of the second MOS transistor are both connected to a bias voltage; an input unit operating in the first voltage domain and connected to the second end of the first MOS transistor and the second end of the second MOS transistor; a conversion unit operating in the second voltage domain and connected to the first end of the first MOS transistor and the first end of the second MOS transistor; an output unit operating in the second voltage domain; and a clamping unit connected between the switch unit and a first low voltage. In a first state, the first high voltage is not powered off and the clamping unit is disconnected. In a second state, the first high voltage is powered off and the clamping unit is turned on to clamp the driving voltage to the second low voltage. The present invention reduces chip area and avoids power consumption caused by the DC current brought by the pull-down element.

The invention discloses a broadband digital phase shifter based on an inductor sharing topology and an equivalent band-pass network, relates to the technical field of microwave integrated circuits, and is suitable for being applied to a Sub-GHz frequency band. The phase shifter comprises a phase shift circuit module and a driving circuit module, and the phase shift circuit module comprises six basic phase shift units including a fine phase shift unit and a coarse phase shift unit which cooperatively realize full-range multi-state phase shift. The fine phase shift unit adopts an inductor sharing topology, so that a phase shift path and a reference path share a circuit architecture, the design is simplified, and the chip layout is optimized; the coarse tuning phase shifting unit adopts an all-pass network as a reference path, a phase shifting path is an equivalent band-pass network formed by cascading a high-pass network and a low-pass network, and the 180-degree phase shifter adopts a double-inductor all-pass network to optimize amplitude-frequency response. And the driving circuit module outputs complementary voltage pairs through the level conversion circuit to drive the switching transistor to realize path switching. The antenna has the advantages of being compact in structure, stable in amplitude, excellent in radio frequency performance and high in adaptability.

Circuits and methods are provided that more effectively and efficiently implement multi-level converter circuits, including circuits and methods that more effectively and efficiently transform a differential voltage in an upper voltage domain to a level-shifted differential voltage in a lower voltage domain. First and second signals are applied to a differential amplifier in the upper voltage domain to provide a pair of amplified voltages representing a differential amplified voltage. First and second level shifters are provided for translating each of the pair of amplified voltages to first and second output voltages, respectively, relative to a reference potential. The first and second output voltages collectively correspond to a differential level-shifted output voltage relative to the reference potential. The differential level-shifted output voltage may be applied to a fully-differential analog to digital converter.

The invention discloses a high-speed level shifter applied to a BUCK converter. The high-speed level shifter comprises a level shifting part, a control logic part and an output part, after the level shift part inputs a signal, a low-delay rising edge and a high-delay falling edge of a conversion level A, and a high-delay rising edge and a low-delay falling edge of a conversion level B are output; the input of the control logic part adopts CLK in a BUCK converter to generate a short pulse, a high-voltage domain where SW and BST are located is isolated from a low-voltage domain, when the short pulse is at a high level, an output control signal is high, and when the short pulse is at a low level, the output signal is low; the input of the output part is the output of the level shift part and the control logic, and when the control signal is high, a low-delay rising edge is selected to be output; and when the control signal is low, selecting to output a low-delay falling edge. The level shift result is output through double ports, and low delay of conversion between the rising edge and the falling edge is achieved.

The invention provides a repair circuit, a display panel and a display device. The repairing circuit comprises an input module, a first input end of which is connected with a to-be-repaired signal, a first output end of which is electrically connected with a first node, and which is used for carrying out voltage reduction processing on the to-be-repaired signal and then outputting a first input signal; and the processing module comprises a dedelay unit, a shaping unit and a level conversion unit. The control end of the de-delay unit is electrically connected to the first node, the input end is coupled with the corresponding clock signal, the output end is electrically connected to the second node, the de-delay unit is used for performing de-delay processing on the first input signal according to the corresponding clock signal and then outputting a de-delay signal, and the falling edge of the de-delay signal is consistent with the falling edge of the corresponding clock signal; the shaping unit is electrically connected to the second node and is used for shaping the waveform of the dedelayed signal and then outputting a square wave signal; and the level conversion unit is electrically connected to the output end of the shaping unit and is used for performing level adjustment on the square wave signal and then outputting a scanning repair signal.

The invention discloses a level shift circuit, a control method thereof and electronic equipment, and relates to the technical field of integrated circuits. The circuit comprises a logic control module, an AC / DC coupling module and an inverted output module, in the logic control module, a first signal input end is connected with an input signal source, and a second signal input end is connected with an enable signal source; the AC-DC coupling module comprises a DC coupling unit and an AC coupling unit; in the direct current coupling unit, a first control input end is connected with a first control output end, and a second control input end is connected with a second control output end; in the AC coupling unit, an AC coupling input end is connected with a first control output end; the AC coupling output end is connected with the DC coupling output end; the inverted input end of the inverted output module is connected with the DC coupling output end, and the inverted output end is used for outputting a target level shift signal. And a low-delay, high-speed and good-duty-ratio level shifting function can be realized for an alternating current signal and a direct current signal.

According to the clock signal detection circuit disclosed by the invention, the functions of level shifting and voltage extraction of clock differential signals are integrated into the same level of circuit, so that compared with a two-level scheme that the clock differential signals are shifted first and then the peak values of the clock differential signals are sampled in an existing structure, the transmission delay of the signals is reduced; and false triggering caused by noise is avoided by adopting the hysteresis comparison circuit, so that the signal detection circuit provided by the embodiment of the invention improves the detection speed while ensuring the detection precision. In addition, the logic circuit adopts an RS trigger, so that the stability of a hysteresis interval is improved, and the transmission delay of the signal is further reduced.

The invention belongs to the field of electronic circuits, and provides a level conversion circuit, a switching power supply chip and electronic equipment. The circuit comprises a voltage output module, a logic module and a comparison module. First ends of the voltage output module and the logic module receive output voltage. The second end of the voltage output module is connected with the second end of the logic module and the first end of the comparison module. The second end of the comparison module receives reference voltage, and the third end is connected with the third end of the logic module; the fourth end of the logic module outputs target voltage, and the fifth end and the third end of the voltage output module are both grounded. In the starting process of the boost switching power supply chip, when the output voltage is smaller than a preset value, the voltage output module outputs a first voltage. The comparison module outputs a first comparison signal according to the first voltage and a reference voltage. The logic module enables the fourth end and the fifth end of the logic module to be conducted according to the first comparison signal, the target voltage is made to be 0V, then the voltage margin is the output voltage, and compared with an existing circuit, the voltage margin is increased.

The invention provides a driving circuit of a chopping switch circuit and electronic equipment, the driving circuit of the chopping switch circuit comprises a floating power supply generation circuit and a level shift circuit which are electrically connected with the chopping switch circuit, and the driving circuit provides port voltage bias for the chopping switch circuit through the floating power supply generation circuit. The floating power supply and the floating ground change along with the common-mode change of an input signal, so that the conduction impedance change and the threshold voltage change caused by the common-mode level change can be reduced; meanwhile, a power supply and a reference ground are provided for the level shift circuit, so that the level shift circuit can convert an originally constant high-amplitude clock signal into a clock signal changing along with the input common-mode level, and the amplitude of the clock signal can be kept at a constant and low value; therefore, low noise injection and clock feed-through can be realized under the condition that the conduction impedance and the threshold voltage are relatively stable, so that the precision and the stability of the circuit are improved, and the signal quality is improved.

The invention provides a level conversion circuit and a level conversion method, and belongs to the technical field of semiconductor integrated circuits. The circuit comprises a conversion module and a voltage supply module, when an input signal is a low level from a previous voltage domain, the voltage supply module can reduce a second power supply voltage by a certain threshold value, so that current can be completely cut off at the joint of the conversion module and the voltage supply module, and when the input signal is a high level from the previous voltage domain, the voltage supply module can reduce the second power supply voltage by a certain threshold value. The second power supply voltage from the voltage supply module can output a voltage converted into a signal suitable for a second voltage domain. And on a high-level voltage conversion output path, the number of the MOS tubes and the distance between the adjacent MOS tubes are controlled, so that the number of the MOS tubes can be greatly reduced, the layout is saved, the resistance is reduced, and the power consumption is reduced.

The utility model discloses a level conversion circuit, a chip and a display driving device. The level conversion circuit comprises an input signal processing unit which is coupled with an enable signal and an input signal, during the effective level period of the enable signal, the input signal processing unit provides a first control signal and a second control signal which are opposite in phase, and the overturning of the first control signal and the second control signal follows the overturning of the input signal; the enabling unit is coupled with the enabling signal and provides the clamping voltage during the invalid level period of the enabling signal; the conversion unit is coupled with the first control signal and the second control signal during the effective level period of the enable signal so as to convert the input signal of the first power domain into the output signal of the second power domain; or a clamp voltage is coupled during the invalid level period of the enable signal to clamp the output signal to the clamp voltage, and the voltage value of the clamp voltage falls into the second power domain. Start-stop control of the level conversion circuit is achieved through the enabling unit, and product use scenes can be expanded.

Disclosed are a level conversion circuit and a DC / DC converter, the level conversion circuit comprising: a current bias module configured to output a bias current; the control module is configured to output a control current based on the bias current under the control of an input signal in a low voltage domain; and the level conversion module is configured to output an output signal located in the high voltage domain based on the control current, and the logic level of the output signal is the same as that of the input signal. According to the invention, rapid level conversion can be realized, and interference of a high-voltage domain power supply can be well resisted.

The invention belongs to the technical field of analog integrated circuits, and particularly relates to a high-speed high-dv / dt noise suppression level shift circuit. The circuit is used for the BUCK converter, a trigger is used for inputting a logic signal to provide a stable dv / dt noise elimination path, and the reliability of a device is improved; the auxiliary recovery circuit is used for ensuring accurate and rapid establishment of a pull-down current, the pull-down current is multiplexed as a dv / dt noise supplement transient enhancement circuit, in addition, even if the dv / dt noise is large, the S of the SR trigger generates a false trigger pulse, at the moment, the R-end pulse of the trigger covers the false trigger pulse, and the accuracy of transmission logic under high noise is ensured. According to the level shift circuit, the reliability of a device and the correctness of logic transmission under a high-noise condition are ensured.

The utility model provides a speed sensor which comprises a PCB and a sensor circuit arranged on the PCB, the sensor circuit comprises a power-assisted control unit MCU, a Hall element U1 and a Hall element U2, the Hall element U1 is connected with the input end IN1 of the power-assisted control unit MCU, the Hall element U2 is connected with the input end IN2 of the power-assisted control unit MCU, the Hall element U1 is connected with the input end IN1 of the power-assisted control unit MCU, and the Hall element U2 is connected with the input end IN2 of the power-assisted control unit MCU. The output end OUT of the power-assisted control unit MCU outputs a control signal Signal, the Hall element U1 and the Hall element U2 are arranged in tandem in the rotating direction of the rotating shaft, and the triggering magnetic field intensity of high and low level conversion output by the Hall element U1 and the Hall element U2 is + / -5Gs. The two Hall elements are arranged in tandem, so that the rotating direction of the middle shaft can be judged while the speed is detected, and a wrong power-assisted signal is prevented from being output.

A level shift circuit (1) includes first to fourth P-type transistors, first and second N-type transistors, and a pull-up circuit (30). The first N-type transistor and the first P-type transistor are disposed between the input node and the output node, and the second P-type transistor is disposed between the first power supply and the output node. The second N-type transistor and the third P-type transistor are arranged between the inverted input node and the inverted output node, and the fourth P-type transistor is arranged between the first power supply and the inverted output node. The pull-up circuit (30) is configured to pull up the second node to the third power supply when the first node is converted from the high level to the low level, and pull up the first node to the third power supply when the second node is converted from the high level to the low level.

The utility model discloses a DAC signal conversion circuit of a DC motor, and belongs to the technical field of motor driving. The circuit comprises a power supply voltage conversion module, an integration unit, a voltage follower module and an analog voltage output module. The output end of the power supply voltage conversion module is connected with the input end of the integration unit, the output end of the integration unit is connected with the input end of the voltage follower module, and the output end of the voltage follower module is connected with the input end of the analog voltage output module; and the voltage follower module is used for isolating the output end of the integration unit from the input end of the analog voltage output module. The DAC signal conversion circuit of the DC motor provided by the utility model realizes an efficient and accurate conversion process from a PWM signal to an analog voltage signal, significantly improves the level conversion and response speed, can flexibly control the output amplitude and stability of the analog voltage signal, has the advantages of simple structure, low cost, high reliability, etc. The method can be widely applied to various fields.

The utility model provides a time-delay conduction circuit (10), a driving circuit (30) and a lamp (40). The time-delay conduction circuit (10) comprises a switch module (100), a level conversion module (200), a time-delay module (300) and a control module (400). The first end of the level conversion module (200) is connected with the first end of the switch module (100), and the second end of the level conversion module (200) is connected with the control end of the switch module (100) through the time delay module (300) and the control module (400) in sequence. By means of the level conversion module (200), the time delay module (300) and the control module (400), time delay control over the switch module (100) can be achieved, the switch module (100) is turned on after the voltage provided by the power source (20) is stable, and therefore when the power source (20) generates surge current, the surge current cannot pass through the switched-off switch module (100).

A first circuit receives a single-ended signal and a reference voltage. The first circuit shifts a common mode of the single-ended signal based on a level-shifting current. A preamplifier receives the single-ended signal and the reference voltage from the first circuit and amplifies the single-ended signal to obtain an amplified signal. A decision feedback equalizer (DFE) system receives the amplified signal and the reference voltage from the preamplifier. The DFE system generates a first average signal height of the amplified signal above the reference voltage and a second average signal height of the amplified signal below the reference voltage. A second circuit provides the level-shifting current to the first circuit and adjusts the level-shifting current based on a linearity parameter associated with the amplified signal.

Provided is a novel drive circuit. A level shift circuit has first to third transistors, first to third power supply lines, and first to fourth wiring lines. A back gate of the first transistor is electrically connected with the first wiring line. One of a source and a drain of the first transistor is electrically connected with the first power supply line. The potential of the first power supply line is higher than the potential of the second power supply line, the potential of the third power supply line is lower than the potential of the first power supply line and the potential of the second power supply line, the signal of the fourth wiring line switches from a low potential level to a high potential level when the signal supplied to the first wiring line is at a high potential level, and the signal of the fourth wiring line switches from the high potential level to the low potential level when the signal supplied to the first wiring line is at a low potential level.

The utility model discloses a circuit system of a high-voltage signal generator. The circuit system comprises a DDS main control circuit, a filter circuit, an operational amplifier circuit, a level conversion circuit, a power supply circuit and a crystal oscillator circuit, the output end of the DDS main control circuit is sequentially connected with the filter circuit and the operational amplifier circuit; the operational amplifier circuit is connected with the power supply circuit and the peripheral port; the DDS main control circuit is also respectively connected with the power supply circuit and the crystal oscillator circuit; the level conversion circuit is connected with the crystal oscillator circuit, the DDS main control circuit and the external power supply circuit; the power supply circuit is connected with an external power supply circuit. According to the scheme, numerous application requirements of high-voltage and high-precision signals can be met.

The utility model belongs to servo driver technical field especially relates to a kind of servo driver non-polarity pulse input filter circuit, the circuit is by pulse input module, isolation and level conversion module, primary pulse shaping logic flip module, primary filter module, secondary controllable filter module, secondary pulse shaping logic flip module and MCU pulse collection and filter control module constitute, the utility model is by being arranged bridge rectifier circuit to make circuit not limit the polarity of signal input, reach the effect of arbitrary polarity input.