441results about "Logic circuit coupling/interface arrangements" patented technology

The invention discloses a radio frequency closed-loop decoupling device and method, and the device comprises a radio frequency sampling module which collects a radio frequency signal of a resonant cavity and converts the radio frequency signal into an intermediate frequency signal; the preprocessing module is used for converting the intermediate frequency signal into an I-path signal and a Q-path signal; the extended state observation module is used for obtaining an I component estimated value, a Q component estimated value and a corresponding generalized disturbance estimator according to the I-path signal and the Q-path signal; the decoupling control module is used for carrying out proportional control according to the I component estimation value and the Q component estimation value, and taking the generalized disturbance estimation quantity as decoupling compensation quantity for superposition to obtain a baseband signal so as to suppress channel coupling and external disturbance; and the radio frequency driving module is used for converting the baseband signal into a driving signal so as to control the amplitude and the phase of the radio frequency output of the power source. According to the invention, dynamic decoupling of the I signal channel and the Q signal channel is realized, and the stability and the control precision of the output amplitude and the phase of the power source are improved.

The invention discloses a switching-in circuit with a self-adaptive voltage class and a double check logic. The switching-in circuit comprises a high-precision voltage division module, a double-redundancy sampling framework and a double sampling judgment logic executed by an MCU (Microprogrammed Control Unit), the high-precision voltage dividing module adopts a resistance network matched with a temperature coefficient, and can accurately divide input voltage in a wide temperature range; the double-set redundancy sampling architecture performs parallel sampling on the same path of input signals through two sets of completely independent signal conditioning loops, ADCs, digital isolation chips and isolation power supplies to form a physically isolated redundancy channel; the dual sampling discrimination logic executed by the MCU verifies a dual-channel sampling result based on a logic voting mechanism, and finally outputs a reliable input state or an abnormal alarm; according to the invention, through adaptive voltage design and redundancy check, high reliability is ensured, meanwhile, the requirements for spare parts of equipment of different voltage grades are remarkably reduced, and the inventory management cost is effectively reduced.

The invention discloses a single-pin trimming circuit, which relates to the technical field of analog circuit design and comprises a comparator module, a first input end of the comparator module is connected to a single pin, a second input end of the comparator module is connected to a reference voltage, and the comparator module is used for comparing an input voltage of the single pin with the reference voltage and outputting a comparison signal; the input end of the time sequence decoding module is connected to the output end of the comparator module, and the time sequence decoding module is configured as follows: a, the logic state of a trimming position is judged according to the duration time of the pulse in the comparison signal; and b, addressing different trimming positions according to the number of pulses in the comparison signal, and further generating a multi-position trimming control signal through a series of pulse signals input by the single pin. Accurate control of a multi-bit fuse trimming circuit in a chip is realized by using single-pin resources.

The invention relates to the technical field of isolation driving chips, and provides a common-mode rejection circuit, an isolation transmission circuit and a motor driving circuit. The common-mode rejection circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first resistor, a second resistor, a first clamping circuit and a second clamping circuit. The first clamping circuit is coupled between the power supply voltage of the receiver and a common node of the first end of the first transistor and the first end of the second transistor, and is used for clamping the voltage on the first common node; the second clamping circuit is coupled between a common node of the first end of the third transistor and the first end of the fourth transistor and the reference ground of the receiver, and is used for clamping the voltage on a second common node. According to the invention, the common-mode transient interference can be effectively suppressed in the isolation transmission circuit, and the system reliability is improved.

Circuitry is provided that includes a matching circuit, a first mixer coupled to the matching circuit and configured to receive a signal with an oscillation frequency, a second mixer coupled to the matching circuit, a first transmission line path coupled between the matching circuit and an input of the first mixer, and one or more capacitors coupled to the input of the first mixer and configured to reject signals at a harmonic frequency of the oscillation frequency. The wireless circuitry can further include a second transmission line path coupled between the matching circuit and an input of the second mixer. The transmission line path can include a first transmission line for conveying signals between the matching circuit and the first mixer, a second transmission line for conveying signals between the matching circuit and the first mixer, and a floating transmission line interposed between the first and second transmission lines.

The invention belongs to the field of integrated circuits, and discloses a level shifter with high dv / dt noise resistance and a self-adaptive power tube, which comprises a level shifting main body circuit and an auxiliary pull-up circuit. According to the invention, the auxiliary pull-up circuit which can be adaptively started according to the conduction time of the power tube is added, so that high dv / dt noise resistance can be realized in an application scene that different power tubes are adopted outside a chip.

The invention relates to a coupled inductor current-limiting type hybrid direct-current circuit breaker topology and a working method. The coupled inductor current-limiting type hybrid direct-current circuit breaker comprises a current-carrying part and a breaking part, the current-carrying part is formed by connecting an ultra-fast mechanical switch UFD and a load change-over switch LCS in series, the breaking part comprises a bridge circuit, a first branch circuit, a second branch circuit, a third branch circuit, a fourth branch circuit, a fifth branch circuit and a sixth branch circuit, the fourth branch circuit is formed by connecting a thyristor, a coupling inductor and a primary side inductor in series to form a current-limiting branch circuit, and the fifth branch circuit is formed by connecting a secondary side inductor and a secondary side inductor. The sixth branch is formed by connecting a secondary side inductor of a coupling inductor with a thyristor in series and then connecting the secondary side inductor with a capacitor in parallel; the current limiting of the fault current is realized through the fourth branch, the fault breaking of the primary side inductor of the coupling inductor of the fourth branch is completed through the coupling effect of the secondary side inductor of the coupling inductor of the sixth branch, the peak value of the fault current is obviously reduced, and the breaking time is obviously shortened; the circuit breaker can quickly respond to faults of three working modes of current limiting breaking, reclosing and small current breaking; and the breaking part of the circuit breaker adopts the thyristors instead of the IGBTs, so that the cost of the circuit breaker is reduced.

A power supply circuit generates from the input voltage of a primary circuit system the output voltage of a secondary circuit system by driving a switching output stage. The power supply circuit includes: a pulse feedback signal generation circuit that generates a pulse feedback signal corresponding to the output voltage; an analog control signal generation circuit that generates an analog control signal corresponding to the pulse feedback signal; and a switching driving control circuit that drives the switching output stage according to the result of comparison of the analog control signal with a slope signal. The analog control signal generation circuit raises the maximum value (an internal supply voltage) of the analog control signal with a predetermined gradient during the start-up or renewed start-up of the output voltage.

The utility model relates to the technical field of die bonder detection circuits, in particular to a sensor detection circuit for a die bonder, which comprises a master control module, a sensor interface module, a display control module, a signal processing module and a power supply module. The power supply module is used for supplying power to the main control module, the sensor interface module and the display control module; the sensor interface module and the display control module are respectively connected with the main control module; the main control module comprises a main processor and an auxiliary processor, the signal processing module comprises an AD7730 chip, the input end of the AD7730 chip is connected with a low-pass filter, and the main processor is connected with the auxiliary processor through an SPI interface. According to the utility model, a plurality of sensor interface circuits are arranged and can be used for high-speed and high-precision data detection of the die bonder, so that high-speed, low-noise and rapid system response of the die bonder is met, the connection complexity of the die bonder sensor is reduced, and the requirements of high precision and high sampling rate of the die bonder sensor are met.

This application relates to an interface circuit and an electronic device. The interface circuit includes an input interface unit, an output interface unit, an input connection terminal, an output connection terminal, a device connection terminal, and a common selection terminal. The input and output connection terminals are used to connect to a controller, the device connection terminal is used to connect to an external device, and the common selection terminal is used to receive a preset voltage signal. The input interface unit is connected to the input connection terminal, the device connection terminal, and the common selection terminal, and is used to receive the signal to be transmitted received at the device connection terminal and the preset voltage received at the common selection terminal, and outputs a signal corresponding to the signal to be transmitted through the input connection terminal. The output interface unit is connected to the output connection terminal, the device connection terminal, and the common selection terminal, and is used to receive the output signal received at the output connection terminal and the preset voltage received at the common selection terminal, and outputs a signal corresponding to the output signal through the device connection terminal. This interface circuit integrates the functions of a DI circuit and a DO circuit, exhibiting high integration.

The invention discloses a high-isolation and high-selectivity filtering power divider with an input end broadband non-reflection characteristic. Comprising an input port, two output ports, a double-L-shaped non-reflection absorption structure, two microstrip connecting lines, two parallel coupling lines, two L-shaped step resonators, two non-reflection absorption isolation resistors, a quarter-wavelength parallel coupling connecting line and two U-shaped transmission lines. The input port is a first port; the two output ports comprise a port II and a port III; the double-L-shaped non-reflection absorption structure comprises a first non-reflection absorption resistor, a second non-reflection absorption resistor, a first L-shaped non-reflection absorption connecting line and a second L-shaped non-reflection absorption connecting line. According to the invention, the broadband reflection-free absorption characteristic of the input end and the broadband high isolation between the output ports are realized at the same time, a plurality of transmission zeros are introduced through the L-shaped step resonators, and the frequency selectivity and out-of-band rejection are improved.

An output circuit 1 comprises: three P-type transistors (P1, P2, P3) connected in series between a first power supply and an output terminal (OUT); three N-type transistors (N1, N2, N3) connected in series between the output terminal (OUT) and a fourth power supply; and an N-type transistor (N4) and a P-type transistor (P4) connected in series between a second power supply and a third power supply. The output circuit (1) outputs an output signal (OUT) that changes in accordance with an input signal (IN).

The utility model discloses a multichannel isolation type current and voltage signal processing board card comprising a board card main body, and the board card main body is provided with a plurality of signal input channels, a signal isolation module, a signal processing module, a microprocessor and a signal output interface. Each signal input channel comprises a current input port and a voltage input port, an isolation unit of the signal isolation module comprises a current isolation circuit and a voltage isolation circuit, and isolation input of multichannel signals is achieved. The signal processing module carries out amplification, analog-to-digital conversion and filtering processing on the isolated signals, the microprocessor carries out operation processing on the signals, and the signal output interface outputs the processed signals. According to the utility model, inter-channel signal interference and external electromagnetic interference are effectively prevented, the signal acquisition precision and the anti-interference capability of the board card are improved, and the connection requirements of various devices are met.

Embodiments of this disclosure are applied to the field of circuit control, and provide a level setting method and an electronic device. When determining that a keyboard is in an off state, an electronic device configures level statuses of all output pins in the keyboard to a first level, to avoid existence of a potential difference between an input pin and an output pin. When the keyboard is in an on state, the electronic device configures levels of all the output pins corresponding to keys on the keyboard to a second level or a third level. When the levels of the output pins are the second level or the third level, the keyboard can generate an interrupt properly when receiving a user's operation of pressing a key, so that the electronic device can determine, based on the interrupt, the key pressed by the user.

This application relates to isolator signal detection. A circuit includes a capacitive isolator (104), a rectifier circuit (106), a first receiver and a second receiver (222, 224), and a switch (228). The capacitive isolator (104) has first and second inputs and first and second outputs. The rectifier circuit (106) has first and second terminals, third and fourth terminals, the first and second terminals coupled to the first and second outputs of the capacitive isolator (104), respectively. The first receiver (222) has a first input coupled to the first output of the capacitive isolator (104), a second input coupled to the second output of the capacitive isolator (104), and an output. The second receiver (224) has a first input coupled to the third terminal of the rectifier circuit (106), a second input coupled to the fourth terminal of the rectifier circuit (106), an enable input coupled to the output of the first receiver (222), and an output.

The signal transmission device has room for further consideration regarding drive control of the switch to be driven.SOLUTION: The signal transmission device 200X includes a transmission circuit S2 for outputting a control signal 350x, a reception circuit 400x, and an insulating circuit 500. The receiving circuit 400x receives an external signal S1x. The receiving circuit 400x drives the drive object switch S1x based on the control signal S2 in a state in which the external signal SW10 is at a first logic level, and drives and controls the drive object switch S1x based on the external signal S2 regardless of the control signal S1x in a state in which the external signal SW10 is at a second logic level.SELECTED DRAWING: Figure 11

The invention relates to the technical field of signal processing, and discloses a multi-sensor signal fusion circuit which is characterized in that a signal input conditioning circuit amplifies and conditions input signals of multiple paths of sensors respectively, can realize standardized processing according to output characteristics of different sensors, and lays a foundation for subsequent precise fusion; the operational amplifier isolation feedback circuit feeds back a fusion signal of the parallel output circuit to the signal input conditioning circuit through forming a voltage follower, so that the inherent error of a one-way conduction characteristic element in the parallel output circuit can be effectively counteracted, and meanwhile, the influence of temperature drift on the signal precision is avoided; a final fusion signal is determined only by a sensor input signal and conditioning circuit parameters, the fusion precision is greatly improved, and the problem that a traditional simulation fusion scheme is insufficient in precision is solved.

This application discloses a common-mode rejection circuit, a digital isolator, and a method for transmitting isolated signals, belonging to the field of circuit technology. When the differential signal with an input isolated signal has a high output voltage, if a positive common-mode transient interference occurs, the demodulation module malfunctions, causing the output voltage to drop to a low level. The second voltage-controlled current source outputs a first current proportional to the sink current, and the output stage module outputs a second current proportional to the first current, thus correcting the output voltage to a high level. When the differential signal without an input isolated signal has a low output voltage, if a reverse common-mode transient interference occurs, the demodulation module malfunctions, causing the output voltage to drop to a high level. The first voltage-controlled current source outputs a third current proportional to the extract current, and the output stage module outputs a fourth current proportional to the third current, thus correcting the output voltage to a low level. This application can reduce the circuit area, volume, and power consumption, reduce design complexity, and improve transmission stability.

The utility model relates to an isolation conversion circuit which comprises a voltage conversion chip U45, an isolation chip U42 and a level conversion chip U41. The input end of the voltage conversion chip U45 is connected with + 5V voltage, and the output end of the voltage conversion chip U45 is electrically connected with the first power supply input end of the isolation chip U42 so as to transmit the converted + 3.3 V voltage to the isolation chip U42; the isolation chip U42 is suitable for being electrically connected with the CPU chip U15, the isolation chip U42 is in bidirectional electrical connection with the level conversion chip U41, and the level conversion chip U41 is suitable for being in bidirectional electrical connection with RS-232 equipment so as to transmit converted signals; the input end of the voltage conversion chip U45 is electrically connected with a filter capacitor C191, and the output end of the voltage conversion chip U45 is electrically connected with a filter capacitor C86 and a filter capacitor C192; the first power input end of the isolation chip U42 is electrically connected with a filter capacitor C185.

The utility model provides a serial communication isolation circuit relates to serial communication technical field, and this circuit includes: protocol conversion module, isolation power module, at least two isolated communication channels, protocol conversion module is used for converting computer interface signal into asynchronous serial communication protocol signal, the input of isolation power module is used for connecting input power supply, and input power supply is the power supply provided for protocol conversion module or is the external input power supply of direct connection, and isolation power module is used for converting input power supply into isolation power supply, isolation communication channel is connected with protocol conversion module, and each isolation communication channel includes: first opto -coupler isolation module and second opto -coupler isolation module, the isolation power input of first opto -coupler isolation module and second opto -coupler isolation module is connected to the output of isolation power module, and isolation power module is used for providing isolation power supply for first opto -coupler isolation module, second opto -coupler isolation module.

This application relates to a low-power ruggedized module with controllable clock edge timing. The module includes a clock gating circuit, a ruggedized unit, and a clock and power supply module. In the clock gating circuit, the substrates of two PMOS transistors are connected to a variable DC power supply to achieve controllable clock edge timing. The ruggedized unit uses a cross-coupled CMOS bistable structure through a bistable latch module to store the synchronous data after clock gating in nodes X0 to X3, and inputs the data to nodes X0 to X3 through an input path via an input control module. In the clock and power supply module, the voltage VDD is set to 1V, reducing overall power consumption and saving energy. This module has the function of resisting six-node flip-flops, making it more robust and safer.

The present invention provides a semiconductor device that uses a unipolar transistor to represent a high or low level without a steady current flowing. [Solution] The semiconductor device 10 includes transistors 11 to 14, capacitive elements C11 and C12, first and second wirings, first and second input terminals, and an output terminal. The gate of the fourth transistor 14 is electrically connected to the first input terminal SI_IN, one terminal of the capacitive element C11, and the gate of transistor 11. The gate of transistor 12 is electrically connected to the second input terminal SIB_IN. One source or drain of transistor 11 is electrically connected to the first wiring VSS_IN, and the other is electrically connected to the other terminal of the capacitive elements C11 and C12, one source or drain of transistor 13, and the output terminal SO_OUT. The other source or drain of transistor 12 and the other source or drain of transistor 13 are electrically connected to the second wiring VDD_IN.

According to some embodiments, a communication device comprises a signal generator configured to produce a carrier signal, control logic configured to encode first data in the carrier signal, a barrier device comprising an isolation barrier connected to the signal generator, and a tuning circuit connected to the isolation barrier to establish a resonance state for transmitting the carrier signal across the isolation barrier, and a receiver configured to decode second data from a remote device based on at least one parameter of the carrier signal.

The invention relates to a linearity detection system for an input buffer, and the system comprises a main buffer, a terminating resistor unit, an auxiliary buffer, a switched capacitor unit, an observation comparator, and a judgment unit. The input end of the main buffer and the first input end of the terminating resistor unit receive input signals respectively; the second input end of the terminating resistor unit is connected to a first common-mode voltage, the output end of the terminating resistor unit is connected to the input end of the auxiliary buffer, and the output end of the auxiliary buffer and the output end of the main buffer are connected to the input end of the observation comparator through the switched capacitor unit. The output end of the observation comparator is connected to the input end of the judgment unit, and the output end of the judgment unit is connected to the output end of the main buffer; the determination unit is used for determining a determination result for the main buffer and determining a compensation mode. The current linearity state of the main buffer can be rapidly detected in real time and a corresponding compensation mode can be obtained on the premise that a main signal chain is not interfered.

The invention relates to a level shifter for a power converter. A level shifter for a power converter includes: a differential detector; a first transistor having a drain, a gate, and a source, the drain being electrically connected to the first node of the differential detector; a second transistor having a drain, a gate, and a source, the drain being electrically connected to the second node of the differential detector; and a circuit configured to simultaneously apply the same voltage to the sources of the first transistor and the second transistor based on the digital signal input to the level shifter. The circuit is further configured to apply different gate voltages as a function of the input digital signal to select which side of the level shifter draws current to the differential detector. The differential detector is configured to convert the digital signal to different voltage levels based on a differential current between the first transistor and the second transistor.

The embodiment of the utility model provides switch equipment and a tripping latch circuit thereof. The tripping latch circuit comprises a signal transmission circuit and a feedback circuit. The signal transmission circuit comprises a tripping signal input end which is suitable for being coupled with a tripping signal input circuit so as to receive a tripping signal; the signal feedback end is suitable for receiving a feedback signal; the first control signal input end is suitable for receiving a first indication signal used for indicating whether the energy of the energy storage capacitor reaches a tripping completion energy threshold value or not; and the signal output end is suitable for being coupled with the tripping driving circuit so as to provide an output signal for the tripping driving circuit, and the signal transmission circuit is suitable for selectively transmitting the tripping signal to the signal output end to serve as the output signal based on the feedback signal and the first indication signal. The feedback circuit is coupled between the signal output end and the signal feedback end, and is suitable for generating a feedback signal based on a second indication signal and the output signal, wherein the second indication signal is used for indicating whether the energy of the energy storage capacitor reaches an energy threshold value required by tripping or not.

Circuitry (24) is provided that includes a matching circuit (100), a first mixer (50-1) coupled to the matching circuit and configured to receive a signal with an oscillation frequency, a second mixer (50-2) coupled to the matching circuit, a first transmission line path (102-1) coupled between the matching circuit (100) and an input of the first mixer (50-1), and one or more capacitors (104) coupled to the input of the first mixer (50-1) and configured to reject signals at a harmonic frequency of the oscillation frequency. The wireless circuitry (24) can further include a second transmission line path (102-2) coupled between the matching circuit (100) and an input of the second mixer (50-2). The transmission line path can include a first transmission line for conveying signals between the matching circuit (100) and the first mixer (50-1), a second transmission line for conveying signals between the matching circuit (100) and the first mixer (50-1), and a floating transmission line interposed between the first and second transmission lines.

The invention provides a transistor splicing circuit. The transistor splicing circuit comprises a first transistor, a second transistor, a level shifter and an alternating current signal enhancement circuit. The level shifter is used for receiving a first input signal of a pair of differential input signals and shifting the first input signal to an offset bias level to generate an offset input signal to at least one of the gate of the first transistor and the gate of the second transistor. In addition, the AC signal enhancement circuit is configured to enhance the AC signal of the offset input signal according to a voltage difference between the first input signal and a second input signal of the pair of differential input signals. In particular, one of the first transistor and the second transistor is an N-type transistor and the other is a P-type transistor.

This invention provides a digital isolator with feedback capability and its application circuit. The first isolation circuit of the digital isolator includes a first coupler, a first matching network, a first transmitter, an envelope detector, and a decoder; the second isolation circuit includes a second coupler, a second matching network, a second transmitter, a second receiver, and an encoder. The envelope detector is connected to the first isolated circuit through the decoder; the first transmitter and the envelope detector are respectively connected to the first matching network; the first matching network is connected to the first coupler; the first coupler is coupled to the second coupler; the second coupler is connected to the second matching network; the second receiver and the second transmitter are respectively connected to the second matching network; the second transmitter is connected to the second isolated circuit through the encoder. This invention enables the feedback of various types of abnormal signals from the second isolation circuit to the first isolation circuit using only a single channel composed of a single pair of couplers.

The invention provides a pin multiplexing circuit of a data conversion chip. The pin multiplexing circuit comprises a voltage dividing module, a mode adjusting module and a pin multiplexing control module, the voltage division module is used for performing interval division on the power supply voltage of the data conversion chip and generating at least two reference voltage signals based on an interval division result; the mode adjusting module is used for comparing the reference voltage signal with an external input voltage signal and generating a mode adjusting signal according to a comparison result; and the pin multiplexing control module is used for starting or closing pin multiplexing according to the first mode adjusting signal. According to the invention, various serial communication protocols can be compatible without adding extra pins, and the minimum multiplexing of the pins is realized.