683results about "Logic circuit coupling/interface arrangements" patented technology

The invention discloses a radio frequency closed-loop decoupling device and method, and the device comprises a radio frequency sampling module which collects a radio frequency signal of a resonant cavity and converts the radio frequency signal into an intermediate frequency signal; the preprocessing module is used for converting the intermediate frequency signal into an I-path signal and a Q-path signal; the extended state observation module is used for obtaining an I component estimated value, a Q component estimated value and a corresponding generalized disturbance estimator according to the I-path signal and the Q-path signal; the decoupling control module is used for carrying out proportional control according to the I component estimation value and the Q component estimation value, and taking the generalized disturbance estimation quantity as decoupling compensation quantity for superposition to obtain a baseband signal so as to suppress channel coupling and external disturbance; and the radio frequency driving module is used for converting the baseband signal into a driving signal so as to control the amplitude and the phase of the radio frequency output of the power source. According to the invention, dynamic decoupling of the I signal channel and the Q signal channel is realized, and the stability and the control precision of the output amplitude and the phase of the power source are improved.

The invention discloses a switching-in circuit with a self-adaptive voltage class and a double check logic. The switching-in circuit comprises a high-precision voltage division module, a double-redundancy sampling framework and a double sampling judgment logic executed by an MCU (Microprogrammed Control Unit), the high-precision voltage dividing module adopts a resistance network matched with a temperature coefficient, and can accurately divide input voltage in a wide temperature range; the double-set redundancy sampling architecture performs parallel sampling on the same path of input signals through two sets of completely independent signal conditioning loops, ADCs, digital isolation chips and isolation power supplies to form a physically isolated redundancy channel; the dual sampling discrimination logic executed by the MCU verifies a dual-channel sampling result based on a logic voting mechanism, and finally outputs a reliable input state or an abnormal alarm; according to the invention, through adaptive voltage design and redundancy check, high reliability is ensured, meanwhile, the requirements for spare parts of equipment of different voltage grades are remarkably reduced, and the inventory management cost is effectively reduced.

The invention discloses a single-pin trimming circuit, which relates to the technical field of analog circuit design and comprises a comparator module, a first input end of the comparator module is connected to a single pin, a second input end of the comparator module is connected to a reference voltage, and the comparator module is used for comparing an input voltage of the single pin with the reference voltage and outputting a comparison signal; the input end of the time sequence decoding module is connected to the output end of the comparator module, and the time sequence decoding module is configured as follows: a, the logic state of a trimming position is judged according to the duration time of the pulse in the comparison signal; and b, addressing different trimming positions according to the number of pulses in the comparison signal, and further generating a multi-position trimming control signal through a series of pulse signals input by the single pin. Accurate control of a multi-bit fuse trimming circuit in a chip is realized by using single-pin resources.

The invention provides a multi-protocol configurable interface circuit. The multi-protocol configurable interface circuit comprises a plurality of channel modules, a plurality of counter modules, an input / output module and a configuration register, the channel module comprises a state machine, a shift register and a cache module. The configuration register obtains configuration information through the system bus, and the configuration information comprises which protocol is selected. The counter module generates a shift signal required by a shift register in the channel module according to the configuration information; the input and output module selects the corresponding pins according to the configuration information and determines the function of each pin; and the channel module determines the mode of each channel and the required state of the state machine according to the configuration information to complete data transmission of the selected protocol. According to the invention, a hardware design which focuses on realizing clock and data transmission by matching a state machine state transition and a shift register with a cache module is adopted, so that software intervention and CPU occupation are reduced, and the overall efficiency is improved; hardware resources are reduced, and hardware flexibility is improved.

The invention relates to the technical field of isolation driving chips, and provides a common-mode rejection circuit, an isolation transmission circuit and a motor driving circuit. The common-mode rejection circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first resistor, a second resistor, a first clamping circuit and a second clamping circuit. The first clamping circuit is coupled between the power supply voltage of the receiver and a common node of the first end of the first transistor and the first end of the second transistor, and is used for clamping the voltage on the first common node; the second clamping circuit is coupled between a common node of the first end of the third transistor and the first end of the fourth transistor and the reference ground of the receiver, and is used for clamping the voltage on a second common node. According to the invention, the common-mode transient interference can be effectively suppressed in the isolation transmission circuit, and the system reliability is improved.

Circuitry is provided that includes a matching circuit, a first mixer coupled to the matching circuit and configured to receive a signal with an oscillation frequency, a second mixer coupled to the matching circuit, a first transmission line path coupled between the matching circuit and an input of the first mixer, and one or more capacitors coupled to the input of the first mixer and configured to reject signals at a harmonic frequency of the oscillation frequency. The wireless circuitry can further include a second transmission line path coupled between the matching circuit and an input of the second mixer. The transmission line path can include a first transmission line for conveying signals between the matching circuit and the first mixer, a second transmission line for conveying signals between the matching circuit and the first mixer, and a floating transmission line interposed between the first and second transmission lines.

The invention belongs to the field of integrated circuits, and discloses a level shifter with high dv / dt noise resistance and a self-adaptive power tube, which comprises a level shifting main body circuit and an auxiliary pull-up circuit. According to the invention, the auxiliary pull-up circuit which can be adaptively started according to the conduction time of the power tube is added, so that high dv / dt noise resistance can be realized in an application scene that different power tubes are adopted outside a chip.

A signal transmission device includes: a signal transmission circuit that transmits a pulse signal from a primary circuit system to a secondary circuit system in an isolated manner; a power supply circuit that generates an output voltage from an input voltage in an isolated manner; first and second abnormality detection circuits that detect an abnormality in the primary circuit system and secondary circuit system; a signal transmission path that transmits an output of the second abnormality detection circuit from the secondary circuit system to the primary circuit system in an isolated manner; and a self-diagnosis circuit that performs self-diagnosis on each of the first and second abnormality detection circuits and the signal transmission path. The first abnormality detection circuit includes, as a diagnostic target, a power supply abnormality detector that detects an abnormality in the power supply circuit. The self-diagnosis circuit first diagnoses on the power supply abnormality detector.

A high-noise-immunity and low-delay level shift circuit for a GaN half-bridge drive chip, relating to the technical field of power management in integrated circuits. By additionally providing a path from a floating power rail VDDH to the ground, the level shift circuit simulates the noise effect caused by a sudden change in the voltage of the floating power rail in the level shift circuit. The level shift circuit has a good noise immunity capability and a simple structure.

Mixer circuitry can include a first pair of transistors coupled to a first tail node and configured to receive a local oscillator signal, a second pair of transistors coupled to a second tail node and configured to receive the local oscillator signal, a first digital-to-analog converter, a second DAC coupled between the first DAC and of the first pair of transistors, and a third DAC coupled between the first DAC and the second pair of transistors. During a first phase, control circuitry can sweep the first DAC to trim a first and / or other odd order local oscillator feedthrough. During a second phase, the control circuitry can sweep the second DAC to trim a second and / or other even order local oscillator feedthrough. During a third phase, the control circuitry can sweep the second and third DACs to reject signals associated with a second harmonic conversion gain of the mixer circuitry.

The invention relates to a coupled inductor current-limiting type hybrid direct-current circuit breaker topology and a working method. The coupled inductor current-limiting type hybrid direct-current circuit breaker comprises a current-carrying part and a breaking part, the current-carrying part is formed by connecting an ultra-fast mechanical switch UFD and a load change-over switch LCS in series, the breaking part comprises a bridge circuit, a first branch circuit, a second branch circuit, a third branch circuit, a fourth branch circuit, a fifth branch circuit and a sixth branch circuit, the fourth branch circuit is formed by connecting a thyristor, a coupling inductor and a primary side inductor in series to form a current-limiting branch circuit, and the fifth branch circuit is formed by connecting a secondary side inductor and a secondary side inductor. The sixth branch is formed by connecting a secondary side inductor of a coupling inductor with a thyristor in series and then connecting the secondary side inductor with a capacitor in parallel; the current limiting of the fault current is realized through the fourth branch, the fault breaking of the primary side inductor of the coupling inductor of the fourth branch is completed through the coupling effect of the secondary side inductor of the coupling inductor of the sixth branch, the peak value of the fault current is obviously reduced, and the breaking time is obviously shortened; the circuit breaker can quickly respond to faults of three working modes of current limiting breaking, reclosing and small current breaking; and the breaking part of the circuit breaker adopts the thyristors instead of the IGBTs, so that the cost of the circuit breaker is reduced.

A power supply circuit generates from the input voltage of a primary circuit system the output voltage of a secondary circuit system by driving a switching output stage. The power supply circuit includes: a pulse feedback signal generation circuit that generates a pulse feedback signal corresponding to the output voltage; an analog control signal generation circuit that generates an analog control signal corresponding to the pulse feedback signal; and a switching driving control circuit that drives the switching output stage according to the result of comparison of the analog control signal with a slope signal. The analog control signal generation circuit raises the maximum value (an internal supply voltage) of the analog control signal with a predetermined gradient during the start-up or renewed start-up of the output voltage.

The utility model relates to the technical field of die bonder detection circuits, in particular to a sensor detection circuit for a die bonder, which comprises a master control module, a sensor interface module, a display control module, a signal processing module and a power supply module. The power supply module is used for supplying power to the main control module, the sensor interface module and the display control module; the sensor interface module and the display control module are respectively connected with the main control module; the main control module comprises a main processor and an auxiliary processor, the signal processing module comprises an AD7730 chip, the input end of the AD7730 chip is connected with a low-pass filter, and the main processor is connected with the auxiliary processor through an SPI interface. According to the utility model, a plurality of sensor interface circuits are arranged and can be used for high-speed and high-precision data detection of the die bonder, so that high-speed, low-noise and rapid system response of the die bonder is met, the connection complexity of the die bonder sensor is reduced, and the requirements of high precision and high sampling rate of the die bonder sensor are met.

This application relates to an interface circuit and an electronic device. The interface circuit includes an input interface unit, an output interface unit, an input connection terminal, an output connection terminal, a device connection terminal, and a common selection terminal. The input and output connection terminals are used to connect to a controller, the device connection terminal is used to connect to an external device, and the common selection terminal is used to receive a preset voltage signal. The input interface unit is connected to the input connection terminal, the device connection terminal, and the common selection terminal, and is used to receive the signal to be transmitted received at the device connection terminal and the preset voltage received at the common selection terminal, and outputs a signal corresponding to the signal to be transmitted through the input connection terminal. The output interface unit is connected to the output connection terminal, the device connection terminal, and the common selection terminal, and is used to receive the output signal received at the output connection terminal and the preset voltage received at the common selection terminal, and outputs a signal corresponding to the output signal through the device connection terminal. This interface circuit integrates the functions of a DI circuit and a DO circuit, exhibiting high integration.

An embodiment of the present application discloses a control signal generating circuit, an automatic gain control loop, and a transimpedance amplifier (TIA), wherein the control signal generating circuit includes: a voltage-current conversion circuit, a current comparison circuit, and a voltage generating circuit; wherein the voltage-current conversion circuit is used to convert an input voltage signal to be controlled into its corresponding current signal to be controlled, and to convert an input reference voltage signal into its corresponding reference current signal; the current comparison circuit is used to compare the generated current signal to be controlled with the reference current signal to generate a difference current signal; and the voltage generating circuit is used to generate a voltage control signal based on the difference current signal.

The invention discloses a high-isolation and high-selectivity filtering power divider with an input end broadband non-reflection characteristic. Comprising an input port, two output ports, a double-L-shaped non-reflection absorption structure, two microstrip connecting lines, two parallel coupling lines, two L-shaped step resonators, two non-reflection absorption isolation resistors, a quarter-wavelength parallel coupling connecting line and two U-shaped transmission lines. The input port is a first port; the two output ports comprise a port II and a port III; the double-L-shaped non-reflection absorption structure comprises a first non-reflection absorption resistor, a second non-reflection absorption resistor, a first L-shaped non-reflection absorption connecting line and a second L-shaped non-reflection absorption connecting line. According to the invention, the broadband reflection-free absorption characteristic of the input end and the broadband high isolation between the output ports are realized at the same time, a plurality of transmission zeros are introduced through the L-shaped step resonators, and the frequency selectivity and out-of-band rejection are improved.

An output circuit 1 comprises: three P-type transistors (P1, P2, P3) connected in series between a first power supply and an output terminal (OUT); three N-type transistors (N1, N2, N3) connected in series between the output terminal (OUT) and a fourth power supply; and an N-type transistor (N4) and a P-type transistor (P4) connected in series between a second power supply and a third power supply. The output circuit (1) outputs an output signal (OUT) that changes in accordance with an input signal (IN).

The utility model discloses a multichannel isolation type current and voltage signal processing board card comprising a board card main body, and the board card main body is provided with a plurality of signal input channels, a signal isolation module, a signal processing module, a microprocessor and a signal output interface. Each signal input channel comprises a current input port and a voltage input port, an isolation unit of the signal isolation module comprises a current isolation circuit and a voltage isolation circuit, and isolation input of multichannel signals is achieved. The signal processing module carries out amplification, analog-to-digital conversion and filtering processing on the isolated signals, the microprocessor carries out operation processing on the signals, and the signal output interface outputs the processed signals. According to the utility model, inter-channel signal interference and external electromagnetic interference are effectively prevented, the signal acquisition precision and the anti-interference capability of the board card are improved, and the connection requirements of various devices are met.

A passive and active compatible IO (input / output) feedback circuit belongs to the technical field of circuit design and comprises a first-stage signal input interface circuit, a second-stage passive and active signal switching circuit and a third-stage signal feedback circuit. The first-stage signal input interface circuit, the second-stage passive and active signal switching circuit and the third-stage signal feedback circuit are connected in sequence, and the first-stage signal input interface circuit is connected with the third-stage signal feedback circuit. The system can process passive signals and active signals, reduces the technical improvement cost, shortens the technical improvement time of a wind field, simplifies the management process, and is simple in application.

The utility model discloses a voltage and current rapid acquisition digital control circuit, which comprises a multi-channel digital-to-analog conversion circuit, and a voltage photoelectric isolation acquisition circuit and a current rapid acquisition circuit which are connected with the multi-channel digital-to-analog conversion circuit, and the multi-channel digital-to-analog conversion circuit comprises a multi-channel ADC chip. The output end of the multi-channel ADC chip is connected with an FPGA processor, and the multi-channel ADC chip is used for converting the analog quantity of accessed voltage and current signals into digital quantity data and transmitting the digital quantity data to the FPGA processor in a bus mode. According to the utility model, the photoelectric isolator whose maximum delay time from input to output does not exceed 3.3 [mu] s can be used to realize signal photoelectric isolation amplification, the differential amplification filter circuit is connected in parallel with a 1nF capacitor to give consideration to both signal filtering stability and capacitor charging rapidity, and the ADC conversion chip whose resolution is 16bit and capable of parallel acquisition is selected. And multi-channel high-precision and rapid parallel analog-to-digital conversion is realized.

The utility model discloses a circuit for converting a high-level input signal into a high-level output signal, relates to the technical field of level signal conversion, and solves the technical problems that a circuit for converting the high-level input signal into the high-level output signal is inflexible in adaptation mode and inconvenient to use. The circuit comprises a control end, a control signal input end and a multi-path relay output circuit, the control signal input end is connected with the control end, and the multi-path relay output circuit is connected with the control signal input end; the control end generates a control signal based on a high-level input signal, and the control signal input end switches on or off the multi-path relay output circuit according to the control signal so as to switch on or switch off a plurality of high-level output signals. According to the utility model, the high-level input signal is enabled and disabled as required through the control signal input end, the flexibility of high-level driving signal configuration is improved, and the use is more convenient.

Embodiments of this disclosure are applied to the field of circuit control, and provide a level setting method and an electronic device. When determining that a keyboard is in an off state, an electronic device configures level statuses of all output pins in the keyboard to a first level, to avoid existence of a potential difference between an input pin and an output pin. When the keyboard is in an on state, the electronic device configures levels of all the output pins corresponding to keys on the keyboard to a second level or a third level. When the levels of the output pins are the second level or the third level, the keyboard can generate an interrupt properly when receiving a user's operation of pressing a key, so that the electronic device can determine, based on the interrupt, the key pressed by the user.

To provide a semiconductor device that can supply a signal with a sufficient amplitude to a scan line while suppressing the consumption power, and a semiconductor device that can suppress the blunting of the signal to be supplied to the scan line and shorten the rise time or fall time while suppressing the consumption power.SOLUTION: A semiconductor device includes a plurality of pixels each including a display element and at least one first transistor, and a scan line driving circuit that supplies signals to select the pixels to scan lines. A pixel electrode layer of the display element, a gate electrode layer, a source electrode layer, and a drain electrode layer of the first transistor, and the scan lines are formed of a conductive film with a light-transmitting property. The scan line driving circuit includes a second transistor, and a capacitor element that holds the voltage between a gate electrode layer and a source electrode layer of the second transistor. The source electrode layer of the second transistor is connected to the scan line.SELECTED DRAWING: Figure 6

This application relates to isolator signal detection. A circuit includes a capacitive isolator (104), a rectifier circuit (106), a first receiver and a second receiver (222, 224), and a switch (228). The capacitive isolator (104) has first and second inputs and first and second outputs. The rectifier circuit (106) has first and second terminals, third and fourth terminals, the first and second terminals coupled to the first and second outputs of the capacitive isolator (104), respectively. The first receiver (222) has a first input coupled to the first output of the capacitive isolator (104), a second input coupled to the second output of the capacitive isolator (104), and an output. The second receiver (224) has a first input coupled to the third terminal of the rectifier circuit (106), a second input coupled to the fourth terminal of the rectifier circuit (106), an enable input coupled to the output of the first receiver (222), and an output.

The signal transmission device has room for further consideration regarding drive control of the switch to be driven.SOLUTION: The signal transmission device 200X includes a transmission circuit S2 for outputting a control signal 350x, a reception circuit 400x, and an insulating circuit 500. The receiving circuit 400x receives an external signal S1x. The receiving circuit 400x drives the drive object switch S1x based on the control signal S2 in a state in which the external signal SW10 is at a first logic level, and drives and controls the drive object switch S1x based on the external signal S2 regardless of the control signal S1x in a state in which the external signal SW10 is at a second logic level.SELECTED DRAWING: Figure 11

The invention relates to the technical field of signal processing, and discloses a multi-sensor signal fusion circuit which is characterized in that a signal input conditioning circuit amplifies and conditions input signals of multiple paths of sensors respectively, can realize standardized processing according to output characteristics of different sensors, and lays a foundation for subsequent precise fusion; the operational amplifier isolation feedback circuit feeds back a fusion signal of the parallel output circuit to the signal input conditioning circuit through forming a voltage follower, so that the inherent error of a one-way conduction characteristic element in the parallel output circuit can be effectively counteracted, and meanwhile, the influence of temperature drift on the signal precision is avoided; a final fusion signal is determined only by a sensor input signal and conditioning circuit parameters, the fusion precision is greatly improved, and the problem that a traditional simulation fusion scheme is insufficient in precision is solved.

This application discloses a common-mode rejection circuit, a digital isolator, and a method for transmitting isolated signals, belonging to the field of circuit technology. When the differential signal with an input isolated signal has a high output voltage, if a positive common-mode transient interference occurs, the demodulation module malfunctions, causing the output voltage to drop to a low level. The second voltage-controlled current source outputs a first current proportional to the sink current, and the output stage module outputs a second current proportional to the first current, thus correcting the output voltage to a high level. When the differential signal without an input isolated signal has a low output voltage, if a reverse common-mode transient interference occurs, the demodulation module malfunctions, causing the output voltage to drop to a high level. The first voltage-controlled current source outputs a third current proportional to the extract current, and the output stage module outputs a fourth current proportional to the third current, thus correcting the output voltage to a low level. This application can reduce the circuit area, volume, and power consumption, reduce design complexity, and improve transmission stability.

The utility model relates to an isolation conversion circuit which comprises a voltage conversion chip U45, an isolation chip U42 and a level conversion chip U41. The input end of the voltage conversion chip U45 is connected with + 5V voltage, and the output end of the voltage conversion chip U45 is electrically connected with the first power supply input end of the isolation chip U42 so as to transmit the converted + 3.3 V voltage to the isolation chip U42; the isolation chip U42 is suitable for being electrically connected with the CPU chip U15, the isolation chip U42 is in bidirectional electrical connection with the level conversion chip U41, and the level conversion chip U41 is suitable for being in bidirectional electrical connection with RS-232 equipment so as to transmit converted signals; the input end of the voltage conversion chip U45 is electrically connected with a filter capacitor C191, and the output end of the voltage conversion chip U45 is electrically connected with a filter capacitor C86 and a filter capacitor C192; the first power input end of the isolation chip U42 is electrically connected with a filter capacitor C185.

The invention discloses a capacitor isolation load control circuit and method, and the method comprises the steps: controlling two output ends of a signal transmitting module U1 to output voltage signals with opposite levels respectively, and inputting the voltage signals to one end of a first isolation capacitor C1 and one end of a second isolation capacitor C2 respectively; the other ends of the first isolation capacitor C1 and the second isolation capacitor C2 are respectively connected with the first input end and the second input end of the signal conversion circuit; the signal conversion circuit rectifies and multiplies the voltage between the two input ends, and inputs the rectified and multiplied voltage into the load driving circuit; the load driving circuit comprises a first field effect transistor Q1 and a second field effect transistor Q2, the two field effect transistors are connected in a back-to-back mode, the two back-to-back field effect transistors are controlled to be switched on or switched off through the voltage after voltage doubling, and the output ends of the two back-to-back field effect transistors are connected to the two ends of a load M1 respectively. According to the invention, the back-to-back field effect transistors are adopted to control the load, the two back-to-back field effect transistors are ensured to only work in a cut-off or saturation conduction stage, and the method is suitable for controlling the large-current load.