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177 results about "Cross point" patented technology

Machine vision-based method for measuring distance between cross positions of carrier cables of rail contact network

The invention discloses a method and a system for measuring the distance between cross positions of carrier cables of a rail contact network based on machine vision, and relates to the technical field of measurement of the distance between the cross positions of the carrier cables of the rail contact network. A laser radar and an infrared sensor are used for collecting depth information and temperature distribution data, and a multi-view image and depth temperature data are obtained; collecting the multi-view image and the depth temperature data to a central processing unit through a high-speed data transmission channel to obtain an initial data set; preprocessing the initial data set to obtain a high-quality data set; based on a deep learning algorithm and the high-quality data set, constructing a prediction model of the carrier cable and the intersection point, inputting sample data in the high-quality data set, and outputting prediction results of the carrier cable and the intersection point; and based on prediction results of the carrier cables and the intersection points, three-dimensional model reconstruction is carried out on the intersection positions of the carrier cables in combination with stereoscopic vision and structured light technologies.
Owner:HEFEI UNIV OF TECH

Support deformation monitoring method combining cross laser and laser speckles

The invention discloses a support deformation monitoring method combining cross laser and laser speckles, which comprises the following steps: selecting a monitoring point on the surface of a support, and projecting the cross laser and the laser speckles to the monitoring point, so that the cross point of the cross laser and the laser speckles are aligned with the center of the monitoring point; aligning the camera to the monitoring point, so that an included angle theta is formed between the shooting direction of the camera and the direction of projecting the cross laser; carrying out calibration setting and parameter setting on the camera to obtain a set camera; under different load working conditions of the bracket, controlling the camera to collect images of the monitoring points at regular time; wherein the blue speckle pattern is collected by a blue channel, and the red structured light pattern is collected by a red channel; processing and strain calculation are carried out on the collected images to obtain in-plane and out-of-plane displacement fields and strain fields of the support at different moments; according to the invention, high-precision, dynamic and more comprehensive multi-dimensional deformation monitoring of support structures can be realized.
Owner:CHINA METALLURGICAL CONSTR ENG GRP

Cross-type movable antenna array, communication system, communication parameter optimization method and related equipment

The embodiment of the invention provides a cross-type movable antenna array, a communication system, a communication parameter optimization method and related equipment. The cross-type movable antenna array comprises a plurality of mutually parallel first sliding rails, a plurality of mutually parallel second sliding rails, at least one antenna unit and driving control equipment, the first sliding track and the second sliding track intersect to form a two-dimensional plane grid structure, and an antenna unit is arranged on the intersection point of the first sliding track and the second sliding track; when the driving control device receives the driving request of the target position, the driving control device is used for controlling the first sliding track and / or the second sliding track to slide and driving the plurality of antenna units to move to the target position, so that the hardware cost, the energy consumption and the maintenance difficulty of the movable antenna array are greatly reduced.
Owner:THE CHINESE UNIV OF HONG KONG (SHENZHEN)

Crosspoint switch with μLED IO ports and imaging fiber cables

Systems and methods include an optical switch system which provides a combination of μLED arrays, PDs, imaging fiber cables, and crosspoint switch on a single chip. The system includes one or more input ports with each input port configured to connect to an input fiber bundle. The system additionally includes one or more output ports with each output port configured to connect to an output fiber cable, wherein each of the input fiber bundle and the output fiber cable include a plurality of fiber cores. An electrical crosspoint switch is connected to the one or more input ports and the one or more output ports, wherein the electrical crosspoint switch is configured to connect a given input port to a corresponding output port, including all signals in the input fiber cable to the corresponding output fiber cable.
Owner:CIENA CORP

Multi-step programming schemes for programming crossbar circuits

PCT designated stage expiredWO2025076270A1Read-only memoriesDigital storageBit lineSoftware engineering
Methods for programming crossbar circuits are provided. The methods include initializing a word line voltage, a bit line voltage, and a select voltage applied to a cross-point device of the crossbar circuit. The methods further include raising the word line voltage without changing the bit line voltage. The bit line voltage may be raised without changing the word line voltage applied to the cross-point device. The word line voltage and the bit line voltage may be alternatively changed until they reach their respective desired values. In some embodiments, the methods further include setting the bit line voltage to a predetermined value and raising the word line voltage without changing the select voltage. The select voltage may then be raised without changing the word line voltage applied to the cross-point device. The word line voltage and the select voltage may be alternatively changed until they reach their respective desired values.
Owner:TETRAMEM INC

Sensing, storing and computing integrated bionic vision sensing module storing and computing method and system

The invention relates to the technical field of visual sensing modules, and discloses a sensing-storage-calculation integrated bionic visual sensing module in-storage calculation method and system.The method comprises the steps that photo-induced electrons excited by incident photons are directly injected into memristor oxygen vacancy conductive filaments through a shared electrode interface, and photocurrent driving signals are obtained; in a forward SET mode, driving memristor oxygen vacancy conductive filaments to form cross array conductivity distribution, and calculating row line driving voltage of a memristor cross array; applying the current to each cross point of cross array conductance distribution in a reverse RESET mode to obtain a flowing current of each cross point; and converging and summing the flowing current of each cross point at a column line node to obtain a column line output current, performing capacitor charging integration on the column line output current, and converting the column line output current into an analog domain convolution operation voltage, thereby avoiding intermediate multiple analog-to-digital and digital-to-analog conversion loss. And end-to-end low-delay and low-power-consumption processing from photon sensing to feature calculation is realized.
Owner:DONGGUAN TSIMSAFE ELECTRONICS TECH

Three dimensional cross-point non-volatile memory

A non-volatile memory having a 3D cross-point architecture and twice the cell density is provided in which vertically stacked word lines run in plane (i.e., parallel) to the substrate and bit lines ru
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Crossbar circuits incorporating 2-transistor-2-resistor configurations

PCT designated stageWO2026096967A1Digital storageBit lineCrossbar switch
An apparatus may include a plurality of bit lines, a plurality of word lines, a plurality of source lines, and a plurality of cross-point devices connecting to the bit lines, the word lines, and the source lines. A first cross-point device of the plurality of cross-point devices is connected to a first bit line and a second bit line of the plurality of bit lines, a first word line of the plurality of word lines, and a first source line of the plurality of source lines. The first cross-point device may include a first RRAM device, an NMOS transistor connected to the first RRAM device, a PMOS transistor connected to the NMOS transistor, and a second RRAM device connected to the PMOS transistor. The NMOS transistor and the PMOS transistor are connected to the first source line and can be arranged in a side-by-side structure or a stacked-up structure.
Owner:TETRAMEM INC

Circuit snapback and charge diversion for cross-point arrays

PCT designated stageWO2025264268A1Digital storageCapacitanceTelecommunications
Technology for reading memory cells in a cross-point memory array. Each memory cell may have a threshold switching selector in series with a programmable resistance memory element. The memory system has control circuitry adjacent to the cross-bar memory array that is used to generate and deliver currents to the cross-bar memory array. The memory system temporarily provides capacitive isolation of the selected memory cell from capacitance of the adjacent circuitry while the snapback current is present. The memory system provides a discharge path to a node between the control circuitry and the selected memory cell during a period in which the capacitive isolation is removed.
Owner:SANDISK TECHNOLOGIES LLC

Cross-point memory cell and method

An IC device includes first and second transistors and a memory device. The first transistor includes a first source / drain (S / D) terminal coupled to a first select line, a second S / D terminal, and a gate coupled to a first word line. The second transistor includes a first S / D terminal coupled to a first bit line, a second S / D terminal, and a gate. The memory device is coupled to the second S / D terminal of the second transistor, and a first storage node includes the second S / D terminal of the first transistor and the gate of the second transistor.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

Array and Contact Architecture for Four Stacked Layer 3D Cross-Point Memory

The architecture for three-dimensional cross-point memory cells includes layers of multiple planar and parallel bit slice regions, each of the bit slice regions including bit lines extending in a bit line direction. The architecture also includes a decoder to which the bit slice regions are electrically connected through contacts. Each bit slice region layer has a slice ratio per decoder, which is defined as the ratio of the number of bit slice regions in the layer to the number of many decoders to which at least one of the slice regions in the layer is electrically connected. At least one of the bit slice region layers has a different slice ratio per decoder greater than 1:1.
Owner:YANGTZE ADVANCED MEMORY INDUSTRIAL INNOVATION CENTER CO LTD

Mark point structure

The utility model discloses a Mark point structure, which adopts at least two rectangular parts which are arranged in a crossed manner to form a bonding pad area, and compared with a traditional circular structure, the composite geometric shape of the bonding pad area can provide higher feature vector dimension in a machine vision system, the HOG feature value is improved by at least 30%, the algorithm identification accuracy is greatly improved, and the reliability of the structure is improved. Especially in a high-density BGA packaging area, the positioning precision of the center coordinates of the cross points can reach + / -0.01 mm, the identification degree of the Mark points on the PCB is greatly improved, and the problem that the Mark points are difficult to distinguish due to the low identification degree is effectively solved.
Owner:EMDOOR ELECTRONICS TECH

Low-disturbance self-recovery operation method for cross-point array ferroelectric memory

The invention discloses a low-disturbance self-recovery operation method for a cross-point array ferroelectric memory, which is used for operating a cross-point array ferroelectric memory array, comprises four continuous pulse periods, and sequentially realizes selected memory unit activation, data reading, data recovery and reset operation. By using the low-disturbance self-recovery operation method provided by the invention, the voltage pulse disturbance suffered by unselected units in the operation process of the cross-point array ferroelectric capacitance memory can be reduced, and meanwhile, the function of automatically recovering the data of the ferroelectric capacitance memory is realized. According to the method, smaller read-write disturbance can be realized, the bit error rate is lower, and the access speed is higher.
Owner:PEKING UNIV

Crossbar circuits incorporating 2-transistor-2-resistor configurations

An apparatus may include a plurality of bit lines, a plurality of word lines, a plurality of source lines, and a plurality of cross-point devices connecting to the bit lines, the word lines, and the source lines. A first cross-point device of the plurality of cross-point devices is connected to a first bit line and a second bit line of the plurality of bit lines, a first word line of the plurality of word lines, and a first source line of the plurality of source lines. The first cross-point device may include a first RRAM device, an NMOS transistor connected to the first RRAM device, a PMOS transistor connected to the NMOS transistor, and a second RRAM device connected to the PMOS transistor. The NMOS transistor and the PMOS transistor are connected to the first source line and can be arranged in a side-by-side structure or a stacked-up structure.
Owner:TETRAMEM INC

Device-based cross point array and method of operation thereof

Disclosed a device-based cross point array and a method of operation therefor. The method relates to a method for updating a cross point array implemented as a device where a potentiation region and a depression region are separated, and the method is performed by a control logic. The method includes: in a first cycle, controlling lines where positive values are applied among first lines, in ON state, and applying a first voltage pulse at each of second lines intersecting with the first lines based on an applied value; and in a second cycle, controlling lines where negative values are applied among the first lines, in ON state, and applying a second voltage pulse at each of the second lines based on an applied value.
Owner:POSTECH ACADEMY INDUSTRY FOUNDATION

Cross point array architecture for multiple decks

Methods, systems, and devices for cross point array architecture for multiple decks are described. A memory array may include multiple decks, such as six or eight decks. The memory array may also include sockets for coupling access lines with associated decoders. The sockets may be included in sub-blocks of the array. A sub-block may be configured to include sockets for multiple access lines. A socket may intersect an access line in the middle of the access line, or at an end of the access line. Sub-blocks containing sockets for an access line may be separated by a period based on the access line.
Owner:MICRON TECHNOLOGY INC

Connecting pipe for a hand-held, portable work device

Connecting pipe for guiding an airflow from a blower (2) of a hand-held, portable work device (1) to a component (3), in particular a collection bag, of the hand-held, portable work device (1), wherein the connecting pipe (4) is curved in an arc in a plane of curvature (K), wherein the connecting pipe (4) has an inlet opening (10) for the airflow, wherein the connecting pipe (4) has an outlet opening (30) for the airflow, wherein the outlet opening (30) and the inlet opening (10) are oriented relative to each other such that the airflow in the connecting pipe (4) is deflected in the plane of curvature (K) by at least 70°, in particular by at least 80°, wherein the connecting pipe (4) has flow cross-sections (13, 23, 33) oriented perpendicular to a longitudinal centerline (50), wherein each Flow cross-section (13, 23, 33) an internal height (h1, h2) measured perpendicular to the plane of curvature (K).h3) having, wherein the connecting pipe (4) has a central flow cross-section (20) oriented perpendicular to the longitudinal centerline (50) at the midpoint between the inlet opening (10) and the outlet opening (30), wherein each flow cross-section (13, 23, 33) oriented perpendicular to the longitudinal centerline (50) has an inner width (b1, b2, b3) in a direction perpendicular to its inner height (h1, h2, h3), and wherein the inner height (h2) of the central flow cross-section (20) is greater than the inner width (b2) of the central flow cross-section (20), characterized in that the connecting pipe (4) has a tangential plane (T) which runs perpendicular to the plane of curvature (K) and which connects the inlet opening (10) at a first point of contact (P1) and the outlet opening (30) at a second point of contact (P2). affected that the first point of contact (P1) has a point distance (s) from the second point of contact (P2), that each flow cross-section (13, 23,33) of the connecting pipe (4) to the tangential plane (T) has a plane spacing measured perpendicular to the tangential plane (T), and that a maximum plane spacing (d) of all plane spacings of the flow cross-sections (13, 23, 33) to the tangential plane (T) is at least 25%, in particular at least 30%, in particular at least 35%, of the point spacing (s).
Owner:ANDREAS STIHL AG & CO KG

Tracking circuits for crossbar circuits

Described herein are techniques to enable tracking circuits for crossbar circuits. One embodiment provides an apparatus including a crossbar array comprising: a plurality of bit lines intersecting with a plurality of word lines; and a plurality of cross-point devices, wherein each of the cross-point devices is connected to at least one of the word lines and at least one of the bit lines; a read-out circuit selectively connected to at least one of the bit lines, wherein the read-out circuit is to generate an output representative of the memristor conductance; a tracking circuit comprising a first replica cell that emulates at least one of the cross-point devices, wherein the tracking circuit is to produce a reference voltage; and a converter configured to convert the output of the read-out circuit into a digital output or a pulse-width-modulated signal, wherein the reference voltage is provided to the converter as an input.
Owner:TETRAMEM INC

Large-scale crossbar arrays with reduced series resistance

Technologies for reducing series resistance are disclosed. An example method may include: forming a first layer on a temporary substrate; forming a second layer on the first layer; etching the first layer and the second layer to form a trench; electroplating a top electrode via the trench, wherein the top electrode partially formed on a top surface of the second layer; removing the first layer and the second layer; forming a curable layer on the temporary substrate and the top electrode; removing the temporary substrate from the curable layer and the top electrode; forming a cross-point device on the curable layer and the top electrode; forming a bottom electrode on the cross-point device; and forming a flexible substrate on the bottom electrode.
Owner:TETRAMEM INC

Neuromorphic system using memory array with cross-point structure

An object of the present invention is to provide a neuromorphic system including a synaptic unit capable of causing a gradual change in resistance for analog information processing, and an operating method therefor. In order to achieve the above object, an aspect of the present invention may provide a neuromorphic system including an input signal unit for generating an input signal, a synapse unit including a plurality of synaptic units that receive a signal of the input signal unit and cause a current to flow according to a set weight, an output signal unit for generating an output signal by receiving a current generated from the synapse unit, and a controller unit for controlling the input signal unit, the synapse unit, and the output signal unit, in which the input signal unit includes a digital-to-analog converter (DAC), the synaptic units include a plurality of memory cells that are connected to each other and are each capable of selectively storing a logic state, the plurality of memory cells are arranged in a cross-point structure including an input electrode line and an output electrode line that cross each other to form one or more memory arrays, the output signal unit includes an analog-to-digital converter (ADC), and the controller unit generates an analog input signal through the DAC in the input signal unit, allows the generated analog input signal to be applied to each of the plurality of memory cells included in the synaptic unit so that a current flows, and generates a sum of currents flowing from the plurality of memory cells as the output signal through the ADC in the output signal unit.
Owner:IHW INC

Memory comprising conductive ferroelectric material in series with dielectric material

A memory device including a three dimensional crosspoint memory array comprising a plurality of memory cells, wherein a memory cell of the plurality of memory cells comprises a conductive ferroelectric material and wherein the conductive ferroelectric material is in series with a dielectric material.
Owner:INTEL CORP

Enhanced capacitance touch screen display and methods for use therewith

A capacitive touch screen display operates by: receiving a plurality of sensed signals indicating variations in mutual capacitance associated with a plurality of cross points formed by a plurality of electrodes; generating capacitance image data associated with the plurality of cross points that includes positive capacitance variation data corresponding to positive variations of the capacitance image data from a nominal value and negative capacitance variation data corresponding to negative variations of the capacitance image data from the nominal value; determining, based on the positive capacitance variation data and the negative capacitance variation data, an upper threshold and a lower threshold; generating compensated capacitance image data, based on the upper threshold and the lower threshold; and processing the compensated capacitance image data to determine a proximal condition of the touch screen display.
Owner:SIGMASENSE LLC

Correction method for optical centering device of measurement base

The invention belongs to the technical field of measurement, and relates to a correction method for an optical centering device of a measurement base. A to-be-corrected base centering device is installed on the tripod and leveled; a limiter is installed on the top of the base to be corrected; two top cross rods perpendicular to each other are embedded in the top face of the limiting stopper, and the intersection point of the two top cross rods is located in the center of the top of the limiting stopper. Two bottom cross rods are arranged below the two top cross rods; the two bottom cross rods are vertically arranged, and the two bottom cross rods are respectively suspended right below the two top cross rods through equal-length vertical lines; under the action of gravity and a vertical line, the intersection position of the two bottom cross rods and the center of the limiting stopper are located on the same vertical line; and observing whether the central mark of the field of view of the centering device coincides with the cross point of the two bottom cross rods or not through the eyepiece of the centering device. The correction principle is simple and visual, the operation process is simple, correction can be achieved anytime and anywhere, and it is ensured that the centering performance of the reference centering device meets the requirement all the time.
Owner:HENAN SITONG ENG TESTING CO LTD

Cross-point array memory of high-density three-dimensional ferroelectric capacitor

The invention discloses a cross-point array memory of a high-density three-dimensional ferroelectric capacitor, and belongs to the field of semiconductor memories. According to the invention, a horizontal BL / vertical WL cross-point array type three-dimensional ferroelectric memory architecture is designed by utilizing the three-dimensional stacking capability and the character / bit line symmetry characteristic of the cross-point array type three-dimensional ferroelectric memory, and compared with the traditional vertical BL / horizontal WL type three-dimensional memory architecture, the cross-point array type three-dimensional ferroelectric memory architecture has the advantages that the structure is simple; according to the invention, the influence of the limitation of signal margin on the extension of the three-dimensional ferroelectric memory in the vertical direction is eliminated, so that the three-dimensional cross-point array type ferroelectric memory is supported to realize the stacking of higher layers, and the bit density potential is ultrahigh.
Owner:BEIJING SUPERSTRING ACAD OF MEMORY TECH +1

Cross-point magnetoresistive memory array containing selector rails and method of making the same

A method of forming a memory device includes forming vertical stacks each including a respective first electrically conductive line and a respective selector rail over a substrate, such that the vertical stacks laterally extend along a first horizontal direction and are laterally spaced apart from each other along a second horizontal direction, forming magnetic tunnel junction material layers over the vertical stacks, and patterning the magnetic tunnel junction material layers and an upper portion of each of the selector rails to form a two-dimensional array of magnetic tunnel junctions and periodic notches at least in an upper portion of each of the selector rails.
Owner:SANDISK TECHNOLOGIES LLC

Selector-only memory write operations

Techniques for programming selector-only memory cells in a cross-point memory structure. The threshold switch memory element may include, but is not limited to, a bi-directional threshold switch (OTS). The memory system removes the Vth drift of the threshold switch memory element prior to programming. The Vth drift is removed by applying a first voltage and a second voltage having opposite polarities to all of the SOM cells to be programmed. Then, two programming voltages having two polarities are applied to program the cell into two states.
Owner:SANDISK TECH

Multidirectional sliding large displacement frictional damping device

The utility model discloses large displacement friction damping device of multidirectional sliding, including first friction plate and second friction plate, second friction plate all sets up between two first friction plates, first friction plate all is cross -shaped, and the cross point position of cross -shaped is equipped with first friction piece, and four end portions all are first anchor nail connecting part for first anchor nail of wearing and setting, every second friction plate all is circular, and the position of the center of a circle coincides with the cross point position of all cross -shaped on a straight line, and the periphery annularly distributes second anchor nail connecting part for second anchor nail of wearing and setting, and every second anchor nail connecting part distance corresponding one side any first friction plate's two first anchor nail connecting part is equal, and the first anchor nail connecting part of a straight line arrangement is connected with same first anchor nail, and all second anchor nail connecting parts of a straight line arrangement all are connected with same second anchor nail. The utility model has the construction form of playing the damping effect in each direction of horizontal plane, can realize the effect of bridge in longitudinal and transverse isolation.
Owner:SHANGHAI URBAN CONSTRUCTION DESIGN & RESEARCH INSTITUTE (GROUP) CO LTD