13336results about How to "Large capacity" patented technology

The bypass network is designed to provide fast access and high quality streaming media services anywhere anytime. There are five major components including Peering Gateway, Content Locator, Edge Server, Gateway and Client. The whole bypass network is divided into number of self-managed sub-networks, which are referred as local networks in this document. Each local network contains Edge Servers, gateways, and a Content Locator. The Edge Servers serve as cache storage and streaming servers for the local network. The gateways provide a connection point for the client computers. Each local network is managed by a Content Locator. The Content Locator handles all client requests by communicating with the Peering Gateway and actual web sites, and makes the content available on local Edge Servers. The Content Locator also balances the load on each Edge Server by monitoring the workload on them. One embodiment is designed for home users whose home machine does not move around frequently. A second embodiment is designed for business users who travel around very often where the laptops would self-configure as a client of the network.

An electric wheeled apparatus comprises a main body, at least one wheel supported by the main body in a rotatable manner; an electric motor configured to apply torque to the at least one wheel, a battery interface configured to removably receive at least one battery pack which is originally designed as a power source of an electric power tool, and an electric circuit unit configured to electrically connect the at least one battery pack attached to the battery interface with the electric motor.

When programming a contiguous page of memory storage units, every time a memory storage unit has reached its targeted state and is program-inhibited or locked out from further programming, it creates a perturbation on an adjacent memory storage unit still under programming. The present invention provides as part of a programming circuit and method in which an offset to the perturbation is added to the adjacent memory storage unit still under programming. The offset is added as voltage offset to a bit line of a storage unit under programming. The voltage offset is a predetermined function of whether none or one or both of its neighbors are in a mode that creates perturbation, such as in a program inhibit mode. In this way, an error inherent in programming in parallel high-density memory storage units is eliminated or minimized.

A runtime adaptable search processor is disclosed. The search processor provides high speed content search capability to meet the performance need of network line rates growing to 1 Gbps, 10 Gbps and higher. The search processor provides a unique combination of NFA and DFA based search engines that can process incoming data in parallel to perform the search against the specific rules programmed in the search engines. The processor architecture also provides capabilities to transport and process Internet Protocol (IP) packets from Layer 2 through transport protocol layer and may also provide packet inspection through Layer 7. Further, a runtime adaptable processor is coupled to the protocol processing hardware and may be dynamically adapted to perform hardware tasks as per the needs of the network traffic being sent or received and / or the policies programmed or services or applications being supported. A set of engines may perform pass-through packet classification, policy processing and / or security processing enabling packet streaming through the architecture at nearly the full line rate. A high performance content search and rules processing security processor is disclosed which may be used for application layer and network layer security. Scheduler schedules packets to packet processors for processing. An internal memory or local session database cache stores a session information database for a certain number of active sessions. The session information that is not in the internal memory is stored and retrieved to / from an additional memory. An application running on an initiator or target can in certain instantiations register a region of memory, which is made available to its peer(s) for access directly without substantial host intervention through RDMA data transfer. A security system is also disclosed that enables a new way of implementing security capabilities inside enterprise networks in a distributed manner using a protocol processing hardware with appropriate security features.

A method of manufacturing a charge storage device is provided. Utilizing the capacity for a precise control of the thickness and the silicon content of a deposited film in an atomic layer deposition process, a stacked gradual material layer such as a hafnium silicon oxide (HfxSiyOz) layer is formed. The silicon content is gradually changed throughout the duration of the HfxSiyOz deposition process. The etching rate for the HfxSiyOz layer in dilute hydrogen fluoride solution is dependent on the silicon content y in the HfxSiyOz layer. The sidewalls of the stacked gradual material layer are etched to form an uneven profile. The lower electrode, the capacitor dielectric layer and the upper electrode are formed on the uneven sidewalls of the stacked gradual material layers, the area between the lower electrode and the upper electrode is increased to improve the capacitance of the charge storage device.

A WiMAX network and communication method, the network including a plurality of WiMAX nodes deployed in micro or pico cells for providing access service to a plurality of mobile subscribers, a plurality of these nodes being arranged in a cluster, one of the nodes in each cluster being a feeder node coupled to a core network, the nodes in each cluster being coupled for multi-hop transmission to the feeder node. According to a preferred embodiment, each node includes a transceiver with associated modem, an antenna arrangement coupled to the modem and arranged for multiple concurrent transmissions, and a MAC controller for controlling the transceiver, modem and antenna arrangement for providing both access and backhaul communication.

A method for reducing source line bias is accomplished by read / write circuits with features and techniques for multi-pass sensing. When a page of memory cells are being sensed in parallel, each pass helps to identify and shut down the memory cells with conduction current higher than a given demarcation current value. In particular, the identified memory cells are shut down after all sensing in the current pass have been completed. In this way the shutting down operation does not disturb the sensing operation. Sensing in subsequent passes will be less affected by source line bias since the total amount of current flow is significantly reduced by eliminating contributions from the higher current cells. In another aspect of sensing improvement, a reference sense amplifier is employed to control multiple sense amplifiers to reduce their dependence on power supply and environmental variations.

A sensing module operates with a sense amplifier sensing a conduction current of a memory cell via a coupled bit line under constant voltage condition in order to minimize bit-line to bit-line coupling. The rate of discharge of a dedicated capacitor as measured by a change in the voltage drop there across in a predetermined period is used to indicate the magnitude of the conduction current. The voltage cannot drop below a minimum level imposed by a circuit for maintaining the constant voltage condition on the bit line. A voltage shifter is used to boost the voltage during the discharge and to unboost the voltage after the discharge, so that the change in voltage drop properly reflects the rate of discharge without running into the minimum level.

Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement. The carrier may be of the same material as the chip stacks to match coefficients of thermal expansion. High-density circuit packages may also be in the form of removable memory modules in generally planar or prism shaped form similar to a pen or as a thermal conduction module.

A charging control unit decides the number of battery cells on the basis of an output voltage of a battery pack, and an output voltage of a charging circuit is determined in accordance with the decided number of battery cells. Even though supply of an external power supply is detected, when a battery connection is not detected, the power supply circuit of the charging control unit is set in a stop state. In addition, when disconnection of the battery is detected, a canceling voltage for canceling a cutoff state caused by overdischarging of the battery is output. In a power supply device for a portable terminal, a capacitor electrically charged by an output voltage of main DC / DC converter is connected as an auxiliary power supply of a backup DC / DC converter to make exchange of the auxiliary battery unnecessary.

A signal transmission system including: a first connector apparatus, and a second connector apparatus that is coupled with the first connector apparatus. The first connector apparatus and the second connector apparatus are coupled together to form an electromagnetic field coupling unit, and a transmission object signal is converted into a radio signal, which is then transmitted through the electromagnetic field coupling unit, between the first connector apparatus and the second connector apparatus.

A services provision system provides information services over one or more communications networks and has a software infrastructure divided into domains. Each domain has an intelligent software agent and this community of agents sits in a computing environment represented in each domain by a DPE kernel. The community of agents co-operates to provide service and service management functionality to a user. At least one of the agents is reconfigurable to change the functionality the system makes available. Reconfigurability is based on the use of a plurality of reusable software modules, the agent reconfiguring by selecting a new combination of modules. The software modules themselves incorporate rules, or policies, which determine process steps offered by the modules at run-time. These policies are external to the modules and may be loaded at run-time, allowing dynamic modification to functionality of the system. The system as a whole offers functionality associated with using services, providing them and managing them and the reconfigurability allows it to offer the different types of functionality in an efficient way. It also allows access control to functionality at different levels with particularly good security against fraudulent use.

Source line bias is an error introduced by a non-zero resistance in the ground loop of the read / write circuits. During sensing the control gate voltage of a memory cell is erroneously biased by a voltage drop across the resistance. This error is minimized when the current flowing though the ground loop is reduced. A method for reducing source line bias is accomplished by read / write circuits with features and techniques for multi-pass sensing. When a page of memory cells are being sensed in parallel, each pass helps to identify and shut down the memory cells with conduction current higher than a given demarcation current value. In this way, sensing in subsequent passes will be less affected by source line bias since the total amount of current flow is significantly reduced by eliminating contributions from the higher current cells.

A method for automatic scaling the processing capacity and bandwidth capacity of a network includes providing a network comprising a plurality of traffic processing units and a plurality of network links. Next, providing monitoring means for monitoring processing capacity demand and bandwidth capacity demand of the network. Next, providing managing means for adding traffic processing units to the network, removing traffic processing units from the network, connecting links to the network and disconnecting links from the network. Next, monitoring processing capacity demand and bandwidth capacity demand of the network via the monitoring means and then dynamically adjusting processing capacity of the network by selectively adding or removing traffic processing units in the network via the managing means upon observation of processing capacity demand increase or processing capacity demand decrease, respectively. The method also includes dynamically adjusting bandwidth capacity of the network by selectively connecting or disconnecting links in the network via the managing means upon observation of bandwidth capacity demand increase or bandwidth capacity decrease, respectively.

The invention provides a device for filtering emboli from blood flowing through a lumen defined by the walls of a vessel in a patient's body comprising a filter element. The filter is expandable from a collapsed configuration when the filter element is restrained to an expanded configuration when the filter element is unrestrained, and the filter element comprises a self-expanding material having pores. When the filter element is in the expanded configuration, the average pore size is from 30 to 300 microns and the standard deviation of the pore size is less than 20 percent of the average pore size.

An ultra-high-density vertical cross-point array comprises a plurality of horizontal line layers having horizontal lines interleaved with a plurality of vertical lines arranged in rows and columns. The vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each consecutive pair of horizontal lines in each horizontal line layer. Each vertical line comprises a center conductor surrounded by a single or multi-layered memory film. Accordingly, when interleaved with the horizontal lines, two-terminal memory cells are integrally formed between the center conductor of each vertical line and each crossing horizontal line. By configuring the vertical and horizontal lines so that a row of vertical lines is positioned between each consecutive pair of horizontal lines, a unit memory cell footprint of just 2F2 may be realized.