48 results about "Line rate" patented technology

A first ratio of a sending rate limit to a full line rate for a link in the computing network is accessed. A second ratio of a sending window size to W_max for the link is accessed. W_max is the maximum allowed window size or the window size that utilizes an end-to-end path for the link. One or more of the first or second ratio is used to determine an amount to reduce the sending rate or window for the link in response to an indication of network congestion in the link.

The invention provides a high-precision trigger signal and ADC sampling data alignment method and device, and the method comprises the steps: inputting a serial trigger signal to a high-speed transceiver, converting the serial trigger signal into parallel trigger data through the high-speed transceiver based on a line rate and a user data bit width, and outputting user data and a corresponding user clock frequency; performing parallel edge detection on the user data, and identifying an edge detection result; and synchronizing parallel trigger data comprising the user data and the edge detection result in the user clock domain to an ADC clock domain, and synchronizing the edge detection result in the parallel trigger data based on a matching result of the parallel trigger data and the sampling rate of the ADC and the edge detection result in the synchronized parallel trigger data. And determining a target trigger signal matched with the sampling data point time of the ADC from the user data, and aligning the target trigger signal with the ADC sampling data, thereby realizing accurate alignment of the external trigger signal and the high-speed ADC sampling data.

A system for AI-supported cybersecurity and regulatory compliance in energy distribution networks, consisting of: a hardware-embedded data acquisition module configured to intercept, capture, and time-stamp operational data streams and to control data traffic from SCADA (Supervisory Control and Data Acquisition) systems, AMI (Advanced Metering Infrastructure) systems, and energy management systems (EMS) via multiple communication protocols without operational latency; an FPGA-based deep packet inspection unit coupled with the data acquisition module, wherein the FPGA firmware is configured to perform line rate filtering, protocol decomposition and metadata extraction of the acquired data and forwards preprocessed packet data to an AI processing unit; an AI processing unit consisting of a multi-core central processing unit (CPU), a dedicated AI accelerator selected from a graphics processing unit (GPU) or a tensor processing unit (TPU), and a volatile memory buffer; a response orchestration module that is communicatively coupled with network management devices and operations controllers, wherein the response orchestration module is configured to perform automated security and compliance remediation measures, including network isolation of compromised segments, enforcement of protocol encryption, and privilege revocation; and an immutable audit logging subsystem configured to record all detected events, compliance assessments, and corrective actions in a blockchain-based distributed ledger, with each log entry cryptographically anchored with a secure hash value and digitally signed with keys stored in a secure hardware enclave.

Disclosed are systems, apparatuses, methods, and computer-readable media for line rate inspection of hypertext transfer protocol (HTTP) content in a network appliance. A method includes: receiving packets in a data center that are in transit to an application programming interface (API) endpoint of an application; analyzing content in an HTTP request in each packet for malicious content; and dropping at least one packet based on identification of the malicious content in the content. The systems and apparatuses can inspect HTTP at line rate based on the disclosed analyses.

A first ratio of a sending rate limit to a full line rate for a link in the computing network is accessed. A second ratio of a sending window size to W_max for the link is accessed. W_max is the maximum allowed window size or the window size that utilizes an end-to-end path for the link. One or more of the first or second ratio is used to determine an amount to reduce the sending rate or window for the link in response to an indication of network congestion in the link.

Storage arrays include inline compression hardware that can simultaneously implement multiple compression levels at line rate. For each compression level, compression efficiency is inversely related to processing efficiency. A compression level is dynamically selected for segments of replication data based on one or more of compression hardware utilization, network utilization, network latency, data compressibility, and IO size. The compression hardware utilization may be maintained at or near full utilization. Extents of data of a replica are analyzed based on compressibility. Replication data that resides in an extent of relatively incompressible data, or that is associated with a relatively small IO, may be compressed using a compression level characterized by greater processing efficiency.

The invention provides a self-adaptive rate identification method for an SDH (Synchronous Digital Hierarchy) optical interface, which comprises the following steps of: setting a line rate equal to an optical interface rate at an optical transmitting end, using the same reference clock and the same data bit width for different interface rates, and then framing and scrambling; in an optical receiving end processing module, SDH code stream data is subjected to clock domain crossing processing, then cyclic sorting and frame header searching are carried out, the number of bytes is counted with a frame header searching success flag bit as a starting point, the number of bytes is used for judging the frame format of the SDH data code stream, then the line rate corresponding to the frame format is confirmed, and the optical interface rate is judged. According to the method, the optical interface rate, the line rate, the cross-clock processing, the local clock, the line clock and the frame format are subjected to association mapping at the optical transmitting end and the optical receiving end, four optical interface rates can be accurately identified at low cost by using one set of program, and the problems in the prior art are well solved.

The application discloses a kind of multi direct current charging pile adaptive on-line method, belong to direct current charging pile technical field, comprising: the charging pile needing on-line is connected, and on-line mode is set;The charging pile of on-line respectively carries out self-checking;If charging pile self-checking is normal, then execute joint self-checking;When the charging pile passing joint self-checking fails, execute fault strategy;When on-line power exceeds charging gun gun line rated power, limit the maximum output power of charging gun;The multi direct current charging pile adaptive on-line method, when current single machine output power cannot satisfy the demand of car end, broadcast to find whether there is idle power module for use in on-line pile;After on-line parameter setting is completed, self-broadcast constructs on-line topology, improves single machine output power, on the basis of guaranteeing charging safety and reliability, idle power module of on-line charging pile is reasonably called, effectively improves charging efficiency.

Techniques for detecting duplicate data flows. A data packet of a data flow is received by computer hardware the data packet having a first five tuple, an ingress interface and a VLAN tag. Data is sent to a central processing unit. The central processing unit installs policy tiles into a policy tile database of the computer hardware, the policy tiles including the first five tuple, the first ingress interface and the first VLAN tag. A second data packet is received and compared with the policy tiles in the policy tile database. If the second data packet has the same five tuple as the first data packet but has either a different ingress interface or a different VLAN tag, then the second data packet is determined to be a duplicate of the first data flow and is dropped.

Techniques for detecting duplicate data flows. A data packet of a data flow is received by computer hardware the data packet having a first five tuple, an ingress interface and a VLAN tag. Data is sent to a central processing unit. The central processing unit installs policy tiles into a policy tile database of the computer hardware, the policy tiles including the first five tuple, the first ingress interface and the first VLAN tag. A second data packet is received and compared with the policy tiles in the policy tile database. If the second data packet has the same five tuple as the first data packet but has either a different ingress interface or a different VLAN tag, then the second data packet is determined to be a duplicate of the first data flow and is dropped.

The invention relates to a network registration method and device, electronic equipment and a storage medium. The network registration method comprises: in response to a determined target event, determining a reason value corresponding to the target event, the reason value having a corresponding relationship with an occurrence reason of the target event, and different reason values being used for representing different occurrence reasons of the target event; in response to the fact that the reason value is the first reason value, the first reason value is mapped into a second reason value, the occurrence reason corresponding to the first reason value is the occurrence reason of the first type, and the terminal cannot perform next network registration under the condition that the terminal corresponds to the occurrence reason of the first type. The occurrence reason corresponding to the second reason value is the occurrence reason of a second type, and the terminal can perform next network registration under the condition that the terminal corresponds to the occurrence reason of the second type; and controlling the terminal to perform next network registration based on the second reason value. Through the network registration method provided by the embodiment of the invention, the online rate of the terminal can be improved.

Systems, methods, and devices that perform computing operations are provided. In one example, a system includes a least one node, the at least one node having one or more processors, each having associated memory, a clock, a scheduler, the scheduler monitoring one or more of rates, rates of lanes, rates at which packets are sent, times, latencies of packets, topology, communication states, nodes, and packets in the system, an attribute monitor that measures counters for one or more of congestion state, line rate, and communication attributes. A packet scheduler determines a destination node based on information from the scheduler and the attribute monitor, and sends at least a portion of a packet to the destination node.

The application provides a kind of SDH optical interface adaptive rate identification method, the line rate equal to optical interface rate is set in optical transmitting terminal, different interface rate uses same reference clock and same data bit width, then framing and scrambling are carried out;In optical receiving terminal processing module, after cross-clock domain processing of SDH code stream data, cyclic ordering, frame header search are carried out, use byte number to judge SDH data code stream frame format with frame header search success flag bit as starting point to count byte number, then confirm corresponding line rate, so as to determine what kind of optical interface rate, the application associates mapping of optical interface rate, line rate, cross-clock processing, local clock, line clock, frame format in optical transmitting terminal and optical receiving terminal, four kinds of optical interface rate can be accurately identified at low cost by using a set of procedures, which solves the problems existing in prior art.

The invention relates to the field of RapidIO switching networks, and provides a RapidIO line rate dynamic configuration method and a switching network system.The method comprises the steps that an RIO management node conducts link scanning on an FPGA node, and when the link state is poor, a RapidIO line rate dynamic configuration instruction is issued to the FPGA node; and after the FPGA node receives the instruction for dynamically configuring the RapidIO line rate, the RapidIO line rate dynamic configuration is started. According to the method, the link state is detected in real time through the RIO management node, when the link state is not good, the FPGA node is started to dynamically configure the RapidIO line rate in an instruction issuing mode, the problem that the link state of the FPGA node is not good is solved, normal communication of the RapidIO switching network can be effectively guaranteed, and software is easy to achieve.

The present invention relates to a method for monitoring and debugging multi-threaded network equipment, comprising the following steps: monitoring the CPU usage rate of each network protocol thread / process of the system, obtaining the baseline rate, upper limit rate, lower limit rate, and current usage rate through an artificial intelligence algorithm; issuing an alarm if the current usage rate is higher than the upper limit rate or lower than the lower limit rate; performing performance diagnosis, notifying each protocol thread / process to perform performance detection and report the results, analyzing the results, and combining the artificial intelligence algorithm to obtain a stable baseline performance, upper limit performance, and current execution performance. When the execution performance of a certain protocol thread / process is lower than the lower limit, the current resource usage status of the protocol thread / process is analyzed and repaired, and then an alarm is issued. As a result, when a network device has problems in network operation, the problem can be quickly located and the pain point solved. It can be realized to diagnose the execution performance of each network protocol thread / process.

Some embodiments of the invention provide a forwarding element (e.g., a switch, a router, etc.) that has one or more data plane, message-processing pipelines with key-value processing circuits. The forwarding element's data plane key-value circuits allow the forwarding element to perform key-value services that would otherwise have to be performed by data compute nodes connected by the network fabric that includes the forwarding element. In some embodiments, the key-value (KV) services of the forwarding element and other similar forwarding elements supplement the key-value services of a distributed set of key-value servers by caching a subset of the most commonly used key-value pairs in the forwarding elements that connect the set of key-value servers with their client applications. In some embodiments, the key-value circuits of the forwarding element perform the key-value service operations at message-processing line rates at which the forwarding element forwards messages to the data compute nodes and / or to other network forwarding elements in the network fabric.

This application discloses a clock configuration system and method. It includes: a clock generation circuit and a communication module; the communication module includes a configuration unit, a clock management unit, and a communication circuit; the clock generation circuit is connected to the clock management unit in the communication module; the clock management unit is connected to the communication circuit; the communication circuit is connected to the configuration unit; the clock generation circuit provides a reference clock to the communication module; the configuration unit configures the line rate and data bit width of data transmission in the communication circuit, determines a clock division factor based on the line rate and the data bit width, and configures the clock division factor in the clock management unit; the clock management unit determines the operating clock frequency based on the reference clock and the clock division factor, and provides the operating clock frequency to the communication circuit. Determining the operating clock frequency by configuring the line rate and data bit width reduces the complexity of clock configuration in the communication module.

The invention provides a RapidIO line rate adaptive matching method and a switching network system. The method comprises the following steps: detecting a link establishment signal Linkinit; and when the link building signal Linkinit is invalid, line rate matching between the FPGA node and the RapidIO exchange chip is automatically completed based on line rate traversal. Through a line rate traversal matching mode of the FPGA node and the RapidIO exchange chip, the problem that in a traditional design, multiple different RapidIO line rates of the RapidIO port of the exchange chip are matched by compiling multiple FPGA software versions is solved, the system development integration efficiency is improved, and software is easy to implement.

The invention discloses a line rate safety adaptive negotiation method based on an Aurora protocol, which comprises the following steps of: when the line rate of a satellite load is switched or a link between ground detection equipment and the load is interrupted due to unstable hardware connection, firstly stopping transmitting and receiving data, and switching the Aurora line rate to the highest grade by dynamically reconfiguring a port; and then resetting the channel, if the high-speed transceiver successfully synchronizes and establishes a link successfully, starting to transmit and receive data, and if the high-speed transceiver fails to synchronize within a certain time, reducing a gear Aurora line rate to wait for the high-speed transceiver to synchronize again. According to the line rate safety adaptive negotiation method based on the Aurora protocol, safety adaptive adjustment of the line rate based on the Aurora protocol is achieved, links are reconnected under the condition that FPGA does not need to be reconfigured, the test process of ground detection equipment is simplified, the test efficiency is improved, meanwhile, data sending is stopped when link linkage is unstable, and the test efficiency is improved. And the reliability of the ground detection equipment on the satellite load flow test is improved.

The invention relates to a method and device for determining the maximum photovoltaic bearing capacity of a line and computer equipment. The method comprises the following steps: acquiring line temperature and environment information of a target phase in a target line; the target phase is any phase in the target line; determining a dynamic line rated current value of the target phase according to the line temperature and the environment information; and determining the maximum photovoltaic bearing capacity of the target phase according to the rated current value of the dynamic line. The method can improve the utilization rate of photovoltaic resources.

A first ratio of a sending rate limit to a full line rate for a link in the computing network is accessed. A second ratio of a sending window size to W_max for the link is accessed. W_max is the maximum allowed window size or the window size that utilizes an end-to-end path for the link. One or more of the first or second ratio is used to determine an amount to reduce the sending rate or window for the link in response to an indication of network congestion in the link.

The invention discloses a power grid metering automatic operation and maintenance management method and system, terminal equipment and a storage medium. The method comprises the following steps: acquiring a first number of to-be-managed power grid terminals, initial terminal acquisition data, terminal position coordinates, initial operation and maintenance personnel states, operation and maintenance personnel position coordinates and initial work order states; taking the terminal corresponding to the first work order of which the current work order state is to be processed as a first terminal; taking the operation and maintenance personnel of which the current operation and maintenance personnel state is idle as first operation and maintenance personnel; calculating a first distance according to the operation and maintenance personnel position coordinates and the terminal position coordinates; distributing the first work order to the first operation and maintenance personnel according to the sequence of the first distances from small to large, and updating the current terminal acquisition data, the current operation and maintenance personnel state and the current work order state; judging whether the data acquired by the current terminal is complete; if yes, the terminal online rate is calculated; and marking the terminal online rate on a preset power grid map. According to the invention, the operation and maintenance management efficiency of the power grid is improved.

The invention provides a data transmission method, device and equipment, and the method comprises the steps: responding to a target instruction, carrying out the configuration of a clock chip in a digital-to-analog conversion system based on the target instruction, generating a target clock, enabling the target instruction to be used for indicating the change of the current sampling rate in the digital-to-analog conversion system to a target sampling rate, and enabling the current sampling rate to be equal to the target sampling rate; the target clock is matched with a target sampling rate; interface parameters of a channel configurable interface in the digital-to-analog conversion system are configured based on a target instruction, the interface parameters comprise the number of interface channels, and the number of the configured interface channels is matched with a target sampling rate; modifying a line rate and a channel number of a core in the channel configurable interface based on an interface parameter and a target clock; and transmitting sampling data of the digital-to-analog conversion system based on the channel configurable interface after parameter adjustment. According to the data transmission method, the number of interface channels can be dynamically adjusted according to the change of the system sampling rate, and then the data transmission rate is adjusted.

The present application relates to the field of RapidIO switching network, and provides a RapidIO line rate dynamic configuration method and a switching network system, the method comprising: a RIO management node performing link scanning on an FPGA node, and issuing a dynamic configuration RapidIO line rate instruction to the FPGA node when the link state is poor; after the FPGA node receives the dynamic configuration RapidIO line rate instruction, starting the dynamic configuration of the RapidIO line rate. The present application detects the link state in real time through the RIO management node, and when the link state is poor, starts the dynamic configuration of the RapidIO line rate of the FPGA node through the instruction issuing mode, solves the problem of poor link state of the FPGA node, can effectively ensure the normal communication of the RapidIO switching network, and is simple in software implementation.

Disclosed are systems, apparatuses, methods, and computer-readable media for line rate inspection of hypertext transfer protocol (HTTP) content in a network appliance. A method includes: receiving packets in a data center that are in transit to an application programming interface (API) endpoint of an application; analyzing content in an HTTP request in each packet for malicious content; and dropping at least one packet based on identification of the malicious content in the content. The systems and apparatuses can inspect HTTP at line rate based on the disclosed analyses.

A network switch testing device and a method for testing at least one network switch involve a central processing unit (CPU), an acceleration port that can be enabled with internal loopback and an access control list, and at least one transmission port connectable with at least one to-be-tested transmission port of the to-be-tested network switch(es). The acceleration port and the transmission port(s) are set to the same virtual local area network (VLAN). The CPU transmits at least one packet to the acceleration port. The acceleration port circulates therein the packet(s) through internal loopback and according to the access control list to make the packet(s) reach a predetermined line rate, and transmits the predetermined-line-rate-reaching packet(s) to the transmission port(s) through VLAN's flooding mechanism. The transmission port(s) transmits the predetermined-line-rate-reaching packet(s) to the to-be-tested transmission port(s). The CPU stops the transmission port(s) from transmitting the packet(s) when the testing time ends.

The invention discloses a multi-channel communication synchronization method and system based on a high-speed serial bus, and the synchronization method comprises the steps: enabling a multi-channel high-speed serial bus to be connected with a plurality of devices to form a star topology, configuring the communication specifications of serializers, enabling the communication specifications of the serializers to be consistent, and enabling the phases between codes to be synchronous; realizing communication link establishment between the receiving end and the transmitting end through bit alignment and frame alignment; wherein the frame alignment comprises measuring a random phase of a recovery clock of a receiving end; performing phase modulation on a recovery clock of the receiving end according to the random phase to obtain a synchronous clock; after receiving the command frame, the receiving end converts the data to a synchronous clock domain for processing; wherein the inter-channel synchronization takes a reference clock of a sending end as a reference, and the synchronization precision is the time corresponding to the reciprocal of the line rate of the high-speed serial bus. The use of connection resources can be reduced, equipment expansion is facilitated, and the space utilization rate is improved; and meanwhile, high data throughput and high synchronism among branch nodes are realized.

This invention discloses a transceiver node identification and link rate configuration method for a plastic fiber optic multi-node bus, comprising: extracting the first threshold crossing time, pulse peak amplitude attenuation, and first echo arrival interval from training pulses to form a node response feature group, thereby improving the distinguishability of the physical response of multiple nodes; generating a node identification tag sequence through a hierarchical index matrix and unique landing points, thereby improving the node sorting stability; dividing rate groups by hierarchical intervals and determining the target link rate within a group by combining the number of error codes and the location of error code distribution, thereby reducing the constraint of low-quality nodes on the overall line rate; and suppressing node drift and misconfigured rates through confirmation pulse verification, tag rearrangement, and rate resetting after rate switching, thereby improving the identification accuracy and link transmission stability of the plastic fiber optic multi-node bus.

A network switch testing device and a method for testing at least one network switch involve a central processing unit (CPU), a first acceleration port, a second acceleration port, and at least one transmission port connectable with at least one to-be-tested transmission port of at least one to-be-tested network switch. The first and second acceleration ports and the at least one transmission port are set to the same virtual local area network (VLAN). The CPU transmits at least one packet to the first acceleration port. The first and second acceleration ports use internal loopbacks and VLAN's flooding mechanism to make the packet(s) reach a predetermined line rate, and transmit the predetermined-line-rate-reaching packet(s) to the at least one transmission port. The at least one transmission port transmits the predetermined-line-rate-reaching packet(s) to the to-be-tested transmission port(s), and the CPU stops the transmission port(s) from transmitting the packet(s) when the testing time ends.

The present disclosure relates to a NIC line rate hardware packet processing. A packet processing method includes: searching a first matching action table on a network interface card (NIC) for a received packet; in response to finding a matching entry indicating an action, queuing the received packet in a first queue and storing the action data in an instruction memory; and in response to not finding a matching entry, queuing the received packet in the first queue and a second queue. The method includes: selecting a first packet from the first queue for processing, the processing including executing a corresponding action stored in the instruction memory; selecting a second packet from the second queue for processing, the processing including forwarding a portion of the second packet to a processor, the processor searching in a second matching action table; and receiving a search result from the processor, thereby allowing a third packet in the first queue corresponding to the second packet to be processed based on the search result.