415 results about "Frequency ratio" patented technology

A system that produces a haptic effect and generates a drive signal that includes at least two haptic effect signals each having a priority level. The haptic effect is a combination of the haptic effect signals and priority levels. The haptic effect may optionally be a combination of the two haptic effect signals if the priority levels are the same, otherwise only the haptic effect signal with the highest priority is used. The frequency of haptic notifications may also be used to generate a drive signal using foreground and background haptic effect channels depending on whether the frequency ratio exceeds a foreground haptic effect threshold.

A system that produces a haptic effect and generates a drive signal that includes at least two haptic effect signals each having a priority level. The haptic effect is a combination of the haptic effect signals and priority levels. The haptic effect may optionally be a combination of the two haptic effect signals if the priority levels are the same, otherwise only the haptic effect signal with the highest priority is used. The frequency of haptic notifications may also be used to generate a drive signal using foreground and background haptic effect channels depending on whether the frequency ratio exceeds a foreground haptic effect threshold.

A semi-passive radio frequency identification (RFID) tag being coupled to a battery providing a battery voltage for powering a part of the circuitry of the RFID tag includes an RF communication block receiving and transmitting RF signals, a sensor block including a frequency ratio digitizing temperature sensor for alternately measuring the ambient temperature and the battery voltage, and a control logic block in communication with the RF communication block and the sensor block. The control logic controls the operation of the RF communication block and the sensor block and stores temperature and voltage measurement data generated by the sensor block. In one embodiment, the control logic block of the RFID tag operates based on a system clock and the sensor block provides a reference clock to the control logic block for use in calibrating the system clock of the control logic block.

One embodiment of the present invention provides a method for facilitating asymmetric line rates in an Ethernet passive optical network (EPON) which includes a central node and at least one remote node. During operation, the system provides a downstream code-group clock, wherein each cycle thereof corresponds to a code group transmitted from the central node to a remote node. The system also provides an upstream code-group clock, wherein each cycle thereof corresponds to a code group received at the central node from a remote node. In addition, the system provides a multi-point control protocol (MPCP) clock, wherein the frequency ratio of the MPCP clock to the downstream code-group clock is different from the frequency ratio of the MPCP clock to the upstream code-group clock, thereby allowing the downstream transmission to be performed at a faster line rate than the upstream transmission line rate.

The present invention provides a silica fine particle capable of preventing a charging member or an image bearing member from being contaminated with toner when the toner contains the particle and also capable of providing the toner with a stable developing property. The silica fine particle of the present invention has been hydrophobic treated. Furthermore, the particle has a peak in a range of 0.04 μm to 1 μm and a peak in the range of 1 μm to 100 μm in a volume-basis particle diameter distribution. The particle has a frequency ratio of 10 to 80% for the particles with a particle diameter of 0.04 μm to 1 μm to a total of all the peaks, and the particles has the frequency ratio of less than 16% for the particles with a particle diameters of 20 μm to 2000 μm to the total of all the peaks.

The system has a control center, a time master device and a plurality of distributed, time slave field devices in synchronization with a master clock of the time master device. The time master device periodically transmits a time distribution data unit. Each time slave field device has a timer adjustment element, a fixed rate clock and a variable clock. The timer adjustment element calculates a frequency ratio between the master clock and the fixed rate clock and uses the frequency ratio to calculate adjustment coefficients to adjust a local sense of time for each field device, such that a time stamp of each field device is synchronized to the master clock.

Asynchronous sampling rate converter with input / output frequency ratio estimation and polyphase filtering uses FIFO level feedback to adaptively control frequency ratio estimation.

The invention relates to a device and a method for temperature compensation via the determination of cut-angles of a master and a slave crystal (mc, sc) employed in a master and slave oscillator (m, s). When the master and the slave oscillator (m, s) have been tuned to their center frequencies (fc_m, fc_s), then the temperature characteristic of the slave oscillator (s) is actively detuned with respect to the temperature characteristic of the master oscillator (m). In a detuned state a frequency ratio parameter (n_s) of the slave to the master output frequency (f_s / f_m) is determined and the cut-angle is determined by using this parameter (n_s) to read out the cut-angle dependent on the temperature (T) from a memory (MEM). The invention also relates to a temperature compensation device and method where two crystals of different cut-angles are used and a frequency ratio parameter is determined to determine the identity / symmetry or difference of the cut-angles. Particular useful applications of the invention are in dual-mode mobile telephones which require the use of at least two oscillators with different resonant frequencies.

A refrigerant system is provided with at least one variable frequency drive. In the past, the variable frequency drives were operable such that the voltage-to-frequency ratio remained constant regardless of operation. The present invention realizes that variations in the voltage-to-frequency ratio may be desirable, and the refrigerant system control drives the motors associated with relevant refrigerant system components to reach an optimum voltage-to-frequency ratios in order to achieve higher efficiency, provide operational safety and prevent nuisance shutdowns.

A phase locked loop (PLL) comprising an input, an output, a charge generator, a low pass filter 3, an oscillator 4 and a frequency divider 5. The frequency divider 5 has an input coupled to the output of the PLL and an output coupled to an input of the charge generator. The frequency at the output of the frequency divider 5 is equal to the frequency at the input of the frequency divider divided by a selectable divider ratio N. The PLL has a damping factor z and a bandwidth to compare frequency ratio ω3 / ωref. The low pass filter 3 has a first capacitor for integrating the charge produced by the charge generator. The capacitance of that first capacitor is arranged to be proportional to the divider ratio N so that the damping factor z and the bandwidth to compare frequency ratio ω3 / ωref are substantially independent of the divider ratio N.

The invention discloses an open-loop control method and an open-loop control system of a permanent magnet synchronous motor based on space vector pulse width modulation (SVPWM). To each given stator power frequency, the amplitude of stator voltage corresponding to the given stator power frequency is found through searching a two-dimensional vector table of the stator voltage and the stator power frequency, wherein the two-dimensional vector table is set according to a sectional voltage / frequency ratio curve in advance, that is to say, the ratio of the stator voltage and the stator power frequency in the two-dimensional vector table disclosed by the invention is not a normal value; and the ratio is different in different interval sections. In the prior art, as the voltage / frequency ratio is a normal value, when a load changes, a motor is out of step easily so as to cause overcurrent to the system. In the method disclosed by the invention, the sectional voltage / frequency ratio can guarantee the motor to adapt to the change of the load, reduce the consumption of the motor and improve the efficiency. In a constant power area, phase compensation is introduced, so that weak magnetic control is realized by using the regulated phase, and weak magnetic speed improvement is realized.

A frequency ratio digitizing temperature sensor for generating a linearity-corrected temperature output signal includes an input generation circuit receiving a PTAT current and a CTAT current and a frequency ratio ADC including data and reference oscillators. The input generation circuit generates a first current from the weighted sum of the PTAT current and the CTAT current and also generates a first corrected current being the sum of the first current and a first portion of the PTAT current. The input generation circuit provides a first output current indicative of the PTAT current and a first output voltage generated by applying the first corrected current to a first resistor for use with the data oscillator and provides a second output current being the first corrected current and a second output voltage generated by applying the first current to a second resistor for use with the reference oscillator of the ADC.

A system that produces a haptic effect and generates a drive signal that includes at least two haptic effect signals each having a priority level. The haptic effect is a combination of the haptic effect signals and priority levels. The haptic effect may optionally be a combination of the two haptic effect signals if the priority levels are the same, otherwise only the haptic effect signal with the highest priority is used. The frequency of haptic notifications may also be used to generate a drive signal using foreground and background haptic effect channels depending on whether the frequency ratio exceeds a foreground haptic effect threshold.

A conduit (106), with geometry designed to enhance pressure sensitivity, is vibrated at resonance in two modes along different cross-sectional axes (a, b). Measuring the change in the frequency ratio squared of the modes yields a substantially linear relationship to pressure that is substantially immune to other material properties and other environmental factors. Moments of inertia in different cross-sectional axes are related to pressure as a result of the elliptical or oral cross section of the conduit (106).

The invention discloses a modal damping ratio rapid calculation method based on a pulse excitation response spectrum. The method comprises the following steps: firstly, determining excitation and vibration pick-up positions of a structure, wherein the excitation and vibration pick-up positions are on a node and a nodal line adjacent to a modal shape, and have remarkable responses under various test modal shapes; recording a vibration pick-up point response signal by a signal acquisition device, and performing discrete Fourier transform to obtain a response spectrum; extracting corresponding responses under a resonance (or peak) frequency an adjacent frequency thereof on the basis to obtain a stable response amplitude; and lastly, calculating relevant parameters such as a frequency ratio and a response ratio in order to realize identification of a modal damping ratio of the structure. Through adoption of the method, the technical problems that semi-power points are difficult to find accurately in a conventional semi-power method, a frequency response function needed for calculating the modal damping ratio cannot be acquired sometimes in a frequency domain method since certain excitation time domain signals are difficult to measure directly, and transient components are attenuated incompletely, operations are complicated and the like in response under contact type excitation in the prior art can be solved.

Microprocessors are provided with decentralized logic and associated methods for indicating power related operating states, such as desired voltages and frequency ratios, to shared microprocessor power resources such as a voltage regulator module (VRM) and phase locked loops (PLLs). Each core is configured to generate a value to indicate a desired operating state of the core. Each core is also configured to receive a corresponding value from each other core sharing the applicable resource, and to calculate a composite value compatible with the minimal needs of each core sharing the applicable resource. Each core is further configured to conditionally drive the composite value off core to the applicable resource based on whether the core is designated as a master core for purposes of controlling or coordinating the applicable resource. The composite value is supplied to the applicable shared resource without using any active logic outside the plurality of cores.

An apparatus and a method for compensating for a mismatch in temperature coefficients of two oscillator frequencies to match a desired frequency ratio between the two oscillator frequencies over a temperature range. In one embodiment of a temperature sensor, first and second oscillators of different temperature characteristics are coupled to a differential frequency discriminator (DFD) circuit. The DFD circuit compensates for the different characteristics in order to match a frequency difference between the first and second frequencies over a temperature range.

The invention relates to a voltage orientation frequency-vary controller of an opening-ring no-speed sensor, and a controlling technology of a sensing motor, which overcomes the problems of the poor loaded capacity and the light loaded oscillation of a motor caused by the influences of the factors of the voltage decrease of a stator resistor, rotating difference frequencies, dead areas, and the like in the low-speed running of the traditional constant-voltage frequency-ratio control. The voltage orientation frequency-vary controller is composed of the following units, i.e. a current sensor, a vector coordinate changing unit, a PI adjustor, a calculating unit of voltage boosting amount, a sliding-frequency calculating unit, a frequency adder, a first operation unit, a second operation unit, a third operation unit, a fourth operation unit, a fifth operation unit, a sixth operation unit and a SVPWM unit. The PI adjustor is used for controlling the no-power current, and the problem of the light-loaded oscillation of the sensing motor is effectively inhibited. The product of the power current and the motor stator resistance is used as the voltage boosting in loading, the loaded capacity of the motor is obviously improved, and the low-speed performance of the motor is greatly improved.

The invention discloses a method and a device for controlling physical downlink control channel (PDCCH) transmission, which can accurately and effectively carry out the scheduling of PDCCH CCEs (control channel element), increase the PDCCH resource utilization rate and the PDSCH (physical downlink shared channel) transmission efficiency and optimize downlink scheduled transmission. The method for controlling physical downlink control channel transmission, which is provided by the embodiment of the invention, includes the following steps: acquiring the initial value of a CFI (Common Flash Interface), and according to the initial value of the CFI, calculating the equivalent PDCCH data-to-pilot frequency ratio of the current UE (User Equipment); according to the equivalent PDCCH data-to-pilot frequency ratio in combination with the channel quality information of the UE, calculating the number Lk of the PDCCH CCEs needed by the current UE; if the first PDCCH CCE candidate set for the current UE is already occupied, then traversing all the other PDCCH CCE candidate sets for the current UE, judging whether Lk idle CCE resources exist in the PDCCH CCE candidate sets, and if the Lk idle CCE resources exist in the PDCCH CCE candidate sets, allocating the PDCCH CCE resources to the current UE and sending the PDCCH of the current UE on the PDCCH CCEs, or else calling off resource scheduling for the corresponding UE in UEs conflicting with one another for the resources.

The communications interface enables a processor unit to dialog with an IC card having an elementary time unit (ETU) for transmitting one bit that is equal to (K / Fs). The IC card includes a microprocessor, a clock pin for application of an external clock signal enabling the microprocessor of the IC card to be clocked, and an I / O pin. The microprocessor receives external data or transmits data via the I / O pin. The communications interface includes a serial communications line for interchanging data with the IC card via the I / O pin. The communications interface also includes a transmitting module, which is written-addressable by the processor unit and includes a serialization module for serializing and transmitting, over the serial communications line, data received from the processor unit. The communications interface also includes a receiving module, which is read-addressable by the processor unit and includes a serialization module for serializing data received over the serial communications line. The communications interface also includes a first clock signal having an adjustable frequency and a second clock signal which is synchronous with the first clock signal and which enables the serialization modules of the transmitting and receiving modules to be clocked. The frequency ratio between the first clock signal and the second clock signal is preferably equal to the factor (K).

A clock generator receives first and second clock signals, and input representing a desired frequency ratio. A comparison is made between frequencies of an output clock signal and the first clock signal, and a first error signal represents the difference between the desired frequency ratio and this comparison result. The first error signal is filtered. A comparison is made between frequencies of the output clock signal and the second clock signal, and a second error signal represents the difference between the filtered first error signal and this comparison result. The second error signal is filtered. A numerically controlled oscillator receives the filtered second error signal and generates an output clock signal. As a result, the output clock signal has the jitter characteristics of the first input clock signal over a useful range of jitter frequencies and the frequency accuracy of the second input clock signal.

The invention relates to a voltage space vector control device and a voltage space vector control method for soft start. At present, a soft start technology has the problems of high starting current and low starting torque, and frequency converter soft start has the shortcoming of difficulty in the implementation of power frequency switching. A three-phase alternating current power supply is used for supplying power, six electric GTOs (gate-turn-off thyristors) can be reversely connected in parallel, an IGBT (insulated gate bipolar transistor) is adopted for a continuous current circuit, a voltage space vector control circuit is formed under the control of a microcontroller, and a current transformer is used for transmitting a three-phase current signal to the microcontroller for current limiting start and current monitoring. The phases A, B and C of the power supply of a three-phase alternating current asynchronous motor are subjected to alternating current voltage regulation and frequency modulation control under the control of the microcontroller, a voltage space vector control strategy is used for realizing hexagonal flux linkage track control over the alternating current motor, the voltage / frequency ratio is relatively stable, and the stability of main magnetic flux of the motor is ensured.

The invention provides an especial-big span suspension bridge of a uniparted hyperboloid space rope net main cable and a construction method thereof. A straight line character of the uniparted hyperboloid is used to change a vertical parallel cable rope system of an original suspension bridge. A thick and heavy centralized cable rope is changed into a dispersive space steel wire cable rope. Multiple strand of steel wire cable ropes are arranged in a cross mode. Space rope net main cable-cross nodes are fixed to form a space cable rope system of the uniparted hyperboloid type. An oval steel strengthening ring beam is arranged. A suspender and a stiffening beam are installed. A gate-type rigidity middle buckle is arranged. The especial-big span suspension bridge of the uniparted hyperboloid space rope net main cable system is built. The especial-big span suspension bridge of the uniparted hyperboloid space rope net main cable system has the advantages of being strong in span capacity, large in space structure rigidity, high in screw frequency ratio, good in wind resistance stability and the like. The novel space main cable system suspension bridge is capable of radically saving the problem of the wind resistance stability of the big span suspension bridge and used for projects of a striding sea connected island. The especial-big span channel suspension bridge of 3000-5000 meters is built.

In a frequency synthesis system with self-calibrated loop stability and bandwidth, a detector produces a detection signal based on a difference between an input signal and a feedback signal; a charge pump produces a control signal based on the detection signal; a filter produces a tuning signal and a source current based on the control signal; a bias circuit produces first and second bias signals; a controllable oscillator produces a differential output signal with a selected specific frequency; a differential-to-single converter produces an output signal with the selected specific frequency; a programmable frequency divider produces the feedback signal; a current mirror circuit receives the source current for producing a mirror current; a compensation circuit produces a compensation current based on the mirror current for compensating the variation of the damping factor and the bandwidth-to-reference frequency ratio.

The invention discloses a method for tuning and optimizing parameters of a dynamic absorber based on a machining process, which comprises the following steps: firstly, establishing a mathematical model of two degrees of freedom of a vibration system, and then solving the amplitude of the steady-state solution of a dynamics differential equation; taking the relative displacements of a main structure and the dynamic absorber in the viscous damping energy consumption formula; drawing an energy curve, and then making a statistics of the relation between a single factor vibration and the energy peak value; according to the statistics data, fitting the optimal frequency ratio and the optimal damping ratio corresponding to each mass ratio; according to the frequency range of an external disturbance signal, performing integration on the energy that the dynamic absorber can absorb; then, drawing an energy histogram and finding the maximum value so as to obtain the optimal mass ratio; finally, obtaining all optimal parameters of the dynamic absorber. With adoption of the method disclosed by the invention, the vibration caused by external disturbance can be restrained, so that the response speed can be improved by about 50%.

A system and method are provided for automatic frequency acquisition maintenance in a clock and data recovery (CDR) device. In an automatic frequency acquisition (AFA) mode, the method uses a phase detector (PHD) to acquire the phase of a non-synchronous input communication signal having an initial first frequency. In the event of a loss of lock / loss of signal (LOL / LOS) signal being asserted, a frequency ratio value is retrieved from memory. Using a phase-frequency detector (PFD), the reference signal, and the frequency ratio value, a synthesized signal is generated. In response to using the PFD to generate the synthesized signal and the LOL / LOS signal being deasserted, a rotational frequency detector (RFD) is used to generate a synthesized signal having a frequency equal to the frequency of the input communication signal. With the continued deassertion of the LOL / LOS signal, the PHD is enabled and the phase of the input signal is acquired.

Techniques are provided for dynamically adjusting the frequency range of phase-locked loops (PLLs). Phase detection circuitry in a PLL generates a control signal in response to a periodic input signal and a feedback signal. When the control signal deviates outside a valid range, the input frequency range of the PLL is dynamically adjusted to include the periodic input signal frequency. The input frequency range of the PLL is adjusted by changing one or more frequency ratios in the PLL. The resistance and / or capacitance of a loop filter in the PLL can be dynamically adjusted to control the bandwidth of the PLL.

A high-speed storage system achieving self-adaptive frequency comprises a plurality of slave equipment interfaces, a control unit, a frequency ratio regulation unit and a synchronization unit, wherein the slave equipment interfaces are used for sending access requests to the control unit and receiving response information and data of the control unit; the control unit is used for arbitrating and processing the access requests, sending the requests with high priority to a memory, pending the request with low priority, and monitoring memory port access conflict situations in real time; the frequency ratio regulation unit is used for inputting clock fractional frequency from the outside of a memory system to obtain a storage system clock according to the conflict situations and generating clock synchronization signals at the same time; the synchronization unit is used for converting access requests sent by master equipment into access request signals of a storage system clock domain and converting the data or response information returned by the storage system into signals of a master equipment clock domain. The access frequency of the memory can be automatically regulated according to the requirement of the storage system for the bandwidth of the memory, and therefore the high-speed storage system can meet system performance requirements under the condition that power consumption is made as low as possible.

To provide a high-purity Yttria sintered bodies having a high strength, a low dielectric loss and high plasma corrosion resistance of halogen gas during wide range surface roughness (Ra).SolutionAn Yttria sintered body having a dielectric loss tan δ of 1×10−4 or less in the frequency range from 1 to 20 GHz, wherein the Yttria sintered body contains Yttria of 99.9% by mass or more, has a porosity of 1% or less and an average crystal grain size of 3 μm or less, and the cumulative frequency ratio calculated from the following formula (1) is 3 or less:Cumulative frequency ratio=D90 / D50   (1)In the above-described formula (1), the meanings of the individual symbols are as follows:D90: The crystal grain size (μm) at which the cumulative number of grains as calculated from the smaller grain size side is 90% in the grain size distribution of the crystal grains in terms of the number of grains.D50: The crystal grain size (μm) at which the cumulative number of grains as calculated from the smaller grain size side is 50% in the grain size distribution of the crystal grains in terms of the number of grains.

A method is disclosed for operating a synchronous space division multiple access, code division multiple access communications system, as is a system that operates in accordance with the method. The method operates, within a coverage area of a base station (BS), to assign the same spreading code to a plurality of subscriber stations (SSs) and to transmitting signals to, and receive signals from, the SSs using an antenna array having M elements, where M>1 and where the M elements are spaced apart by more than one-half wavelength from one another. The spacing is a function of a size of an aperture of the antenna array which is a function of a signal bandwidth to carrier frequency ratio. The antenna array aperture is preferably less than k=p / 360*fc / B wavelengths, where p is a maximum acceptable phase variation over the signal bandwidth, where fc is the carrier frequency and where B is the signal bandwidth. The step of conducting communications includes steps of despreading a plurality of received signals; and beamforming the plurality of despread received signals. In a preferred embodiment individual ones of P orthogonal spreading codes are reused αM times within the coverage area, where 1 / M<α≦1.