13401 results about "Surface roughness" patented technology

Embodiments of the invention relate to apparatuses and methods for depositing materials on substrates during atomic layer deposition processes. In one embodiment, a chamber for processing substrates is provided which includes a chamber lid assembly containing an expanding channel at a central portion of the chamber lid assembly, wherein an upper portion of the expanding channel extends substantially parallel along a central axis of the expanding channel, and an expanding portion of the expanding channel tapers away from the central axis. The chamber lid assembly further contains a conduit coupled to a gas inlet, another conduit coupled to another gas inlet, and both gas inlets are positioned to provide a circular gas flow through the expanding channel. In one example, the inner surface within the upper portion of the expanding channel has a lower mean surface roughness than the inner surface within the expanding portion of the expanding channel.

A heat treatment jig for supporting silicon semiconductor substrates by contacting, being loaded onto a heat treatment boat in a vertical heat treatment furnace, comprises; the configuration of a ring or a disc structure with the wall thickness between 1.5 and 6.0 mm; the deflection displacement of 100 μm or less at contact region in loaded condition; the outer diameter which is 65% or more of the diameter of said substrate; and the surface roughness (Ra) of between 1.0 and 100 μm at the contact region. The use of said jig enables to effectively retard the slip generation and to avoid the growth hindrance of thermally oxidized film at the back surface of said substrate, diminishing the surface steps causing the defocus in photolithography step in device fabrication process, thereby enabling to maintain high quality of silicon semiconductor substrates and to substantially enhance the device yield.

A medical device (10) includes a structure (12) adapted for introduction into a patient, the structure (12) being formed of a preferably non-porous base material (14) having a roughened or textured surface (16). The structure (12) is conveniently configured as a vascular stent with a base material (14) of stainless steel, nitinol or another suitable material. The medical device (10) also includes a layer (18) of a bioactive material posited directly upon the roughened or textured surface (16) of the base material (14) of the structure (12). The surface (16) of the base material (14) is roughened or textured by etching or by abrasion with sodium bicarbonate or another suitable grit. A preferred roughened or textured surface (16) is thought to have a mean surface roughness of about 10 μin. (about 250 nm) and a surface roughness range between about 1 μin. and about 100 μin. (about 25 nm and about 2.5 μm). The particularly preferred use of sodium bicarbonate as the abrasive to provide roughness or texture to the surface (16) of the base material (14) of the structure (12) is additionally advantageous in the low toxicity of the sodium bicarbonate to production workers, the ease of product and waste cleanup, and the biocompatibility of any residual sodium bicarbonate.

[Problems] To prevent both slips caused by damage from projections, and slips caused by adhesive force occurring due to excessive smoothing.

[Means for Solving the Problems] The heat treating apparatus includes a processing chamber for heat treating wafers and a boat for supporting the wafers in the processing chamber. The boat further includes a wafer holder in contact with the wafer and a main body for supporting the wafer holder. The wafer holder diameter is 63 to 73 percent of the wafer diameter, and the surface roughness Ra of the portion of the wafer holder in contact with the wafer is set from 1 μm to 1,000 μm. The wafer can be supported so that the amount of wafer displacement is minimal and both slips due to damage from projections on the wafer holder surface, and slips due to the adhesive force occurring because of excessive smoothing can be prevented in that state.

Provided is a susceptor 13 for manufacturing an epitaxial wafer, comprising a mesh-like groove 13b on a mount face on which a silicon substrate W is to be mounted, wherein a coating H of silicon carbide is formed on the mount face, and the coating has a surface roughness of 1 μm or more in centerline average roughness Ra and a maximum height of a protrusion 13p generated in forming the coating H of 5 μm or less. Thus, defects such as warping and slip as well as adhesion of the silicon substrate to the susceptor are prevented.

A method of etching silicon-containing material is described and includes a SiConi™ etch having a greater or lesser flow ratio of hydrogen compared to fluorine than that found in the prior art. Modifying the flow rate ratios in this way has been found to reduce roughness of the post-etch surface and to reduce the difference in etch-rate between densely and sparsely patterned areas. Alternative means of reducing post-etch surface roughness include pulsing the flows of the precursors and/or the plasma power, maintaining a relatively high substrate temperature and performing the SiConi™ in multiple steps. Each of these approaches, either alone or in combination, serve to reduce the roughness of the etched surface by limiting solid residue grain size.

The present invention provides a method of forming a strained semiconductor layer. The method comprises growing a strained first semiconductor layer, having a graded dopant profile, on a wafer, having a first lattice constant. The dopant imparts a second lattice constant to the first semiconductor layer. The method further comprises growing a strained boxed second semiconductor layer having the second lattice constant on the first semiconductor layer and growing a sacrificial third semiconductor layer having the first lattice constant on the second semiconductor layer. The method further comprises etch annealing the third and second semiconductor layer, wherein the third semiconductor layer is removed and the second semiconductor layer is relaxed. The method may further comprises growing a fourth semiconductor layer having the second lattice constant on the second semiconductor layer, wherein the fourth semiconductor layer is relaxed, and growing a strained fifth semiconductor layer having the first semiconductor lattice constant on the fourth semiconductor layer. The method controls the surface roughness of the semiconductor layers. The method also has the unexpected benefit of reducing dislocations in the semiconductor layers.

The present invention provides a bonded substrate fabricated to have its final active layer thickness of 200 nm or lower by performing the etching by only 1 nm to 1 μm with a solution having an etching effect on a surface of an active layer of a bonded substrate which has been prepared by bonding two substrates after one of them having been ion-implanted and then cleaving off a portion thereof by heat treatment. SC-1 solution is used for performing the etching. A polishing, a hydrogen annealing and a sacrificial oxidation may be respectively applied to the active layer before and/or after the etching. The film thickness of this active layer can be made uniform over the entire surface area and the surface roughness of the active layer can be reduced as well.

A method of fabricating a semiconductor device including a channel layer includes forming a single crystalline semiconductor layer on a semiconductor substrate. The single crystalline semiconductor layer includes a protrusion extending from a surface thereof. A first polishing process is performed on the single crystalline semiconductor layer to remove a portion of the protrusion such that the single crystalline semiconductor layer includes a remaining portion of the protrusion. A second polishing process different from the first polishing process is performed to remove the remaining portion of the protrusion and define a substantially planar single crystalline semiconductor layer having a substantially uniform thickness. A sacrificial layer may be formed on the single crystalline semiconductor layer and used as a polish stop for the first polishing process to define a sacrificial layer pattern, which may be removed prior to the second polishing process. Related methods of fabricating stacked semiconductor memory devices are also discussed.

A member used within a plasma processing apparatus and exposed to a plasma of a halogen gas such as BCl₃ or Cl₂ is formed from a sintered body of metals of Group IIIa of Periodic Table such as Y, La, Ce, Nd and Dy, and Al and/or Si, for example, 3Y₂O₃.5Al₂O₃, 2Y₂O₃.Al₂O₃, Y₂O₃.Al₂O₃ or disilicate or monosilicate, and in particular, in this sintered body, the content of impurity metals of Group IIa of Periodic Table contained in the sintered body is controlled to be 0.15 wt % or more in total. Specifically, for this member, an yttrium-aluminum-garnet sintered body having a porosity of 3% or less and also having a surface roughness of 1 μm or less in center line average roughness Ra is utilized.

A set of golf club wedges each having a club face (10) is disclosed wherein the lofts of the individual clubs progressively increases. The hitting surface of each club head may take the form of an insert (12) that includes a series of grooves, the design of which is varied from club to club to provide increasing friction with loft. As a result, a golfer can impart the same amount of spin to a golf ball with each of the wedges despite a substantial difference in loft and club head swing speed between the respective clubs. In addition, the surface roughness of the hitting surface may also be increased as loft increases to further control the spin imparted to the ball.

To provide cover glass for mobile terminals exhibiting high strength in a thin plate thickness state to enable reductions in thickness of apparatuses when inserted in the apparatuses, cover glass (1) for a mobile terminal of the invention is cover glass (1) that is obtained by forming a resist pattern on main surfaces of a plate-shaped glass substrate, then etching the glass substrate with an etchant using the resist pattern as a mask, and thereby cutting the glass substrate into a desired shape and that protects a display screen of the mobile terminal, where an edge face of the cover glass (1) is formed of a molten glass surface, and as surface roughness of the edge face, arithmetic mean roughness Ra is 10 nm or less.

A thin film battery including an anode layer, a cathode layer and a solid electrolyte layer. The battery also includes, a planarization layer applied to the thin film battery. The planarization layer has a surface roughness of no more than about 1.0 nanometers root mean square and a flatness no larger than about 0.005 cm/inch. A barrier layer is applied to the planarization layer. The barrier layer is provided by one or more layers of material selected from the group consisting of polymeric materials, metals and ceramic materials. The planarization layer and barrier layer are sufficient to reduce oxygen flux through the barrier layer to the anode layer to no more than about 1.6 μmol/m²-day, and H₂O flux through the barrier layer to the anode layer to less than about 3.3 μmol/m²-day thereby improving the life of the thin film battery.

What is described here is an antireflective coating comprising a carrier layer consisting of an optically transparent material, which, at least on one surface side, presents antireflective properties with respect the wavelengths of the radiation incident on the surface. Moreover, methods of producing the coating are described.The invention excels itself by the provision that the antireflective surface side presents a surface roughness with stochastically distributed structures-the so-called macro structures-and that the macro structures are additionally modulated with surface structures presenting a periodic sequence-the so-called micro structures-which present period or cycle lengths smaller than the wave lengths of the radiation incident on the antireflective surface.