304results about "Diffusion/doping" patented technology

The invention discloses a low-resistance N-type gallium oxide crystal and a growth method thereof. The growth method comprises the following steps: pretreatment of raw materials: sintering a doped gallium oxide material block formed by mixing gallium oxide powder and doped raw material powder; crystal growth: heating the iraurita crucible to melt the doped gallium oxide material block, increasing the power of the medium-frequency induction coil to raise the temperature of the gallium oxide melt, keeping the temperature, cooling to the melting point of gallium oxide, keeping the melt state, firstly reducing the power of the medium-frequency induction coil to spontaneously nucleate at the cold core of the upper surface of the melt and realize the transverse growth of the nucleated crystal; reducing the power of the lower medium-frequency induction coil to enable the gallium oxide melt to grow from top to bottom until the gallium oxide melt completely grows into crystals; after crystal growth is finished, the temperature is reduced to 1200-1400 DEG C, heat preservation is conducted, cooling is conducted to the room temperature, and the low-resistance N-type gallium oxide crystals are obtained.The growth method is simple in process, the crystal growth speed is conveniently controlled, the crystal forming rate is increased, and large-scale mass production is achieved.

The invention provides a preparation method of a silicon carbide substrate, the silicon carbide substrate and a semiconductor device. The preparation method comprises the following steps: preprocessing a silicon carbide substrate raw material; performing neutron irradiation treatment on the material; and the material is subjected to annealing treatment. The silicon carbide substrate prepared by the preparation method provided by the invention can have relatively high mechanical property, conductivity, uniformity and stability.

There is provided a gallium nitride single crystal substrate, which is a gallium nitride single crystal substrate having a diameter of 50 mm or more, with a low-index crystal plane closest to a main surface being (0001), and in which a Mn concentration in the substrate is 5×1017 cm−3 or more; and secondary ion mass spectrometry at a plurality of arbitrary points on the main surface reveals that a variation in the Mn concentration is within ±20% from an average value.

The present invention relates to the fields of ferroelectric single crystal technology and acousto-optical device technology, particularly to a silicon-based lead magnesium niobate (PbMn) single crystal piezoelectric wafer structure, preparation method, and application. The structure comprises a silicon substrate on which a silicon dioxide layer and a single crystal piezoelectric thin film layer are sequentially disposed; the single crystal piezoelectric thin film layer is a PbMn-PT single crystal, including a binary PMN-PT single crystal thin film or a ternary PIN-PMN-PT single crystal thin film. This piezoelectric wafer structure on a silicon substrate can be used to fabricate various high-performance piezoelectric MEMS sensors, actuators, and electro-optical modulator devices. The resulting surface acoustic wave (SAW) filters and thin film bulk acoustic wave (BAW) filters exhibit a relative bandwidth increase of over 50%, and the resulting electro-optical modulators exhibit lower half-wave voltage and higher electro-optical modulation efficiency. The device volume can be reduced by 10 times, better meeting the future 6G communication requirements for higher efficiency, higher integration, and miniaturization of MEMS devices. This provides a novel multilayer piezoelectric wafer structure for the miniaturization and integration of piezoelectric MEMS and optoelectronic devices.

The invention discloses a multi-element differentiated distribution co-doped single-crystal high-nickel positive electrode material and a preparation method and application thereof.The material is doped with a first doping element and a second doping element, the first doping element is in gradient distribution with the concentration gradually increased from inside to outside in material particles, and the second doping element is in gradient distribution with the concentration gradually increased from inside to outside. The second doping elements are basically and uniformly distributed in the material particles; the first doping element is used for strengthening the surface stability of the material, and the second doping element is used for stabilizing the bulk phase structure of the material. The material is obtained by taking a lithium salt and a ternary positive electrode material precursor as raw materials, introducing a first doping source and a second doping source, mixing, ball-milling and calcining according to a preset stoichiometric ratio.

The present disclosure discloses a method for manufacturing a semiconductor epitaxial layer, including: forming a well region. A transition layer is formed by performing cyclic steps, where the cyclic steps includes: performing a first interface repair process to repair a defect exposed on the surface of a previous layer; and performing first epitaxial growth to form an undoped first epitaxial sublayer on the surface of the previous layer. A bulk layer of the semiconductor epitaxial layer is formed, including: performing a second interface repair process to repair a defect exposed on the surface of the transition layer; and performing second epitaxial growth to form the undoped bulk layer on the surface of the transition layer. The rate of the first epitaxial growth is less than the rate of the second epitaxial growth, and the thickness of the bulk layer is greater than the thickness of each first epitaxial sublayer.

A film stack is formed a workpiece. The film stack is fabricated by sequentially depositing a carbon-doped silicon germanium stack and a silicon film to form a carbon-doped silicon-germanium and silicon mini-stack disposed on a substrate during a deposition cycle. The deposition cycle comprises exposing a workpiece including the substrate to a first gas including a first precursor to deposit a first silicon-germanium layer and exposing the workpiece to a second gas including the first precursor to deposit a carbon-silicon-germanium layer on the first silicon-germanium layer. Further, the deposition cycle includes exposing the workpiece to a third gas including the first precursor to deposit a second silicon-germanium layer on the carbon-silicon-germanium layer. The deposition cycle further includes exposing the workpiece to a fourth gas including a second precursor to deposit the silicon film on the second silicon-germanium layer. The second precursor differs from the first precursor.

The invention belongs to the technical field of semiconductors, and particularly relates to a stripping method, a single crystal thin film preparation method applying the stripping method and a single crystal thin film. The stripping method comprises the steps that first ions and second ions are sequentially injected from the first surface of a functional wafer, an ion injection sheet comprising a thin film layer, a separation layer and a residual layer is formed, and the first ions and the second ions are gathered on the separation layer; the first ions are ions with characteristic absorption peaks, and the second ions are gas ions; the emission wavelength of the light source is within the characteristic absorption peak wavelength range of the first ions, and the first ions absorb light energy and convert the light energy into heat energy, so that the separation layer is rapidly heated to a high temperature, and the second ions are gasified into bubbles; and the ion implantation sheet is stripped from the separation layer. The separation layer is selectively heated through the light source to achieve stripping, local temperature rise of the ion implantation sheet and temperature rise are concentrated on the separation layer, when the stripping method is applied to preparation of the single crystal thin film, other areas except the separation layer are almost not heated, complete stripping of the single crystal thin film and reuse of the residual layer can be achieved, and meanwhile the available area and the yield of the thin film are improved.

The invention provides an antimony-based chalcogenide film with (hk1) dominant orientation and a preparation method and application thereof, and belongs to the technical field of semiconductor photovoltaic materials. According to the method, the crystal orientation of the antimony-based chalcogenide film is regulated and controlled by doping PbI2 in situ under the simple solution method (water bath or hydrothermal) deposition condition, and research results show that the solution method is adopted to introduce PbI2, so that the antimony-based chalcogenide film can be remarkably induced to preferentially grow along the (hk1) direction, grain boundary scattering and inter-chain potential barriers are effectively weakened, and the crystal orientation of the antimony-based chalcogenide film is improved. The carrier longitudinal migration and collection efficiency is improved, so that the VOC loss is reduced, and the final battery performance is improved; the method provided by the invention not only provides a new thought for preparing the high-orientation antimony-based chalcogenide film, but also lays a technical foundation for design and optimization of a bottom battery material in a future laminated battery.

The invention provides a TOPCon battery and a preparation method thereof, and boron diffusion equipment, and the preparation method of the TOPCon battery comprises the steps: providing a silicon substrate, placing the silicon substrate in a boron diffusion furnace, introducing nitrogen into a furnace mouth region of the boron diffusion furnace, introducing oxygen and boron trichloride into the boron diffusion furnace, introducing nitrogen gas into the furnace mouth region of the boron diffusion furnace, introducing nitrogen gas into the furnace mouth region of the boron diffusion furnace, introducing nitrogen gas into the furnace mouth region of the boron diffusion furnace, and introducing nitrogen gas into the furnace mouth region of the boron diffusion furnace, the ratio of the flow of the oxygen to the flow of the boron trichloride is alpha, and alpha is more than or equal to 3.5 and less than or equal to 4.5. The nitrogen can quickly purge reaction byproducts in a low-temperature area of the furnace mouth, and sufficient oxygen is provided to completely oxidize boron trichloride into a gaseous boron oxide precursor before the boron trichloride enters a high-temperature reaction area, so that the generation of viscous low-temperature boron oxide due to insufficient oxidation is avoided; and the generation and deposition of boron oxide crystals at the furnace mouth are inhibited from two dimensions of mass transfer process and chemical reaction completeness, and the yield and average photoelectric conversion efficiency of the TOPCon battery can be remarkably improved.

According to one embodiment, a method for manufacturing a semiconductor body (10) includes the steps of providing a first semiconductor layer (1) of SiC, introducing carbon into the first semiconductor layer to make at least a portion of the first semiconductor layer a C-rich region (11), and growing a second semiconductor layer (2) of SiC on the first semiconductor layer including at least a C-rich region.

According to the preparation method of the semiconductor composite substrate provided by the embodiment of the invention, the Si surface of the thin film transfer substrate after the hydrogen ions are injected is subjected to surface type treatment, and the damage layer formed on the surface of the Si surface can counteract stress deformation generated after the hydrogen ions are injected, so that the thin film transfer substrate with low warping degree is obtained, the subsequent bonding quality is improved, and the yield of the thin film transfer substrate is improved. And finally, the high-quality silicon carbide semiconductor composite substrate can be obtained.

The utility model discloses a synthesis device. The synthesis device comprises a base, a mounting plate, a driving part and a synthesis container, the mounting plate is rotatably connected to the base; the driving part is arranged on the base and connected with the mounting plate so as to drive the mounting plate to rotate; the synthesis container is arranged on the mounting plate, and the synthesis container can pass through the loading position and the unloading position in the process of rotating along with the mounting plate; when the synthesis container is located at the loading position, the opening direction of the synthesis container is inclined and upward relative to the horizontal direction; and when the synthesis container is positioned at the discharging position, the opening direction of the synthesis container is inclined and downward relative to the horizontal direction. According to the synthesis device, during charging, the synthesis container is rotated to the charging position through the driving piece, so that charging of materials is facilitated; and after the diffusion process is completed, the synthesis container is rotated to the unloading position through the driving part, so that the materials are conveniently unloaded, the loading and unloading operation is more convenient, and the loading and unloading efficiency is improved. The utility model also discloses a semiconductor preparation system.

The invention discloses a TOPCon solar cell boron diffusion quartz boat source saturation technology, and relates to the technical field of cell production, and the technology comprises the steps: starting a boron diffusion furnace tube system; feeding the new quartz boat into the furnace tube; adjusting the internal pressure of the furnace tube after pre-vacuumizing; detecting the sealing performance of the furnace tube; introducing oxygen into the furnace tube, and carrying out surface pretreatment on the quartz boat; the source introduction saturation stage comprises a low-temperature source introduction sub-stage and a high-temperature saturation sub-stage, in the low-temperature source introduction sub-stage, BCL3 gas and oxygen are introduced into the furnace tube for three times of source introduction operation, a purging step is set after each time of source introduction, and in the high-temperature saturation sub-stage, the temperature and pressure in the furnace tube and the flow of the introduced oxygen are adjusted for one time of saturation operation; gradually reducing the temperature in the furnace tube; opening a furnace door and taking out the quartz boat. According to the method, the BCL3 gas is introduced in the source saturation process, so that metal impurities on the surface of the quartz boat can be effectively removed while boron is saturated, and the problem that the yield and the efficiency are reduced due to online state difference of a new quartz boat is effectively solved.

Provided is a furnace tube, wherein a reaction chamber (10) in which a carrier (20) is placed is provided inside the furnace tube; a plurality of gas inlets (30) in communication with the reaction chamber (10) are provided at the top or bottom of the furnace tube; a gas inlet device (40) is connected to the end of the gas inlets (30) away from the reaction chamber (10); and a flow equalizing device (50) is connected to the end of the gas inlets (30) located in the reaction chamber (10), the flow equalizing device (50) comprises an annular spray gas inlet pipe (501) and / or a spray gas inlet pipe (503), the side of the annular spray gas inlet pipe (501) and / or the spray gas inlet pipe (503) facing the carrier (20) being provided with spray ports. A process gas is delivered to the gas inlets (30) via the gas inlet device (40), and then sprayed to the carrier (20) through the spray ports of the annular spray gas inlet pipe (501) and / or the spray gas inlet pipe (503), so as to uniformly diffuse into the entire reaction chamber (10), thereby improving the contact efficiency between solar cells and the process gas to enable a more thorough reaction between the two, ensuring the uniformity of coating on the solar cells placed in the reaction chamber (10).

The application discloses a kind of high-power high-speed direct modulation quantum dot laser and preparation method thereof, N-type GaAs substrate is sent into MBE chamber to remove the surface oxidation layer, N-type GaAs contact layer is sequentially grown on the N-type GaAs substrate of surface oxidation layer removal, N-type AlGaAs restriction layer, first undoped GaAs waveguide layer, multilayer quantum dot active region, second undoped GaAs waveguide layer, P-type AlGaAs restriction layer, P-type GaAs contact layer, to obtain high-power high-speed direct modulation quantum dot laser from this. The method greatly improves the number of quantum dot layers by precisely controlling the growth conditions of quantum dots and the thickness of the spacer layer, while controlling the thickness of the quantum dot active region, thereby increasing the differential gain of quantum dots, carrier injection efficiency and greatly improving the direct modulation rate and light output power of quantum dot laser.

A method for producing single-crystal silicon wafers for use in insulated gate bipolar transistors is disclosed. The method involves determining, for a relatively low-oxygen ingot, a radial profile of the ratio of (i) growth rate v and (ii) axial temperature gradient G. Based on the radial v / G profile, a nitrogen concentration can be selected that widens the v / G window to produce perfect silicon free of COPs and gate oxide defects.

The purpose is to provide an epitaxial or green seed substrate for epitaxial growth use, which comprises a Group III nitride such as AlN, AlxGa1-xN (0<X<1) and GaN, has little crystal defects and high quality, and is inexpensive. The seed substrate for epitaxial growth use comprises a support substrate, a flattened layer provided on an upper surface of the support substrate and having a thickness of 0.5 to 3 μm, and a seed crystal layer provided on an upper surface of the flattened layer. The support substrate includes a core that comprises a polycrystalline ceramic of a Group III nitride and a sealing layer that seals the core and has a thickness of 0.05 to 1.5 μm. The seed crystal layer is provided by the thin film transfer of 0.1 to 1.5 μm of a surface layer comprising Si<111> single crystals and having an oxidation induced stacking faults (OSFs) of 10 / cm2 or less.

An n-type GaN substrate having two main surfaces, the n-type GaN substrate being doped with Ge, having an average carrier concentration of 1×1018 cm−3 or more, and satisfying at least one selected from the group consisting of (1) to (3) when carrier concentrations are measured at measurement points uniformly provided in a circular region having a radius of 15 mm from the center of at least one main surface: (1) a standard deviation / average of measured values at measurement points on straight lines passing through the center of the main surface in directions of 0 degrees, 45 degrees, 90 degrees, and 135 degrees is 0.25 or less; (2) the ratio of the number of measurement points at which a carrier concentration is 2×1018 cm−3 or more to the total number of the measurement points is 90% or more; and (3) the ratio of the number of measurement points at which a measured value is (A) 60% or less / (B) 50% or less / (C) 40% or less of the maximum of measured values at all measurement points to the total number of the measurement points is (A) 10% or less / (B) 9% or less / (C) 8% or less. The n-type GaN substrate has a high carrier concentration and a uniform in-plane carrier concentration distribution.

The invention relates to the field of diamonds for ultra-precision cutting, in particular to a production method of a spontaneous heating single crystal diamond for an ultra-precision machining cutter, the cutter and an ultra-precision cutting method. The invention relates to a production method of a self-heating single crystal diamond for an ultra-precision machining cutter. The production method comprises the following steps: S1, providing a high-quality single crystal diamond with a crystal orientation inclination angle of 45-55 degrees as a seed crystal; s2, a hydrogen plasma atmosphere with the hydrogen flow being 500 + / -10 sccm is constructed, and carbon source gas, boron source gas, oxygen, nitrogen and argon are introduced; s3, continuously depositing on the surface of the seed crystal for at least 300 hours to obtain a deposited monocrystal diamond with the thickness of not less than 1.1 mm; and S4, carrying out heat treatment on the synthesized sedimentary-state single crystal diamond in a pure oxygen environment to obtain the single crystal diamond of which the resistivity is 0.8-2.0 omegam and which can automatically heat to 200-500 DEG C under the action of a Joule heat effect after variable current is introduced. By means of self-heating of the single crystal diamond, under the condition that an external thermal field is not needed, precise space confinement, quick response and fine regulation and control of a cutting micro-area thermal field can be achieved when the single crystal diamond is used for a cutter, and ultra-precise cutting machining of the optical-grade surface of a hard and brittle material can be conveniently achieved.

The utility model discloses a single crystal Topcon battery low pressure diffusion air inlet pipe, and relates to the technical field of low pressure diffusion air inlet pipes, the single crystal Topcon battery low pressure diffusion air inlet pipe comprises a built-in pipe and an outer sleeve, one end of the built-in pipe is an air inlet end and is located in the middle of the outer sleeve, and the outer side line of the air inlet end extends to be closed with the outer sleeve and is a closed side; the other end of the built-in pipe is closed with the closed end of the outer sleeve, and is communicated with an inner air hole and an exhaust hole I which are laterally formed respectively; a plurality of groups of inner air holes are uniformly distributed on the built-in pipe, and a plurality of inner air holes in each group are circumferentially distributed along the central axis of the built-in pipe in a surrounding manner; a first exhaust hole, a second exhaust hole and a third exhaust hole are respectively formed in the outer sleeve, and the hole diameter in the direction from the air inlet end of the built-in pipe to the closed end is gradually increased, so that the technical problem that in the prior art, due to the fact that a single air outlet in the diffusion furnace causes different doping concentrations of silicon wafers at different positions in the pipe, the sheet resistance uniformity is poor is solved.

There is described a method of manufacturing a substrate for an optoelectronic device. The method has the steps of: supporting a first layer of a first crystalline material on a second layer of a second crystalline material different from said first crystalline material thereby exposing crystalline defects at a surface of said first layer; etching said first layer using first etching conditions, at least some of said crystalline defects expanding into pores running from said surface of the first layer towards said second layer; and heating said first and second layers up to a first temperature for a first period of time within a given environment, said heating transforming said pores into nanovoids attracting at least some of said crystalline defects away from said surface. In some embodiments, the method has a step of reheating the layers or a step of forming a pore containing region within the first layer.

The invention relates to the technical field of wafer diffusion, in particular to a diffusion device and process for wafer doping, which comprises a machine body, a diffusion heating furnace is arranged in the machine body, an impurity gas inlet pipe is arranged at one end of the diffusion heating furnace, and the impurity gas inlet pipe penetrates through the machine body and extends to the outside of the machine body. The impurity gas inlet pipe penetrates through the machine body and extends out of the machine body, a solenoid valve is arranged at one end of the impurity gas inlet pipe, the diffusion heating furnace is internally provided with a wafer carrier which moves in and out and is used for loading wafers, and the wafer carrier comprises a sealing door used for sealing a port of the diffusion heating furnace and a supporting mechanism arranged on the sealing door; the wafer diffusion deposition device comprises a supporting mechanism, and further comprises a wafer clamping mechanism arranged on the supporting mechanism, the wafer clamping mechanism comprises a limiting supporting assembly arranged on the supporting mechanism, and the wafer diffusion deposition device solves the problem that when diffusion deposition is carried out on a wafer, the wafer surface corresponding to a wafer clamping part cannot make contact with doped gas for diffusion deposition.

Provided is a high-resistance gallium nitride single crystal substrate which is uniformly doped with Mn. The gallium nitride single crystal substrate has a diameter of 50 mm or more, the low-index crystal plane closest to the principal surface is a (0001) plane, the concentration of Mn in the substrate is 5 * 1017 cm-3 or more, and the variation in Mn concentration when a plurality of arbitrary points on the principal surface are subjected to secondary ion mass spectrometry is within an average value of + / -20%.

A method for manufacturing a substrate for epitaxial growth of a layer of a gallium-based III-N alloy includes providing a donor substrate of monocrystalline semi-insulating silicon carbide; implanting ion species into the donor substrate to form a weakened region that defines a thin layer of monocrystalline semi-insulating SiC to be transferred; bonding the donor substrate to a first receiver substrate via a bonding layer; separating the donor substrate along the weakened region to transfer the thin layer of monocrystalline semi-insulating SiC to the first receiver substrate; forming an additional layer of semi-insulating SiC on the transferred thin layer; bonding the additional layer to a second receiver substrate having high electrical resistivity; and separating the first receiver substrate and removing at least a portion of the bonding layer to expose the transferred layer of monocrystalline semi-insulating SiC.

A laser activated luminescence system is provided. Another aspect pertains to a system employing a plasma assisted vapor deposition reactor which creates diamond layers on a substrate, in combination with a laser system to at least photoactivate and anneal the diamond layers. Yet another aspect of the present system uses a laser to assist with placement of color centers, such as nitrogen vacancy centers, in diamond. The present method uses lasers to manufacture more than two activated nitrogen vacancy center nodes in a diamond substrate, with nanometer spatial resolution and at a predetermined depth.

Silicon carbide as a radioactive isotope energy source material, containing a single crystalline phase of a silicon carbide semiconductor structure in the form of a film, having n-type or p-type electrical conductivity for separating electron-hole pairs, comprising the elements: carbon isotope C 12 and additionally carbon isotope C 14 for converting its radiation energy into electrical energy, characterized in that the concentration of radioactive isotope C 14 in one of the n-type or p-type conductivity layers is from 5·10 17 to 10 20 cm ‑3 -3 14 , wherein the n-type or p-type conductivity silicon carbide layer is formed on the surface of a monocrystalline silicon substrate, the n-type or p-type conductivity silicon carbide layer with C 14 has a porous surface topography.

The invention discloses a vertical diffusion furnace and a management method thereof, and the vertical diffusion furnace comprises a base which is used for fixing a wafer boat; the inner furnace tube is vertically mounted on the base, a sealed process cavity is formed by the inner furnace tube and the base, and the wafer boat is located in the process cavity; the outer furnace tube is arranged outside the inner furnace tube, and a sealed outer cavity is formed between the outer furnace tube and the inner furnace tube; the heating structure is arranged in an outer cavity between the inner furnace tube and the outer furnace tube in a surrounding mode, the base comprises a sensing module, the sensing module collects a plurality of parameters, and the parameters comprise levelness data of the base. The sensing module is arranged on the base, the levelness data of the base of the vertical diffusion furnace are collected through the sensing module, then the levelness data are analyzed, whether the levelness exceeds the preset allowable range or not is judged, and therefore real-time monitoring and early warning are conducted on the vertical diffusion furnace.

The utility model relates to a diffusion furnace device. The diffusion furnace device comprises an inner pipe body; the inner pipe body is sleeved with the outer pipe body; the flange piece is connected to the outer pipe body and the inner pipe body; the nozzle is inserted into the flange piece, one end of the nozzle is located outside the outer pipe body, and the other end of the nozzle is located in an inner cavity of the inner pipe body; the supporting assembly is connected to the flange piece and located at the bottom of the nozzle so as to support the nozzle. According to the diffusion furnace device, the supporting assembly is connected to the bottom of the nozzle so as to support the nozzle, the situation that the nozzle shakes in the operation process can be greatly reduced, and then the situation that friction is generated between the nozzle and the inner wall of the inner pipe body or the outer wall of the wafer boat is reduced; and the influence of particles generated by friction on the wafer processing effect is further greatly reduced.

The invention discloses a preparation method and application of doped graphite, and belongs to the technical field of doped graphite. The method comprises the following steps: performing vacuum annealing on a single crystal metal substrate adsorbed with a doped element compound to obtain a doped element embedded single crystal metal substrate; the single crystal metal substrate embedded with the doping elements is attached to a graphite base material, heat preservation is conducted for 1-3 h at the temperature of 1000-1500 DEG C in a non-oxidizing atmosphere, then heat preservation is conducted for 4-12 h at the temperature of 700-900 DEG C, and the doped graphite is obtained after cooling. According to the invention, the doping elements are embedded into the single crystal metal substrate, and the graphite is doped through variable temperature growth, so that the super-lubricity is maintained while the doping uniformity and controllability are ensured, and the method is more suitable for being applied to electronic devices needing to maintain the super-lubricity.