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341results about How to "High doping" patented technology

Methods of manufacturing trench isolated drain extended mos (DEMOS) transistors and integrated circuits therefrom

A method of fabricating an integrated circuit (IC) including at least one drain extended MOS (DEMOS) transistor and ICs therefrom includes providing a substrate having a semiconductor surface, the semiconductor surface including at least a first surface region that provides a first dopant type. A patterned masking layer is formed on the first surface region, wherein at least one aperture in the masking layer is defined. The first surface region is etched to form at least one trench region corresponding to a position of the aperture. A dopant of a first dopant type is implanted to raise a concentration of the first dopant type in a first dopant type drift region located below the trench region. After the implanting, the trench region is filled with a dielectric fill material. A body region is then formed having a second dopant type in a portion of the first surface region. A gate dielectric is then formed over a surface of the body region and the first surface region. A patterned gate electrode layer is formed over the gate dielectric, a source region in the body region and a drain region in the first surface region on a side of the trench region opposite to the source are formed, and fabrication of the IC is completed.
Owner:TEXAS INSTR INC

Process using date pits to prepare nitrogen-doped porous carbon material and preparation method of super-capacitor electrode

The invention belongs to the field of biomass carbon material preparation and particularly discloses a process using date pits to prepare nitrogen-doped porous carbon material and a preparation method of a super-capacitor electrode. The process includes the steps of firstly, preprocessing the date pits; secondly, preparing nitrogen-doped carbon material; thirdly, preparing the nitrogen-doped porous carbon material. The process is characterized in that the date pits are used as the carbon source and mixed with ammonia gas and steam in inert protecting gas, the nitrogen doping reaction is performed during the carbonization process, activated perforation is performed under the effect of activating agent, and the nitrogen-doped porous carbon material with high specific surface area and pore volume is prepared. The preparation method is simple, low in cost, high in preparation efficiency and energy saving. Experiments show that the super-capacitor electrode prepared by the nitrogen-doped porous carbon material has high specific capacitance, ideal pseudo-capacitance and high circulation stability, the performance of the super-capacitor electrode is better than the performance of commercial activated-carbon super-capacitors, and the performance of the nitrogen-doped porous carbon material is better than that of most nitrogen-doped porous carbon materials.
Owner:XIANGTAN UNIV

Methods of manufacturing trench isolated drain extended MOS (demos) transistors and integrated circuits therefrom

A method of fabricating an integrated circuit (IC) including at least one drain extended MOS (DEMOS) transistor and ICs therefrom includes providing a substrate having a semiconductor surface, the semiconductor surface including at least a first surface region that provides a first dopant type. A patterned masking layer is formed on the first surface region, wherein at least one aperture in the masking layer is defined. The first surface region is etched to form at least one trench region corresponding to a position of the aperture. A dopant of a first dopant type is implanted to raise a concentration of the first dopant type in a first dopant type drift region located below the trench region. After the implanting, the trench region is filled with a dielectric fill material. A body region is then formed having a second dopant type in a portion of the first surface region. A gate dielectric is then formed over a surface of the body region and the first surface region. A patterned gate electrode layer is formed over the gate dielectric, a source region in the body region and a drain region in the first surface region on a side of the trench region opposite to the source are formed, and fabrication of the IC is completed.
Owner:TEXAS INSTR INC
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