311 results about "Forward voltage" patented technology

According to the back contact battery and the preparation method thereof provided by the invention, doping elements penetrate through the third doping region between the first doping region and the second doping region through high-temperature diffusion to form an electric leakage channel, so that a new back surface structure of the back contact battery is provided. The third doped region is formed by mixing the doping elements of the first doped region and the doping elements of the second doped region, doping of the two impurities is completed at a high temperature in one step, so that an electric leakage channel of an overlapping region is not generated, and the overlapping region of the two doped semiconductor layers with opposite conduction types in the thickness direction of the semiconductor substrate is removed, so that the conductivity of the semiconductor substrate is improved. Therefore, electric leakage loss of the back contact battery in a forward voltage area can be controlled, current in the electric leakage channel is introduced to the grid line of the first electrode or the second electrode through the electric leakage channel or the connecting electrode, the hot spot risk of the back contact battery is reduced, the safety performance of the back contact battery is effectively improved, and the service life of the back contact battery is prolonged. And the back contact battery has relatively high working performance.

The invention provides an LED lamp adaptive speed regulation heat dissipation method and system based on real-time junction temperature monitoring. The method comprises the following steps: S100, acquiring a PWM signal or an analog signal of an LED driving command signal in real time; s200, on the basis of the change of the driving instruction signal, feedforward prediction is carried out by using a dynamic thermal inertia mapping model, and a feedforward fan control quantity is generated; s300, LED junction temperature is monitored in real time through a forward voltage method, and feedback fan control quantity is generated through a feedback controller according to the deviation between the real-time junction temperature and the target junction temperature; and S400, synthesizing the feedforward control quantity and the feedback control quantity to generate a fan PWM control signal, outputting the fan PWM control signal to a fan driving circuit, and adjusting the rotating speed of the cooling fan. According to the method, driving signals and junction temperature information are processed in parallel, and feedforward and feedback control is combined, so that self-adaptive accurate regulation and control are realized, thermal load change is quickly responded, system lag is effectively inhibited, and LED heat dissipation performance is optimized.

The invention relates to the field of semiconductor device testing, and discloses a power device thermal resistance testing method and power device thermal resistance testing equipment, and the method comprises the following steps: controlling an environment to rise to a first preset temperature in a temperature gradient manner, and sequentially applying a calibration current to a power device at each temperature gradient to test a first forward voltage drop of the power device; calibrating the power device according to the temperature value of each temperature gradient and the first forward voltage drop value corresponding to each temperature gradient to obtain a temperature-voltage drop curve; controlling the environment temperature to be a second preset temperature, applying a first rated power to control the power device to reach a heat balance state, applying a calibration current to the power device to test a second forward voltage drop of the power device, and measuring the shell temperature of the power device; and obtaining the thermal resistance of the power device according to the temperature-voltage drop curve, the second preset temperature, the second forward voltage drop, the first rated power and the shell temperature of the power device. According to the invention, the problem of inaccurate thermal resistance test of the power device is solved.

The invention belongs to the field of power device driving, particularly relates to the technical field of crosstalk suppression, and more particularly relates to a crosstalk suppression driving circuit. Through cooperative work of the driving module, the detection module, the buffering module and the clamping module, crosstalk is effectively suppressed while the switching speed is ensured. The driving module ensures normal switching action of the power device; the detection module converts the drain voltage change rate into a detection signal in real time, and recognizes the crosstalk risk in advance; the buffer module suppresses forward crosstalk by absorbing grid forward voltage spikes; the clamping module immediately conducts a low-impedance path from the grid electrode to the negative power supply when the detection signal exceeds a threshold value, and negative crosstalk is quickly eliminated. According to the design, the suppression circuit is only activated when the voltage change rate exceeds the standard, switching delay caused by a traditional fixed buffer circuit is avoided, accurate and rapid crosstalk suppression can be achieved, and finally the suppression effect and the system reliability are remarkably improved while the high-speed switching performance is maintained.

A bidirectional crosstalk suppression driving circuit suitable for a wide bandgap power semiconductor device comprises a push-pull circuit and a crosstalk suppression auxiliary circuit, the push-pull circuit is connected with the crosstalk suppression auxiliary circuit, and the crosstalk suppression auxiliary circuit is connected with a grid electrode and a source electrode of the power semiconductor device. The push-pull circuit is used for generating a driving voltage signal to drive a power semiconductor device. When the power semiconductor device is subjected to positive crosstalk, positive voltage is generated through a negative voltage capacitor in the crosstalk suppression auxiliary circuit, and the influence of negative overvoltage generated on a driving resistor when the positive crosstalk occurs is reduced; when the power semiconductor device is subjected to negative crosstalk, gate equivalent driving impedance is reduced through an RD auxiliary branch in the crosstalk suppression auxiliary circuit, and reverse overvoltage caused by negative crosstalk is reduced. The circuit has compatibility and economical efficiency, and is simple in structure and easy to operate. The method is of great significance in improving the turn-on and turn-off reliability of a power semiconductor device and guaranteeing stable operation of a system.

The invention relates to the field of static frequency converters, and discloses a static frequency converter protection system comprising a control unit used for generating a control signal and performing bidirectional communication with a valve control unit through an optical fiber; the thyristor control unit obtains energy through a circuit and sends a first return signal after energy obtaining is completed; and the valve control unit is used as a bridge between the control unit and the thyristor control unit and is used for receiving and collecting the first return signal. When the forward voltage of the thyristor driven by the thyristor control unit exceeds a set protection value, the thyristor control unit triggers the thyristor emergently, and returns an overvoltage protection signal to the valve control unit at the same time. The valve control unit gathers overvoltage protection signals, and when the number of the thyristors subjected to overvoltage protection at the same time is larger than a tripping constant value set by the valve control unit, the valve control unit sends a tripping request signal to the control unit to inform the control unit of interlocking tripping.

The invention provides a DC-DC forward boost-buck power conversion circuit based on cascaded Cuk topologies, and relates to the technical field of power electronic conversion, the circuit is mainly formed by cascading two Cuk topologies sharing one inductor, and the circuit also comprises a power supply end, a load end and a same-frequency driving signal generator. The same-frequency driving signal generator controls the two power switch tubes in the Cuk topology through a same-frequency signal, and the output voltage is adjusted by adjusting the duty ratio. The circuit not only keeps the advantage of continuous input and output current of a traditional Cuk circuit, but also converts the polarity of the output voltage from the reverse direction to the forward direction, and meanwhile, the voltage gain is remarkably improved, so that forward voltage conversion can be efficiently and smoothly realized. The circuit structure has the characteristics of high gain, forward output, continuous current, simple control and the like, and is suitable for occasions requiring high-efficiency and high-quality electric energy conversion, such as new energy power generation and energy storage, electric automobiles, precision industry and the like.

The invention relates to a power supply circuit with a monitoring function comprising a first current branch (2) with a first controllable section (20) and at least one load (21) arranged in series therewith, and a second current branch (3) with a second controllable section (30) and at least one load (31) arranged in series therewith. A controllable converter (4) is connected to the first and second current branches (2, 3) to supply a total current. A control circuit (5) with a control input, which is connected to the set input (10), wherein the control circuit (5) is coupled to the first controllable section (20) to adjust a current through the first current branch (2) depending on a provided first set signal.The second controllable branch (30) is coupled to the first current branch (2) and to the set input (10) in a dependent control loop, which is influenced by the current flowing in the first circuit (2) and the forward voltage of the two loads (21 and 31). It is configured to control a current through the second current branch (3) depending on an operating state through the first current branch (2) and a second set signal. Furthermore, a current-controlled monitoring circuit is provided, which is connected to a node between the respective current branch and the load connected in series with it. This circuit is configured to generate an error signal in response to a predefined deviation of one of the currents flowing into the current-controlled monitoring circuit, which reflects the state of the respective load.

An optoelectronic module includes at least one light emitting diode that emits light with a luminous intensity during operation. The optoelectronic module also includes an integrated circuit which sets an operating current of the light emitting diode and measures a value of the forward voltage of the light emitting diode during operation. The integrated circuit determines a degradation of the light emitting diode by measuring the value of the forward voltage and increases or decreases the electrical operating current as a function of the measured value of the forward voltage, such that a change in the luminous intensity due to the degradation is at least partially compensated. The integrated circuit or a measurement-control-unit for controlling the integrated circuit includes a memory in which calibration data is stored. The calibration data comprises a value of the forward voltage of the light emitting diode as a reference value for determining the degradation.

The invention relates to the technical field of lamp bead active heat dissipation, and discloses an LED lamp bead active heat dissipation system and method, and the method comprises the steps: injecting a micro-current pulse into a PN junction of an LED chip through a constant current source, collecting a forward voltage drop sampling value, and collecting a substrate temperature sampling value; calculating a junction temperature value based on the forward voltage drop sampling value, and calculating a junction-to-case temperature difference value and a substrate temperature rise rate value; setting an early-warning state identifier when the junction-to-case temperature difference value exceeds an early-warning threshold value and the duration meets a preset duration, setting an alarm state identifier when the junction-to-case temperature difference value exceeds an alarm threshold value, and shielding thermal runaway detection when the substrate temperature rise rate value exceeds an environment thermal shock threshold value and the junction-to-case temperature difference value is smaller than an environment exclusion threshold value; when the state identification is the normal state identification, calculating a first compensation current value; and when the state identification is the early warning state identification, a second compensation current value is calculated, and when the state identification is the alarm state identification, an alarm current limiting value is calculated, so that the working stability and long-term reliability of the LED in a wide temperature range are ensured.

The invention relates to the technical field of data processing, in particular to a high-frequency diode conduction loss characteristic test system, which comprises an acquisition module, a first judgment module, a second judgment module, a first determination module, a second determination module, an adjustment module and an output module. According to the method, multiple key data are collected, rapid screening is carried out according to forward voltage and reverse recovery charges, then, hidden defects of abnormal dynamic relevance of parameters are analyzed and identified by introducing shell temperature, and finally, a high-loss diode is obtained; the trend abnormity is identified by using the space-time distribution characteristics of the high-loss diode, and the loss reason is accurately detected through the voidage fluctuation mode; and meanwhile, based on a self-adaptive adjustment mechanism fed back by the test accuracy, a test report is finally output, so that the problems of low identification accuracy of the high-loss diode and low detection accuracy of loss reasons caused by excessive dependence on static parameters and incapability of adapting to complex and changeable working conditions are effectively solved.

A temperature sensor device is capable of measuring minute temperature changes while being manufactured at low cost without needing a high performance IC tester. A temperature sensor device includes a temperature sensor circuit 2 and a temperature sensor 1. The temperature sensor 1 includes a PN junction element 15 which is a temperature sensing element, a variable current source which supplies different forward currents of at least two values to the PN junction element 15 and a constant voltage source 16 which outputs a constant voltage having the same temperature properties as a forward voltage of the PN junction element 15.

A semiconductor device is capable of generating a correct over-temperature detection signal for an output transistor even if a reverse current from a load to the output transistor occurs. A temperature sensing diode is formed on the semiconductor substrate adjacent to the power transistor, and generates a forward voltage whose magnitude reflects the temperature of the output transistor. The over-temperature detection circuit detects an over-temperature state of the power transistor by comparing a magnitude of the forward voltage with a reference voltage, and asserts an over-temperature detection signal. The reverse current detection circuit detects the occurrence of a reverse current in the power transistor and asserts a reverse current detection signal during the occurrence. The semiconductor device performs processing such as masking an over-temperature detection signal using a reverse current detection signal.

An LED driver configured to control a LED fixture comprising a plurality of LED groups is described, each LED group comprising at least one LED forming a series connection with a switch, wherein the plurality of LED groups are arranged in a parallel connection, the LED fixture further comprising a capacitor arranged in a parallel connection to the plurality of LED groups, the LED driver comprising:a power converter for converting an input power from a power source to a current which is provided to the plurality of LED groups;a control unit configured to control the power converter to provide the current to the plurality of LED groups, and wherein the control unit is further configured tocontrol an operation mode of the switch of the LED group between a nominal mode, wherein the switch operates in a closed nominal state or an open nominal state, anda transition mode, wherein the switch operates in a semi-closed state, wherein a gate to source voltage of the switch of the LED group is lower than the gate to source voltage of the respective switch when operated in the nominal mode,switch the current from flowing through a first LED group to flowing through a second LED group, wherein the first LED group has a higher forward voltage than the second LED group, by switching the switch of the first LED group in the open nominal state and the switch of the second LED group in the semi-closed state during a transient period.

The invention discloses a groove SiC MOSFET device and a preparation method thereof. The preparation method comprises the following steps: epitaxial growth; performing P-type ion implantation for the first time; performing first-stage groove etching; performing N-type ion implantation; implanting P-type ions for the second time; carrying out second-stage groove etching; growing gate oxide, polycrystalline silicon and an interlayer insulating layer; carrying out metal deposition; the beneficial effects of the invention are that the multi-stage trench structure is combined with the plane gate and the trench gate, so that the channel density is increased, the current capability is provided, and the conduction loss is reduced; the MPS diode structure is integrated, the forward voltage drop of the body diode is reduced, the discharge capacity is improved when inrush current occurs in the circuit, the reverse follow current capacity can be improved through the parallel Schottky diode structure, and electronic elements needed by a peripheral circuit are reduced; by integrating the built-in field plate structure, the electric field concentration effect at the bottom of the trench gate is effectively relieved.

The invention discloses a power diode based on an MOF, a preparation method, a 3D chip packaging method and application, belongs to the technical field of electronic materials and power devices, and particularly relates to a composite structure based on an n-Si substrate / an (n-Si)-(ZIF-8) composite layer / an Ag layer, preparation, a 3D chip packaging method and application of the composite structure in the field of power devices. The reverse withstand voltage of the power diode based on the n-Si substrate / ''(n-Si)-(ZIF-8) composite layer'' / Ag layer composite structure exceeds 200V, the forward conduction voltage of the power diode is 0.25-1.5 V, the reverse bias voltage applied to the power diode is 0-200V, the reverse leakage current is basically not increased along with the increase of the reverse bias voltage, and the reverse leakage current is 0.2-2.1 mA (at the reverse voltage-100V). Compared with a conventional power diode based on an n-Si substrate / Ag layer Schottky structure, the performance of the power diode provided by the invention has the advantages that although the forward voltage is basically unchanged, the reverse voltage is increased by 80-400%, the reverse saturation current is reduced by 50-800%, and the highest yield reaches 95%.

The application discloses a kind of semiconductor chip epoxy resin encapsulation nanoscale gap control method, it is related to semiconductor packaging technical field.The present application includes: S1, wafer is taken out from vacuum packaging and is carried out dicing processing, plasma cleaning machine is cleaned, and is carried out and leads wire;S2, after wire bonding, injection molding is carried out;S3, nanoscale gap growth film method;S4, confirm growth dense film;S5, using 150 DEG C baking 55-65 minutes, ensure that internal water vapor is normally removed;S6, normal arrangement laser overflow glue and plating process, surface water removal normal baking after plating is completed;S7, after cutting rib, arrange electrical characteristic parameter test, leakage current IR, forward voltage drop VF, VB avalanche voltage.The present application solves the problem of product reliability caused by the fact that the pressure of plastic encapsulating material and injection molding equipment is not enough due to small packaging, which is beneficial to improve the problem of high-quality miniaturization of industrial equipment, and reduces the influence of device problems on system.

The invention belongs to the technical field of semiconductor material processing, and particularly relates to a monocrystalline silicon preparation method for improving forward voltage drop of a power device, the power device and monocrystalline silicon, and the method comprises the following steps: when a monocrystalline silicon rod is drawn by a czochralski method, the growth crystal orientation is 1t by controlling crystal pulling parameters and cooling parameters in an equal-diameter process; 111gt, 111gt; the silicon single crystal rod, the crystal pulling parameters and the cooling parameters are configured as follows: interstitial oxygen precipitation can be inhibited to form silicon dioxide precipitation, so that the volume microdefect density in the grown silicon single crystal is lower than a preset threshold value, and the method provided by the invention inhibits the interstitial oxygen precipitation process by reasonably configuring the crystal pulling parameters and the cooling parameters, so that the yield of the silicon single crystal is improved. According to the present invention, the silicon dioxide deposition formation is reduced, such that the volume micro-defect density in the grown monocrystalline silicon is lower than the preset threshold value, and when the monocrystalline silicon is applied to the ultra-fast recovery diode product, the forward voltage drop value VF can be reduced so as to be within the range of 1.3-1.7 V so as to meet the customer requirements.

A light source includes a first light-emitting unit including one or more first light-emitting elements connected in series, a second light-emitting unit including second light-emitting elements connected in series. The number of the second light-emitting elements is greater than that of the one or more first light-emitting elements. The first and second light-emitting units are connected in parallel to each other. A first light emission peak wavelength of the first light-emitting element is different from a second light emission peak wavelength of the second light-emitting element. A second forward voltage of the second light-emitting element is lower than a first forward voltage of the first light-emitting element. An absolute value of a difference between a forward voltage of the first light-emitting unit and a forward voltage of the second light-emitting unit is lower than the second forward voltage of the second light-emitting element.

The utility model relates to the technical field of medical equipment, and particularly discloses a bipolar nanosecond pulse synchronous output circuit and ablation equipment, which comprise a positive pulse output circuit and a negative pulse output circuit, the positive pulse output circuit comprises a positive pulse charging unit, a positive pulse output control unit, a positive pulse transmission unit and a positive pulse output electrode wire which are electrically connected in sequence; the negative pulse output circuit comprises a negative pulse charging unit, a negative pulse output control unit, a negative pulse transmission unit and a negative pulse output electrode wire which are electrically connected in sequence; the positive pulse transmission unit at least comprises a forward multiplication transmission unit which is used for performing forward voltage multiplication or forward current multiplication on the forward output pulse signal; the negative pulse transmission unit at least comprises a negative multiplication transmission unit which is used for carrying out negative voltage multiplication or negative current multiplication on the negative output pulse signal. The bipolar nanosecond pulse synchronous output circuit provided by the utility model can improve instant pulse energy of nanosecond pulse tumor ablation equipment.

A Schottky barrier diode, including a first n-type semiconductor layer including a β-Ga2O3-based single crystal epitaxial layer and having a first carrier concentration that determines reverse breakdown voltage and forward voltage, a second n-type semiconductor layer including a β-Ga2O3-based single crystal substrate and having a second carrier concentration that is higher than the first carrier concentration and determines forward voltage, a Schottky electrode provided on a surface of the first n-type semiconductor layer on the opposite side to the second n-type semiconductor layer, and an ohmic electrode provided on a surface of the second n-type semiconductor layer on the opposite side to the first n-type semiconductor layer. The β-Ga2O3-based single crystal substrate includes a surface that has a plane orientation rotated by an angle of not more than 37.5° from a (010) plane.

Device for controlling at least one light-emitting diode (LED1) to generate short light pulses (LP),- with an H-bridge (H) consisting of a first half-bridge (HB1: T1, T2) with a first transistor (T1) and a second transistor (T2) and a second half-bridge (HB2: T2, T3) with a third transistor (T3) and a fourth transistor (T4),- wherein the H-bridge (H) is controlled by a control unit (ST) and- wherein the H-bridge (H) can be operated by the control unit (ST) in pulsed mode (GPB) and in quasi-continuous mode (QDB) and- wherein the first half-bridge (HB1: T1, T2) is supplied with electrical energy from a first positive supply voltage (VCC1) and a first negative supply voltage (GND1) and- wherein the second half-bridge (HB2: T3,T4) is supplied with electrical energy from a second positive supply voltage (VCC2) and a second negative supply voltage (GND2) and- wherein the light-emitting diode (LED1) is connected with its cathode (K) to the output of the first half-bridge (HB1: T1, T2) and- wherein the light-emitting diode (LED1) is connected with its anode (A) to the output of the second half-bridge (HB2: T3, T4) and- wherein the first positive supply voltage (VCC1) and the second positive supply voltage (VCC2) can be equal and- wherein the first negative supply voltage (GND1) and the second negative supply voltage (GND2) can be equal and- wherein the light source, in particular the one or more light-emitting diodes (LED1), represents the load of the H-bridge (H) between the output of the first half-bridge (HB1: T1, T2) and the output of the second half-bridge (HB2: T3, T4) and- wherein the control device (ST) is designed to operate in pulsed mode (GPB) a “PAn” condition,in which a forward voltage in the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained by the H-bridge (H) for longer than a turn-on time (τpp), and- wherein the control device (ST) is designed so that in pulsed operation (GPB) a "PAus" state, in which a reverse voltage against the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained by the H-bridge (H) for longer than a clearing time (τpn), and- wherein the clearing time (τpn) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1), and- wherein the turn-on time (τpp) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1).

MOS junction barrier Schottky diode relates to the technical field of power semiconductor device. N-type substrate, N-type epitaxial layer, deep P region, slot gate, slot gate oxide layer, conductive enhancement region and isolation oxide layer are arranged between cathode metal and anode metal, the lower surface of the N-type substrate is in contact with the cathode metal, the upper surface is in contact with the lower surface of the N-type epitaxial layer, the upper surface of the N-type epitaxial layer is in contact with the P region, the conductive enhancement region is arranged on the outer surface of the slot gate oxide layer and is in contact with the N-type epitaxial layer, part of the slot gate oxide layer, the conductive enhancement region, the isolation oxide layer and part of the deep P region are respectively in contact with part of the anode metal. The MOS junction barrier Schottky diode structure of the application improves the carrier density at the channel, reduces the channel resistance, and further improves the reverse leakage current characteristics and the forward voltage drop by inserting a slot gate MOS structure in the adjacent P region of the traditional junction barrier Schottky (JBS) diode.

The invention discloses an I-type modularized direct-current solid-state circuit breaker, which relates to the technical field of direct-current solid-state circuit breakers and comprises four horizontal bridge arms, namely an FBSM1, an FBSM2, an FBSM3 and an FBSM4, a vertical bridge arm group, and four inductors, namely an L1, an L2, an L3 and an L4. According to the circuit breaker, the removal time of monopole grounding and interelectrode short circuit faults is short and far faster than that of a traditional circuit breaker, and the impact of fault current on equipment can be greatly reduced. Differentiation module control is adopted for different faults, power supply of the other pole is not affected when the faults are removed, and the system reliability is improved. When inter-electrode short circuit occurs, forward voltage is inserted into the full-bridge sub-module to enable the voltage of a short-circuit point to be close to zero, reverse discharge of a capacitor is limited, fault current is cleared at the first zero crossing point of current, fault expansion is avoided, and the problems that an existing traditional solid-state circuit breaker is insufficient in single-pole grounding fault processing capacity, influences system power supply reliability, is single in function and the like are solved.

A device for measuring oxygen saturation is disclosed. The device includes circuitry configured to measure a first forward voltage across an anode and a cathode of a first light-emitting diode (LED) when a first current is applied, and to measure a second forward voltage across an anode and a cathode of a second light-emitting diode (LED) when a second current is applied. The circuitry is further configured to determine a difference in the measured forward voltages based on a comparison of the first and second forward voltages, and to determine that the first and second LEDs are valid based on a difference in the calibrated forward voltages and the measured forward voltages. In response to determining that the first and second LEDs are valid, the circuitry is configured to determine an oxygen saturation level.

The application relates to the technical field of micro electro mechanical system (MEMS), and particularly relates to a MEMS switch and a preparation method thereof, wherein the MEMS switch comprises a support structure layer and an encapsulation structure; a cavity is released on the support structure layer, and a matching thin film and a static area are formed; the encapsulation structure and the support structure layer jointly form an airtight chamber; a piezoelectric actuator comprises a piezoelectric driving electrode and at least one layer of piezoelectric thin film; an electric contact structure comprises a dynamic contact electrode and a static contact electrode arranged in the airtight chamber; the dynamic contact electrode is arranged on the piezoelectric actuator, and the static contact electrode is arranged towards the dynamic contact electrode and fixedly arranged. The piezoelectric actuator and the dynamic contact electrode are directly prepared on a wafer base, and the static contact electrode opposite to the dynamic contact electrode is fixedly arranged in the encapsulation structure; by applying a forward voltage difference or a reverse voltage difference to the piezoelectric actuator, the on-off of the electric contact structure is realized, and the overall structure is simple and controllable.

This invention relates to the field of chip technology, specifically to a high-voltage GPP chip with composite trenches and its fabrication method, comprising: N layers arranged sequentially from bottom to top. + Substrate, N-layer, P-layer + Layer, the N + The substrate layer and the N layer form an N-N + Substrate, the P + Layer P and N layers constitute P + -N junction; trenches in the chip edge region, with the inner walls of the trenches covered by a composite passivation layer, the composite passivation layer comprising an inner boron-doped silicon glass layer and an outer phosphorus-doped silicon glass layer; an isolation ring on the inner side of the trench; covering P + Layer surface and N + The metal layer on the lower surface of the substrate serves as the electrode lead-out layer of the chip. The optimized fabrication process of this invention is highly compatible with each structure, achieving a comprehensive improvement in the overall performance of the chip. The matching of each fabrication step with the structural design allows the functions of each component of the chip to be fully utilized, synergistically achieving a comprehensive effect of high breakdown voltage, low leakage current, low forward voltage drop, and excellent high-temperature stability.

The invention relates to a manufacturing method of a trench Schottky diode with an adjustable forward voltage. A Schottky diode includes a substrate having an active region. The grooves extend into the substrate epitaxial layer, the side walls and the bottom surfaces of the grooves are lined with insulating layers, and the rest part of each groove is filled with polycrystalline silicon (polycrystalline silicon) filler. A doped region having a dopant of the same conductivity type as the semiconductor substrate is implanted in the epitaxial layer at a position between adjacent trenches. A silicide is provided at each polysilicon filler and a Schottky barrier is provided at each doped region. An anode contact of the diode contacts the silicide and the Schottky barrier, and a cathode contact of the diode contacts the lower surface of the substrate. The dopant concentration level of the selected doped region controls the setting of the forward voltage (VF) level of the Schottky diode.

The invention discloses a low-leakage high-speed voltage flat-turn circuit. The low-leakage high-speed voltage flat-turning circuit comprises a voltage flat-turning main circuit. The low-leakage high-speed voltage flat-turning circuit also comprises a forward output circuit, a reverse output circuit or both. The forward output circuit comprises a forward voltage flat-turn circuit and a forward end buffer circuit. The voltage flat-conversion main circuit is connected with the input end of the forward voltage flat-conversion circuit and the input end of the backward voltage flat-conversion circuit. And the output end of the forward voltage flat conversion circuit is connected with the forward end buffer circuit. The reverse output circuit comprises a reverse voltage flat-turn circuit and a reverse end buffer circuit. And the output end of the reverse voltage flat conversion circuit is connected with the reverse end buffer circuit.

The invention discloses a multi-time programmable memory device and a preparation method thereof, and relates to the field of semiconductors, and the memory device comprises a substrate, the interior of the substrate is provided with a buried oxide layer, and the top end of the substrate is provided with a first groove; the top end of the substrate and the inner wall of the first groove are provided with oxide layers, the top end of the oxide layer located on the inner wall of the first groove is provided with a floating gate region, and the top end of the floating gate region is provided with an insulating layer matched with the oxide layer. According to the invention, the Schottky contact structure is introduced between the control gate and the active channel region, so that electrons can be triggered to tunnel from the channel region to the floating gate region under the condition that extremely small forward voltage is applied to the control gate, and effective programming of the floating gate is realized, so that the reliability of the storage unit is improved, and the service life of the storage unit is prolonged; in addition, the floating gate region adopts a groove structure design, so that an electron transmission path is effectively shortened, the programming time is further shortened, and the working efficiency of the device is improved.