155 results about "Junction temperature" patented technology

The application provides a color deviation compensation method and system of an LED atmosphere lamp group, which comprises the following steps: collecting the junction temperature of the LED atmosphere lamp group in real time; obtaining the color deviation corresponding to the junction temperature according to the junction temperature and a preset temperature-color deviation database; the temperature-color deviation database is used to represent the nonlinear mapping relationship between the junction temperature and the color deviation; correcting the preset target color coordinates reversely according to the color deviation to obtain corrected color coordinates; determining the mixing ratio of RGB three channels according to the corrected color coordinates and the three primary color coordinates of the LED atmosphere lamp group; determining the PWM duty cycle of the RGB three channels according to the mixing ratio; and sending the PWM duty cycle to a driving chip to drive the LED atmosphere lamp group to light up. The application improves the color deviation compensation precision.

This invention belongs to the field of equipment life prediction technology, and discloses a method and related apparatus for predicting the remaining life of a photovoltaic inverter. The method includes: acquiring junction temperature data of the IGBT modules in the photovoltaic inverter under test; determining the number of junction temperature thermal cycles of the IGBT modules in the photovoltaic inverter under test based on the junction temperature data; calculating the cumulative damage of the IGBT modules in the photovoltaic inverter under test based on the number of junction temperature thermal cycles; and calculating the remaining life prediction result of the photovoltaic inverter under test based on the cumulative damage of the IGBT modules. This invention can more accurately predict the remaining life of the IGBT modules, and thus more accurately predict the overall remaining life of the photovoltaic inverter. The prediction process does not require extensive data collection and training of the prediction model, effectively reducing the difficulty of life prediction and improving prediction efficiency.

The application provides a kind of IGBT junction temperature prediction model construction method and system, it is related to power electronic device thermal management technical field, method includes: obtaining the initial data set of the transient thermal response relationship between the IGBT chip and the NTC temperature measuring point in the IGBT power module;Based on the initial data set, the neural network model is trained, and the nonlinear function relationship between time and thermal impedance is learned and characterized;The preset new time series is input into the trained neural network model, and the optimized thermal impedance data set with continuous time and noise suppression is generated;Based on the data set, the lumped parameter thermal network model is parameter fitted, to identify its thermal resistance and heat capacity parameters, complete the construction of junction temperature prediction model.The application uses neural network as a data optimization tool in the parameter identification process of physical model, only uses the temperature signal of NTC temperature measuring point provided by the module, realizes the accurate, convenient online prediction of IGBT junction temperature.

This invention relates to the field of semiconductor technology, and more particularly to a packaging frame, packaging structure, and heat dissipation device for SiC MOS applications. It includes: a first frame comprising a heat dissipation island and a first pin portion connected in sequence; the top surface of the heat dissipation island is located above the first pin portion, and a chip carrier area is provided at its bottom; a stepped area is provided at the edge of the top surface of the heat dissipation island; a chamfered step is provided between the stepped area and the first pin portion; the thickness of the heat dissipation island is greater than the thickness of the first pin portion; and a second frame is spaced apart and disposed on the side of the first frame. This invention achieves decoupling of electrical connections and heat conduction paths, significantly improving thermal management capabilities, enhancing heat dissipation capabilities, and reducing system thermal resistance. The top heat dissipation design improves Rth(j-a) by approximately 20% and Rth(j-h) by approximately 50% compared to traditional bottom heat dissipation; it also addresses the requirement of achieving a maximum operating junction temperature of 175~200℃ for SiC chips.

This invention relates to a thermal control method for grid-connected converters that balances low harmonics and junction temperature limitations, belonging to the field of intelligent power electronics control. It employs a DPWM modulation method that locks the optimal clamping interval under overload conditions and couples this method with switching frequency control. Offline simulation is used to scan the switching frequency, obtaining data on the peak junction temperature and grid current variations as a function of the switching frequency, which is then stored in a lookup table accessible to the controller. During operation, feasible switching frequency ranges are selected based on junction temperature and dual constraints, and a recommended switching frequency range is provided. Within the acceptable frequency range, the optimal frequency reduction point is selected according to a proposed selection function, thus achieving a dynamic trade-off between thermal safety and system performance during overload. This invention, by fully considering the coupling effect of DPWM and frequency reduction, provides the optimal operating frequency point to ensure the safe and compliant operation of the converter under overload conditions.

This invention belongs to the field of power electronics technology and relates to a DC electronic switch circuit with over-temperature protection and spike suppression, and its operating method. It includes: a power unit, whose input terminal is connected to the positive DC input terminal H3, and whose output terminal is connected to the positive DC output terminal H5; a drive unit, whose input terminal is connected to the drive signal terminal H1, and whose output terminal is connected to the control terminal of the power unit; an over-temperature protection unit, whose sampling terminal is thermally coupled to the power unit, and whose control terminal is connected to the drive unit; a spike suppression unit, including a first spike suppression branch and a second spike suppression branch; and a negative DC output terminal H6 connected to the negative DC input terminal H4. This invention achieves real-time monitoring and active protection of the junction temperature of the power device, rapidly shutting down in case of overheating to avoid thermal breakdown; simultaneously, it utilizes bidirectional spike suppression technology to effectively block surge impacts, ensuring the safe and reliable operation of the electronic switch in harsh electrical environments.

The application relates to the technical field of semiconductor laser control, and discloses a wavelength stabilization control method of a semiconductor laser, which comprises the following steps: constructing an equivalent heat transfer model of a multi-section semiconductor laser; monitoring the radio frequency data stream duty cycle of a gain section, switching the injection path of a low-frequency pilot signal to extract a global equivalent low-frequency thermal resistance, updating a time-varying low-frequency physical RC node parameter set; combining the transient heat power of the gain section and the equivalent heat transfer model to deduce full-frequency section junction temperature observation data, and decomposing the full-frequency section junction temperature observation data into an extremely low-frequency direct current component, a medium-low-frequency fluctuation component and an extremely transient high-frequency fluctuation component; driving a thermoelectric refrigeration component according to the extremely low-frequency direct current component; generating a medium-low-frequency feedback compensation current according to the medium-low-frequency fluctuation component, combining the extremely transient high-frequency fluctuation component to generate a feedforward compensation current; and injecting the medium-low-frequency feedback compensation current and the feedforward compensation current into a grating section after being combined. The application realizes multi-frequency section decoupling control and improves wavelength stability.

The application discloses a kind of high voltage arc extinguishing devices of electric power grid, including device module, a pair of convection heat dissipation mechanism and uniform heat dissipation mechanism, a pair of convection heat dissipation mechanism is fixedly installed in the downside of device module, convection heat dissipation mechanism includes convection passage assembly, convection temperature difference component and convection cooling component, convection passage assembly is fixedly installed in the downside of device module, convection temperature difference component is set to one side of convection passage assembly, convection cooling component is fixedly installed in the upside of convection temperature difference component.The high voltage arc extinguishing devices of electric power grid of the application is set through corresponding mechanism, in the process of IGBT module high-frequency switch, can quickly cool for IGBT module, reduce its power consumption to heat-up speed, reduce the appearance of junction temperature phenomenon, not only heat dissipation effect can be guaranteed, also greatly reduce the appearance of thermal fatigue failure, effectively reduce the probability of IGBT module failure, reduce the expense of repair.

To provide a temperature estimation circuit for a power transistor capable of correctly estimating a junction temperature even when a threshold voltage Vth varies.SOLUTION: A storage unit 8 stores data indicating the relationship between an inter-terminal voltage Vds_on, a current Id, a junction temperature Tj of a FET 1, and a fluctuation amount Vth_shift of a threshold voltage Vth of the FET 1 with respect to a plurality of gate drive voltages acquired in advance. A temperature estimation unit 7 estimates the junction temperature Tj dependent on the fluctuation amount Vth_shift corresponding to each gate drive voltage stored in the storage unit 8 according to the inter-terminal voltage Vds_on and the drain current Id detected when the gate of the FET1 is driven with a plurality of gate drive voltages, and sets the optimal value obtained by performing statistical processing on each junction temperature Tj estimated for each gate drive voltage Vgs as the final estimated junction temperature Tj.SELECTED DRAWING: Figure 1

This invention provides a junction temperature detection method, apparatus, device, and computer-readable medium. The method obtains the current actual reference point temperature of a semiconductor device and the actual losses of each chip in the semiconductor device. For each chip in the semiconductor device, a first thermal impedance of the chip is corrected using the actual losses of all chips to obtain a second thermal impedance of the chip. The first thermal impedance of the chip is calculated using a simulation model of the semiconductor device. Based on the second thermal impedance of the chip, the actual losses of the chip, and the actual reference point temperature of the semiconductor device, the junction temperature of the chip is determined. Because the first thermal impedance of the chip is corrected using the actual losses of all chips, the accuracy of the finally determined junction temperature of the chip is improved.

This invention is titled "A Test Platform and Test Method for Dynamic Testing of IGBTs," belonging to the field of IGBT testing technology. It primarily provides a fully dynamic IGBT test platform. Its main features are: a test platform composed of a control unit, a main circuit unit, a frequency adjustment unit, and a power cycle control unit; the tested unit is two IGBTs equipped with thermistors; the two IGBTs are respectively mounted in a fixture platform with cooling function; a set operating current and operating frequency, alternately output from a DC power supply, are applied to the two IGBTs respectively; when the IGBT junction temperature reaches the set upper limit, the operating current of the IGBT is cut off, and the IGBT is cooled until its junction temperature reaches the set lower limit, and this cycle is repeated to complete the high-frequency power cycle test. This invention features simple operation and the ability to independently set the IGBT's operating current, operating frequency, and heat dissipation conditions. It is mainly used to evaluate the operating status of IGBT products under different current, frequency, and heat dissipation conditions in simulated IGBT application conditions.

This application provides a semiconductor laser with a ridge-side integrated PN junction temperature control layer and its fabrication method, relating to the field of semiconductor laser technology. The semiconductor laser includes a substrate; an epitaxial structure formed on one side of the substrate along a first direction; the epitaxial structure having a first surface facing away from the substrate; a ridge waveguide layer formed on the first surface and extending along a second direction; a temperature control region formed on the first surface and located on one side of the ridge waveguide layer along a third direction; the temperature control region includes a P-type control layer and an N-type control layer, which form a PN junction. In this application embodiment, because the PN junction has high resistance and small footprint under static operation, it is possible to achieve efficient thermal tuning while reducing the process complexity of the thermal tuning scheme, improving structural reliability, and reducing the footprint, thereby meeting the industrial demands for high integration, low cost, and high reliability.

This invention discloses a heat sink structure optimization design method based on a non-dominated sorting genetic algorithm, belonging to the field of heat sink optimization design technology. The method first determines the structural parameters to be optimized (heat sink length, width, height, fin thickness, fin spacing, substrate thickness) and the optimization objective function (maximum junction temperature of power devices, heat sink mass, heat sink entropy productivity). Then, Latin hypercube sampling is used to sample parameters and establish a geometric model. Sample data is constructed through thermal simulation, and a surrogate model is established using response surface methodology. Finally, multi-objective optimization is performed based on the non-dominated sorting genetic algorithm to obtain the Pareto optimal solution set, and the best solution is selected through comprehensive performance evaluation indicators. This invention effectively reduces heat sink mass and cost while ensuring heat dissipation performance, shortens the R&D cycle, and is applicable to the heat dissipation optimization design of power devices in power electronic systems.

The application relates to the technical field of semiconductor simulation, in particular to a semiconductor device power consumption simulation data analysis method and system, which comprises the following steps: setting a plurality of working scenes and design parameters of a semiconductor device, simulating the semiconductor device under each working scene and each design parameter, obtaining a temperature sensitivity coefficient based on the difference between the junction temperature data and the environmental temperature data of the semiconductor device under any working scene and in combination with the dynamic proportion under the working scene, adjusting the static power consumption data change condition of the semiconductor device under different design parameters, and respectively performing weighted processing on the dynamic proportion adjustment result under the working scene and the change condition of the dynamic power consumption data, so that the difference between the weighted static power consumption change amount and the weighted dynamic power consumption change amount is used to iteratively optimize the design parameters of the semiconductor device. The application effectively reduces the overall power consumption of the semiconductor device and enhances the thermal stability.

This invention discloses a method for IGBT temperature equalization control in parallel DC / DC converters of DC microgrids, belonging to the field of IGBT active temperature equalization control technology. The method includes nine steps: IGBT power loss calculation, IGBT thermal network model establishment, IGBT thermoelectric coupling model construction, IGBT junction temperature calculation in the DC / DC converter, average IGBT junction temperature calculation in the parallel DC / DC converter, calculation of the difference between the IGBT junction temperature and the average junction temperature in the parallel DC / DC converter, calculation of the virtual impedance for IGBT temperature equalization fine-tuning, adding the virtual impedance to the droop control loop, and generating PWM drive signals for the parallel DC / DC converter based on voltage and current dual closed-loop control. This invention adds the virtual impedance for IGBT temperature equalization fine-tuning to the traditional droop control, adjusting the current flowing through the IGBTs in each DC / DC converter, so that the IGBT junction temperatures in each parallel DC / DC converter tend to be uniform, thereby improving the overall system reliability.

This invention relates to the field of circuit thermal equalization analysis technology, and particularly to a method, device, equipment, and storage medium for thermal equalization adjustment of three-phase drive circuits. The method analyzes the sampling voltages of the first, second, and third phases according to a preset linear mapping formula to obtain the maximum junction temperature difference. If the maximum junction temperature difference is less than a hysteresis threshold, the reference duty cycle of the first, second, and third phases is analyzed based on the current operating conditions and a preset amplitude coefficient to obtain a thermal equalization adjustment command. By acquiring the characteristic voltage of the IGBT and obtaining the maximum junction temperature difference through linear mapping, the degree of thermal imbalance is quantified. Adjustment is triggered using the hysteresis threshold, and an equalization command is generated by combining the three-phase reference duty cycle to accurately optimize the junction temperature distribution, reduce the temperature difference, extend device life, and improve the reliability and stability of the three-phase drive circuit.

This application discloses a power module and power device, relating to the field of energy technology. The power module includes a pre-packaged module and a second packaging layer. The pre-packaged module includes a substrate, a chip, and a first packaging layer. The chip is disposed on a first side of the substrate, and the first packaging layer encapsulates the chip. The second packaging layer encapsulates the pre-packaged module, and the Tg value of the first packaging layer is higher than that of the second packaging layer. Using the power module design provided in this application, the pre-packaged body can be packaged as a whole. This allows the first packaging layer to protect the chip, improving the chip's structural strength and facilitating the miniaturization and thinning of the power module. Furthermore, since the Tg value of the first packaging layer is higher than that of the second packaging layer, it improves the junction temperature reliability of the chip, thereby supporting embedded packaging of high junction temperature chips, which enhances the market competitiveness of the power module.

The present application relates to a kind of PWM driving method for realizing LED output high peak power, selects adaptive LED device, definite its rated current I0, rated voltage U0 And maximum tolerance junction temperature, definite light peak power P demand;Build PWM driving device, cooperate with the conduction and cut-off of PWM pulse signal, so that LED device only in the high level stage of PWM pulse conduction, conduction time τ It is 0.1 μs~50 μs, in low level stage cut-off, no current passes through;The frequency of control PWM pulse, according to the demand of actual application scene, fine-tune PWM pulse conduction time τ And peak current I, I is actually adjusted voltage peak value, can further improve the peak power of output light, and make LED device maintain the parameter stable work.The present application realizes super high peak power output, guarantees LED safe and stable work, high flexibility, strong adaptability, simple structure, easy to realize.

The application discloses a kind of EKF-based photovoltaic inverter IGBT thermal network online parameter identification method, comprising the following steps: S1, using third-order Cauer network, the heat transfer path of IGBT module establishes IGBT thermal network discrete state space model;S2, based on IGBT thermal network discrete state space model, design EKF algorithm for thermal parameter joint estimation for the synchronous estimation of state and parameter;S3, using current sensor and voltage sensor real-time acquisition IGBT current waveform, voltage waveform, and preprocessing;S4, in the embedded microcontroller of photovoltaic inverter, with fixed sampling period, EKF algorithm is operated, time update and measurement update are sequentially executed in each cycle, and the optimal estimation value of current time updated thermal parameter and junction temperature estimation value are output.The application can track the actual thermal characteristics of IGBT in real time, solve the parameter mismatch problem, and realize dynamic online identification of thermal parameters.

This application relates to a method and system for IGBT hotspot identification based on transient thermal resistance curves, belonging to the field of IGBT thermal monitoring technology. The method includes: loading the junction-shell transient thermal resistance curve from the datasheet to construct a fractional-order thermal network model containing equivalent thermal resistance, thermal capacity, and fractional order; obtaining model parameters through parameter identification; real-time acquisition of electrical quantities and temperature to calculate power loss; substituting the power loss into the fractional-order differential equation to solve for the junction-shell temperature difference, and combining this with the operating temperature to obtain a real-time estimated junction temperature; and identifying hotspots based on the estimated junction temperature to obtain hotspot status information. This method achieves a complete closed loop from offline modeling and parameter identification to real-time junction temperature monitoring and hotspot identification. This application solves the problems of low reliability of a single junction temperature criterion and the inability to distinguish the location of thermal aging in the chip layer, solder layer, and substrate layer in IGBT thermal monitoring.

The application relates to a power device junction temperature and current monitoring method and system based on source parasitic voltage feature extraction and fixed-point MLP edge reasoning. The method comprises the following steps: capturing a power device source parasitic inductance voltage in real time and converting the power device source parasitic inductance voltage into a voltage integral waveform; extracting a plurality of time domain features sensitive to device junction temperature and current change from the voltage integral waveform; inputting the extracted time domain features into a fixed-point multi-layer perception machine deployed on an edge device to obtain the power device junction temperature and current through reasoning. The application can realize high-precision and high-reliability online monitoring of the junction temperature and current under extremely low delay and limited hardware resources.

The invention discloses a half-bridge power module packaging optimization method, and belongs to the technical field of power module packaging, and the method comprises the steps: S1, analyzing the thermodynamic performance of a power module; s2, establishing a two-dimensional power module finite element model; s3, based on finite element simulation, researching the influence of temperature on the service life and stress strain of the module; s4, based on finite element simulation, obtaining the thermal resistance value of each layer of material and the ratio of the thermal resistance value to the total thermal resistance value; s5, analyzing the relationship between the packaging parameters and the thermal impedance, and giving an optimization direction from the packaging level by integrating the temperature and the stress; and S6, establishing a thermal network model, extracting junction temperature through electrothermal coupling, and verifying life increase. By the adoption of the half-bridge power module packaging optimization method, the size of the module can be reduced, temperature resistance and stability can be enhanced, the problem of multi-physics field coupling can be solved, internal thermal impedance and stress strain can be remarkably reduced, thermal performance can be improved, and the service life of the power module can be effectively prolonged through verification of the working condition of a photovoltaic inverter.

This invention discloses a control method, apparatus, and device for an ANPC-type three-level inverter, including a three-level inverter circuit. The method includes: firstly, determining whether the inverter is switching from a first mode to a second mode; calculating the collector voltage value based on the DC bus voltage, the bridge arm current of the inverter circuit, a preset stray inductance, and a voltage safety margin; if the collector voltage value is less than or equal to a preset voltage value, and the first mode and the second mode meet a first preset condition, and the junction temperature of the outer transistor is greater than or equal to a first preset temperature, and / or the junction temperature of the clamping transistor connected to the outer transistor is greater than or equal to a second preset temperature, then the inner transistor is turned off and another clamping transistor is turned on; the first preset condition includes the first mode outputting a positive potential, the second mode outputting a zero potential, and the output current being greater than zero, or the first mode outputting a negative potential, the second mode outputting a zero potential, and the output current being less than zero. This method evens out the losses of transistors with higher junction temperatures to the inner transistor, preventing transistor damage.

This invention discloses a system and method for estimating the junction temperature of a motor controller based on the thermal losses of power devices, specifically relating to the field of power electronics technology. The system includes a parameter acquisition module, a reference temperature acquisition module, a loss calculation module, a thermal model calculation module, and a junction temperature synthesis module. This invention dynamically corrects the on-state voltage drop and switching losses based on the junction temperature, and uses a backward Euler method to discretize the Foster thermal network model for dual-channel temperature rise calculation, effectively improving the accuracy of junction temperature estimation and transient response speed, providing early warning under rapid acceleration conditions. Furthermore, it adds a model parameter adaptive calibration module to automatically calibrate thermal resistance parameters under quasi-steady-state low-current conditions, compensating for parameter drift caused by long-term operation and ensuring the accuracy of the estimation throughout the entire lifecycle.

The invention relates to an electronic arrangement (1) comprising - a main circuit board (2) and - a semiconductor device (28) arranged on the main circuit board (2), characterized by - a measuring circuit board (26) which is arranged in thermally conductive contact with the semiconductor device (28), and - a temperature sensor (16) which is arranged on the measuring circuit board (26) and is configured to detect a temperature on the basis of which a junction temperature (θ_J) of the semiconductor device (28) can be determined.