255results about How to "Eliminate current" patented technology

The present invention enables reading from and writing onto a magnetic stripe medium with a static read/write head that does not require relative linear motion between the magnetic stripe medium and the head while reading or writing takes place. The reading and writing is accomplished using a stationary uni-dimensional, bi-dimensional, or multi-dimensional conductor array addressing and driving current through an individual conductor element. Reading from magnetic stripe is accomplished by using magnetic flux sensing method such as a fluxgate.

A heart pacemaker which is arranged to stimulate the apical area of the heart. Stimulation of this area provides synchronous mechanical contraction of the left and right ventricles and overcomes the problem of pacemaker induced left bundle branch block type conduction disturbance. The pacemaker has a base surface which conforms to the apical area of the heart and mounts a plurality of epicardial stimulating electrodes. Selection of electrodes can be made to provide the most clinically appropriate stimulation. An opposite side of the pacemaker is arranged to contact the diaphragm and is proved with sensing electrodes to sense activity of the diaphragm and adjust pacing of the heart in accordance with changes in physical activity of the patient. The electrodes used are preferably of capacitive construction, having first and second capacitive plates either side of a dielectric formed by he body of the pacemaker.

The smart card drive of the present invention includes a smart card device having a microprocessor and a smart card adapter serially connected to a local, dedicated modular computer circuit having a network interface circuit. The combination of these components creates a smart card drive that is able to initiate a network connection and communicate with any peer node in a local area network also equipped with a network interface circuit and network listening software.

For a pseudo-SRAM (Static Random Access Memory) macro operating in synchronization with a clock signal, a page operation instructing signal instructing a page operation and a page close instructing signal instructing completion of the page operation are prepared as control signals designating operation modes. A pseudo-SRAM can be selectively operated in a page mode in accordance with the page operation instructing signal and the page close instructing signal, and an operation of row-related circuitry in each clock cycle can be inhibited so that an average power consumption can be reduced. The power consumption of the pseudo-SRAM can be reduced without lowering an operation speed.

This invention provides a device for preventing the influence of conducting material from point detection of projected capacitive touch panel. The device includes a first sensing layer having a plurality of first axial conductive lines isolated from each other and electrically connected to a plurality of first outside-connection conducting wires correspondingly, a second sensing layer having a plurality of second axial conductive lines isolated from each other and electrically connected to a plurality of second outside-connection conducting wires correspondingly, a signal driving line electrically connecting to the first and the second outside-connection conducting wires to provide a first sensing signal, and a sensing unit electrically connecting the first and the second outside-connection conducting wires to sense the sensing signal on the first and the second axial conductive lines. Wherein, the second sensing layer is on a dielectric layer, the first sensing layer, and a substrate in sequence.

High speed SRAM is realized such that a first dynamic circuit serves as a local sense amp for reading a memory cell through a lightly loaded local bit line, a second dynamic circuit serves as a segment sense amp for reading the local sense amp, and a tri-state inverter serves as an inverting amplifier of a global sense amp for reading the segment sense amp. When reading, a voltage difference in the local bit line is converted to a time difference for differentiating low data and high data by the sense amps for realizing fast access with dynamic operation. Furthermore, a buffered data path is used for achieving fast access and amplify transistor of the sense amps is composed of relatively long channel transistor for reducing turn-off current. Additionally, alternative circuits and memory cell structures for implementing the SRAM are described.

A charger for recharging the batteries of a portable electronic device even when no external power source is available. A battery or cell is installed within the charger, and when no access is available to a fixed power source into which the charger can be plugged, the internal battery or cell can be used to recharge the electronic device. The internal battery can be a primary battery or a secondary battery. In the latter case, the internal battery can be maintained in a charged state by means of circuitry which, when the charger is plugged into the external power source, charges the internal battery as well as the battery of the electronic device. The external power source can be either an AC power wall socket, in which case the charger includes AC/DC voltage conversion circuits, or a car lighter socket, or the DC output of a conventional wall charger.

An optical-optoelectronic coupling structure comprising a flip-chip optoelectronic/ultrathin silicon-on-sapphire device mounted on a V-groove, optical-fiber-bearing carrier substrate, including light-reflective structures for launching light into the optical fiber core or transmitting light emitted by the optical fiber core to the optoelectronic device. The optical fiber may be immobilized in the V-groove using a curable resin adhesive characterized by a refractive index substantially similar to the refractive index of the optical fiber.

The present invention relates to an apparatus for detecting one or more analytes, for example analytes selected from the group comprising nucleic acids, metabolites, peptides, proteins, hormones, pesticides, neurotransmitters, ions in blood, electrolytes, toxic gases, pH and biological warfare agents, the apparatus comprising an insulating substrate, at least one first electrode on the substrate at least one elongate nanostructure extending from and electrically connected to the or each said electrode and extending over the surface of the wafer away from the respective electrode, a passivating layer covering the or each electrode, but not all of said at least one elongate nanostructure, a well crossing the at least one elongate nanostructure extending from the or each electrode and forming a static reservoir for a liquid being investigated for the presence of at least one analyte, a reference electrode provided on said substrate within said well or insertable into said well and respective readout pads electrically connected to the or each electrode and to the reference electrode if the latter is provided on the substrate, the at least one elongate nanostructure being capable of being functionalized for detecting one or more analytes.

An apparatus and method that reduces the dark current in each pixel of an image sensor, where each pixel has a pinned photodiode. A negative potential barrier at the transfer gate of each pixel is raised when the photodiode is integrating (when the transfer gate is “off”) to thereby eliminate dark current generation in this region. The potential barrier is applied via a “triple well” transistor circuit structure that is capable of handling a strongly negative voltage. The circuit structure also serves as a conduit for conducting a strongly positive voltage to minimize the potential barrier during signal transfer and readout, thereby reducing image lag.

A system for measuring a free space electric field includes an ultrahigh impedance antenna positioned in the electric field to generate a signal from the electric field. An amplifier having an input port is provided to amplify the signal. The amplifier generates an input bias current which combines with the signal to create an input potential at the input port. An electrical circuit connects the input port to a ground connection and includes at least one circuit element for controlling the input potential to stabilize the signal at the input port.

Methods of fabricating a magnetic flux channel for a transverse wound electric motor by forming a ring of plural adjacent molded magnetic flux channel pole pieces and a second ring of opposite pole pieces. The two rings are mated such that each pole piece mates with an opposite pole piece to form magnetic flux channels and a c-shaped recess forms a winding channel for a transverse phase winding. After mating, the rings are bonded together to form a stator assembly of the transversely wound electric motor. The two rings may be approximately identical, or the two rings may be different as long as they mate to form the plural molded magnetic flux channels and the transverse phase winding channel. The molds may be designed to form the outer surface of a stator assembly. Molds of adjacent phases may be combined back-to-back to reduce part count and increase mechanical strength.

Systems and methods to achieve a circuit for driving one or more infrared transmitter LEDs with temperature compensation have been disclosed. In a preferred embodiment of the invention the circuit has been applied for a rain sensing system. The junction temperature of the LED is measured and compensated by adjusting the driver current of a voltage-to-current converter driving the LED. The LED junction temperature is measured by comparing the difference in the forward diode voltage at different current densities. This voltage difference is extracted when switching the drive currents between different constant values. The measurement results are converted to digital values, which are used by a buffered dual ladder resistive DAC structure to adjust the drive current to temperature variations.

Parallel light emitting diode channels may be controlled using a pulsed control signal input characterized by an input duty cycle and one or more current sense input signals. Each of the one or more current sense input signals is indicative of a current through a corresponding load channel of one or more load channels. One or more pulsed channel current control signals are provided to one or more corresponding dimming controls correspondingly coupled to the one or more load channels. Each of the dimming controls is configured to provide an output signal to a corresponding ON-OFF switch, each of which is coupled in series with a corresponding the load channels. The channel duty cycle of each channel current control signal is adjusted relative to the input duty cycle in response to the current sense input signals.

A triac controller includes a triac driver that provides a triac control signal suitable for connection to a gate terminal of a triac, such that, when in a power-on condition, the control signal carries at least a first firing pulse during each half period of the alternating current power supply. A soft start subcircuit and a zero crossing detector directs the triac driver to produce the first firing pulse at a first firing pulse delay time after the zero crossing time. During a soft start operation the first firing pulse delay time varies monotonically with each successive half period from an initial delay time to a final delay time. An auto-retriggering subcircuit causes the triac driver to produce a second firing pulse at a predetermined retriggering delay time from an end of the first firing pulse if the triac is not in an on conduction state after the end of the first firing pulse during a same half period. The auto-retriggering subcircuit causes the triac driver to produce retriggering firing pulses periodically for so long as the triac is not in the on conduction state during the same half period; however, it is inhibited from causing the triac driver to produce retriggering firing pulses during a predetermined retriggering mask period at an end of the same half period. The soft start subcircuit includes a table specifying a plurality of predetermined first firing pulse delay values. A set signal is used to determine an index into the table. The plurality of predetermined first firing delay values is monotonically organized with respect to the index into the table, and a programmable rate variable determines a rate of change of the first firing delay values during a soft start operation.

The invention provides a three-dimensional metamaterial decoupling structure used for a microstrip array antenna. The structure comprises a public grounding plate, a dielectric substrate on the public grounding plate, two rectangular radiation patches symmetrically arranged on the upper surface of the dielectric substrate, and two coaxial feed ports, wherein five three-dimensional metamaterial decoupling units are embedded in the portion, between the two rectangular radiation patches, in the dielectric substrate in a row. By embedding the five three-dimensional metamaterial decoupling units in a dielectric between microstrip antenna array elements, intercoupling between the microstrip antenna array elements is effectively reduced, and accordingly the isolation of an antenna array is improved.

A mid-voltage variable-frequency driving system and a total harmonic distortion compensation control method are provided in this invention. The mid-voltage variable-frequency driving system includes a total harmonic distortion compensation unit. The total harmonic distortion compensation unit is used to perform an optimal adjustment on a reactive component reference value of a grid-side phase current, such that a harmonic component of the grid-side phase current may be reduced and a power factor of a three-phase switch-mode rectifier module within the mid-voltage variable-frequency driving system may be maintained.

A semiconductor structure with device trench and a semiconductor device in the device trench, that enables realization of high integration, lowered on-resistance, reduction in switching losses and a high operation speed in a semiconductor device provided with a lateral IGBT, and that prevents malfunctions such as latchup when IGBTs or an IGBT and CMOS devices are integrated together. The structure includes an SOI substrate having a supporting substrate, an oxide film and a p⁻-semiconductor layer. An island-like element-forming region is isolated by a trench isolation region from surroundings. The trench isolation region includes an isolation trench with an insulation film on its inner wall. The device trench is formed in the element-forming region. A gate electrode is formed with a gate insulator film in the device trench. A collector region and an emitter region outside are provided respectively on the bottom and the outside of the device trench.

An image sensor including a substrate of a semiconductor material having first and second opposite surfaces; at least one photodiode formed in the substrate on the first surface side and intended to be lit through the second surface; a stacking of insulating layers covering the first surface; and conductive regions formed at the stacking level. The sensor further includes a transparent insulating layer at least partly covering the second surface; a transparent conductive layer at least partly covering the transparent insulating layer; and circuitry for biasing the conductive layer.

For realizing high speed one time programmable memory, bit line is multi-divided for reducing capacitance, so that the bit line is quickly charged when reading and multi-stage sense amps are used for connecting divided bit line, wherein the multi-stage sense amps are composed of a first dynamic circuit serving as a local sense amp for reading the memory cell, a second dynamic circuit serving as a segment sense amp for reading the local sense amp, and a tri-state inverter serving as an amplify circuit of a global sense amp for reading the segment sense amp. When reading data, a voltage difference in the bit line is converted to a time difference for differentiating high data (programmed) and low data (unprogrammed) by the multi-stage sense amps. And buffered data path is connected to the global sense amp for realizing fast data transfer. Additionally, alternative circuits and memory cell structures are described.

The invention provides a direct current monopole grounding fault ride-through method for a multi-port flexible high-voltage direct current power transmission system. The fault ride-through method is realized through coordination matching between an MMC (modular multilevel converter) based on low-resistance grounding and having negative electric level output capability and a mechanical direct current isolation switch; in a fault period, by regulating common-mode component of a reference voltage of each MMC bridge arm, fault transient state overvoltage can be eliminated under the premise of not sacrificing the controllability of the converter; meanwhile, by overlaying a fault pole bridge arm reference voltage with a first reference voltage signal and by controlling a fault pole bridge arm current to be zero, the mechanical direct current isolation switch can isolate direct current fault in a zero current condition, so that foundation is laid for the application of the mechanical direct current isolation switch in the multi-port flexible direct current power transmission system; and in the fault period, the MMC forms a loop through sound direct current bus-alternating current side low-impedance grounding pole-ground, so that transmission of half rated active power can be maintained.