The invention discloses a method for characterizing a trap
time constant causing long-term degradation of a
gate oxide layer of a
silicon carbide MOSFET, and belongs to the field of electronic device testing. Firstly, a specific
grid voltage is applied in a high-temperature environment, so that an interface state trap and a near-interface state trap are fully filled; and then the temperature is kept unchanged, and meanwhile, the
grid voltage is increased, so that a deep-energy-level
oxide layer trap starts to capture charges. In the process, drain-source
voltage is applied at the same time,
trapping of electrons by traps can cause change of
threshold voltage, and transient drain-source current is gradually reduced. By recording the change curve of the drain-source current along with time, it can be observed that the current drops due to trap
filling in the initial stage, and finally the current is gradually stable along with the trap tending to be saturated. According to the invention, the
time constant of the device
oxide trap is accurately measured, and the influence of other traps of the device on the measurement result is avoided. The method has the advantages of simplicity in operation, high
repeatability and high reliability. And the
oxide layer trap of the device can be accurately represented in actual work.