1778 results about "Flash memory" patented technology

The invention relates to the technical field of cores, and discloses a method and a system for realizing USB flash disk equipment interaction based on a flash memory encryption technology, which comprises the following steps of: dividing an encryptable data block of a flash memory controller, and determining a dynamic entropy weight of the encryptable data block by utilizing an equipment interaction instruction and a random noise characteristic signal; generating a self-adaptive key generation sequence capable of encrypting data blocks through an address allocation mode and a dynamic entropy weight of a flash memory controller; calculating a side channel leakage risk index of the flash memory controller, and setting a security level label of an encryptable data block in combination with a self-adaptive key generation sequence; the method comprises the following steps: setting a differentiated security protection mechanism of an encipherable data block by constructing an access control matrix of the encipherable data block and an encryption risk area of a flash memory controller; and generating a secure interaction scheme of the USB flash disk equipment based on the self-adaptive key generation sequence in combination with the differential security protection mechanism and the access control matrix. According to the invention, the interaction safety and reliability of the USB flash disk equipment can be improved.

This disclosure provides techniques for managing memory which match per-data metrics to those of other data or to memory destination. In one embodiment, wear data is tracked for at least one tier of nonvolatile memory (e.g., flash memory) and a measure of data persistence (e.g., age, write frequency, etc.) is generated or tracked for each data item. Memory wear management based on these individually-generated or tracked metrics is enhanced by storing or migrating data in a manner where persistent data is stored in relatively worn memory locations (e.g., relatively more-worn flash memory) while temporary data is stored in memory that is less worn or is less susceptible to wear. Other data placement or migration techniques are also disclosed.

A system of USB communicating camera comprising an integrated USB camera further comprising a USB communicating camera with a sensor, an image signal processor and integrated with a microcontroller having an image processing module, an inference unit, a first USB interface, a flash memory; a host system with a processor, a user interface application and a second USB interface to communicate to and from the USB communicable camera, the system is user configurable for different application specific pre-trained machine learning models. The user interface application is adapted to receive an application specific configuration data. The inference unit is an artificial intelligence inference unit that draws inference on image frames based on an input and the corresponding pre-trained machine learning model. The system deploys edge computing. A firmware residing in the flash memory remains unchanged when different application specific pre-trained machine learning models are loaded in the flash memory.

The invention discloses a solid state disk data storage method, device and equipment and a storage medium, and relates to the technical field of hard disk management, and the method comprises the steps: obtaining a life value corresponding to each flash memory block in a target solid state disk, and dividing the life value into a preparatory TLC region and a preparatory SLC region; based on the current space utilization rate of the target solid state disk, the data proportion of the current hot data to the cold data and the access proportion of the cold data write access times to the total write access times, determining the target partition proportion of the TLC area and the SLC area, and based on the target partition proportion, determining the current TLC area and the current SLC area; and migrating and storing hot data in the first current storage data to the current SLC area and migrating and storing cold data in the second current storage data to the current TLC area based on the data access frequencies corresponding to the first current storage data in the current TLC area and the second current storage data in the current SLC area. Therefore, automatic hierarchical storage of the hard disk data can be realized.

The invention provides a fault recovery method and electronic equipment, which can be applied to the field of computers. The fault recovery method comprises the following steps: collecting state information of a substrate management controller; when the state information represents that the substrate management controller breaks down, an isolation circuit connected between the processor and the substrate management controller is controlled, power supply to the substrate management controller is cut off, and the control right of a serial communication bus of the substrate management controller is taken over; target firmware mirror image data of the substrate management controller is obtained from a storage medium, and the target firmware mirror image data is used for restoring the function of the substrate management controller when it is detected that the substrate management controller breaks down; replacing original firmware mirror image data stored in a flash memory of the substrate management controller with the target firmware mirror image data through a serial communication bus so as to perform function recovery on the substrate management controller; and in response to completion of function recovery, controlling the isolation circuit to recover power supply to the substrate management controller.

The present invention provides a control method of a flash memory controller. The control method includes: after the flash memory controller is powered on, determining whether the flash memory controller encountered an abnormal power failure; if the flash memory controller encounters the abnormal power failure, determining a first block of a flash memory module having an open state; moving a portion of valid data within the first block to a specific block; setting the first block to have a close state; determining if a number of blank blocks within the flash memory module is less than a threshold value; and if the number of blank blocks within the flash memory module is less than the threshold value, selecting a second block having the close state and a lowest number of valid pages, and moving all valid data of the second block into the specific block.

A hardware wallet can enable management of digital assets. The hardware wallet includes a microcontroller and a non-volatile flash memory. The hardware wallet can authorize an electronic device to perform electronic payments with digital assets on a blockchain associated with keys of a digital wallet stored on the non-volatile flash memory. The electronic device is authorized to perform electronic payments in response to user input and while the electronic device hosts the hardware wallet. The hardware wallet can also enable a payment card to perform electronic payments with the digital assets while the hardware wallet is disposed on the payment card. As such, electronic payments are authorized based on a communication exchange between the hardware wallet and a remote server of a payment system via a point-of-sale (POS) system that accepts the payment card.

The invention discloses a flash memory switching starting method, system and device, electronic equipment and a medium, and relates to the technical field of servers, and the method comprises the steps of obtaining address information in a memory in response to completion of power-on initialization of a controller; historical starting information is determined according to the mapping relation between the address information and the flash memories, and the historical starting information comprises at least one of non-starting, first flash memory starting and second flash memory starting; determining a target flash memory corresponding to the address information based on the historical startup information; the target flash memory is used for starting the basic input / output system, so that the technical problem that firmware of the basic input / output system is started from the faulty flash memory at first and then switched to the non-faulty flash memory after the controller receives the switching mark every time when the basic input / output system is started is solved, and the aim of preventing the firmware from being started from the faulty flash memory every time when the basic input / output system is started is achieved. And the starting time is reduced.

The invention relates to the field of computer security, and discloses a data storage security protection method and system based on a solid-state hard disk, which comprises the following steps: identifying the inherent physical difference of a flash memory chip in the solid-state hard disk so as to calculate the read-write time sequence micro-deviation of the solid-state hard disk; performing hash operation on the device root key and the unique identifier of the controller corresponding to the solid state disk to obtain a bound master control key; generating a temporary encryption key of the write-in operation to encrypt plaintext data of the host system to obtain ciphertext data; writing the ciphertext data into a flash memory physical page corresponding to the physical page address to obtain a ciphertext physical page address; when the access mode is a hostile attack mode, secretly updating the ciphertext physical page address into a new physical page address, and deleting the ciphertext physical page address; and when the access mode is a secure access mode and the verification key is consistent with the bound master control key, normal loading and data access requests of the solid state disk are allowed. According to the invention, the security and integrity of data storage can be improved.

The application provides a cache manager and a control component. The cache manager comprises an interface, an allocation module and a memory. The interface receives a cache allocation request and sends the cache allocation request to the allocation module. The interface receives first cache index information returned by the allocation module and outputs the first cache index information. In response to the cache allocation request, the allocation module allocates N idle memory blocks and generates the first cache index information. The memory blocks are located in a cache, N is a positive integer, and the first cache index information comprises indexes of the N memory blocks. The memory stores indexes of at least N memory blocks. The cache manager implemented by hardware replaces the software management cache in the prior art, thereby reducing the interaction times between software and hardware when allocating a cache in the control component, improving the information interaction speed inside the control component, and achieving the technical effect of reducing the data transmission time between the host and the flash memory chip.

The present application relates to the technical field of storage, and provides a method and apparatus for determining an optimal read voltage parameter of a flash memory, and a flash memory device. The method comprises: on the basis of a linear relationship model between a read retry voltage offset value and a bit flip count, acquiring a new read retry voltage offset value corresponding to a minimized predicted bit flip count of the flash memory; determining whether data can be successfully read under the new read retry voltage offset value; if yes, adding the new read retry voltage offset value to the header of a read retry offset table to form a new read retry offset table; and on the basis of the new read retry offset table, updating the linear relationship model by means of an adaptive learning model. By means of the efficient and adaptive voltage parameter determination method, the present application can improve the success rate of data recovery and reduce performance loss.

The invention relates to the technical field of data processing, and discloses a data storage optimization method and system for a solid state disk. The method comprises the steps of performing pattern recognition on small object metadata through multi-dimensional access feature extraction, performing five-level popularity level division based on a flash memory perception popularity evaluation algorithm, performing multi-level storage region division on an SSD, performing intelligent resource allocation according to popularity levels and storage regions, and realizing dynamic adjustment processing through adaptive load monitoring. The technical problem of how to carry out intelligent hot-cold separation and dynamic hierarchical storage on the small object metadata to reduce the SSD storage cost in a massive small object storage environment generated by a cloud native application is solved.

The invention relates to the technical field of intelligent power grids, and provides a remote software upgrading method for an intelligent electric energy meter, which comprises the following steps: S1, a server generates an upgrading package containing a version identifier, and transmits the upgrading package to the intelligent electric energy meter in a fragmented manner through a TLS encryption channel; s2, the intelligent electric energy meter doubly verifies the integrity of the upgrade package and the legality of the source through an SHA-256 check code and a digital signature, the upgrade package and the source legality are written into a backup storage area of the Flash memory after verification is passed, and a CRC write-in check value is recorded; s3, performing secondary verification on the upgrade package of the backup storage area, triggering restarting after verification is passed, and writing data of the backup area into the main partition in the restarting process; s4, if the main partition system is not started or the core function is abnormal within the set time, returning to an old version and generating a fault log containing a timestamp; through a dynamic subpackage strategy, differential upgrading, SHA256 verification, a watchdog mechanism and a fault log record, the upgrading efficiency and safety of the intelligent electric energy meter are remarkably improved, and the dynamic subpackage strategy dynamically adjusts the size of a data packet according to the network condition.

The invention provides a process integration method of a high-voltage CMOS device and a semiconductor device.In the process integration method, before a floating gate material layer is formed, a high-voltage gate dielectric layer and a high-voltage well region of a high-voltage MOS device region are formed, and after the floating gate material layer is formed, the floating gate material layer and an ONO dielectric layer of the high-voltage MOS device region are reserved; the combination of the floating gate material layer, the ONO dielectric layer and the control gate material layer is used as a high-voltage gate structure of the high-voltage MOS device region, so that the thickness of the high-voltage gate structure is increased, and the thickness of the side wall structure of the high-voltage MOS device region is the same as that of the side wall structure of the flash memory device region, so that the thickness of the side wall structure of the high-voltage MOS device region is increased in a disguised manner; according to the invention, the ion implantation energy of the subsequent lightly-doped drain region can be correspondingly increased according to requirements, and a more slowly-changing LDD junction can be formed in a high-voltage MOS device region in a device integration process, so that the breakdown voltage of a high-voltage device is improved.

The invention relates to the technical field of hard disks, in particular to a data protection method of a solid state disk and the solid state disk, the method comprises the steps that a flash memory medium is divided into a data block area, a log block area and a metadata area, and the metadata area comprises a mapping directory, a mapping block and a check point block; a block mapping table and a log page mapping table are established in a volatile memory, and dbMSN and lbMSN are stored. Adding write-in data to a log block page, updating a log page mapping table, and generating check points according to full writing of a log area. When no free page exists, the damaged log blocks are selected in a rotating mode to be combined, new data block migration pages are distributed, mapping is updated, the MSN is progressively increased, changes are written into the mapping blocks, and the mapping catalogue is updated when the mapping blocks are addressed. After restarting, positioning a mapping block by a mapping directory to recover block mapping, reading check points in a reverse order, and traversing an uncovered log area to reconstruct log page mapping; and comparing the dbMSN with the lbMSN, setting inconsistent log pages to be invalid, establishing consistent access and shielding invalid pages. According to the method and the device, the problems of data consistency and availability caused by metadata loss, uncertain merging state and low recovery efficiency of the hybrid mapping FTL in a crash scene can be solved.

The invention relates to the technical field of electric digital data processing security, and discloses a solid state disk data encryption method and a solid state disk. According to the method, a national cryptographic algorithm hardware encryption and decryption co-processing module is serially arranged on a data bus between a main control chip and a flash memory particle array, so that transparent encryption of write-in data and transparent decryption of read-out data are realized; the module performs encryption and decryption based on an SM4 algorithm and an XTS advanced encryption standard mode in combination with a logic address as an adjustment value, and securely injects a root key through an out-of-band interface to derive a data key. The system comprises a main control chip, a flash memory array and the co-processing module, wherein the co-processing module is integrated with a hardware encryption and decryption engine, a key management unit and data flow control logic. On the premise that a general main control chip is not changed, high-performance, high-compatibility and high-security national cryptographic hardware-level full-disk encryption is realized.

The invention relates to the technical field of intelligent equipment, and discloses a rapid configuration and remote upgrading method and system for intelligent equipment, and the method comprises the steps: monitoring an equipment configuration key, enabling the equipment to enter a configuration mode, generating a wireless network with a unique identifier, and starting an internal Web server and a receiving timeout timer; connecting the wireless network through a mobile terminal, accessing the internal Web server configuration interface and acquiring configuration information; executing a network connection test based on the configuration information to obtain a verification result; performing multi-layer heterogeneous network resource allocation and deep reinforcement learning on a service function chain based on the verification result to obtain target network connection; and sending a version query request to an OTA server through the target network connection to obtain firmware data passing verification, and writing the firmware data passing verification into a target flash memory area to obtain an upgraded system. According to the invention, the security and success rate of equipment upgrading are improved.

A semiconductor memory device includes: a memory cell array including a plurality of NAND strings, each of the plurality of NAND strings including a plurality of memory cell transistors connected to each other in series; a plurality of word lines commonly connected to the plurality of memory strings and connected to the plurality of memory cell transistors, respectively; and a row decoder configured to supply a predetermined voltage higher than a ground voltage to each of the plurality of word lines after a program operation for writing data to a selected word line is completed.

The invention discloses a forming method of a flash memory unit. The forming method comprises the following steps: providing a semiconductor substrate; forming a tunneling oxide layer on the semiconductor substrate; forming nanocrystalline silicon particles on the tunneling oxide layer; forming an isolation insulating layer on the tunneling oxide layer and the nanocrystalline silicon particles; and forming a control grid on the isolation insulating layer, wherein the step of forming the nanocrystalline silicon particles on the tunneling oxide layer comprises: forming an amorphous silicon layer on the tunneling oxide layer; and performing repeated seed crystal particle forming processes on the amorphous silicon layer, wherein surface annealing treatment is performed between two adjacent seed crystal particle forming processes, and an annealing process is performed after the last seed crystal particle forming process. The flash memory unit can be used for storing a large quantity of electrons, and has high performance.

The invention discloses a collaborative authentication method of a safety U disk, which comprises the following steps of: when the safety U disk is inserted into a host for the first time, executing a set read-write sequence on a flash memory storage array of the safety U disk, and acquiring a PUF (Physical Unclonable Function) site of the safety U disk; reading a power-on initial state image of an SRAM (Static Random Access Memory) of an internal controller of the safe USB flash disk when the safe USB flash disk is powered on, and carrying out Hash abstract processing to generate a controller fingerprint abstract of the safe USB flash disk; when the security USB flash disk is authenticated, the host randomly generates a random number, maps the random number into a PUF bit address index and generates a PUF response of the security USB flash disk; combining the controller fingerprint abstract and the PUF response of the secure USB flash disk to obtain a session key; and realizing cooperative authentication of the secure USB flash disk according to the session key. The invention also discloses a system for realizing the collaborative authentication method of the safety USB flash disk. According to the invention, cooperative authentication of the safe USB flash disk is realized, and the reliability is higher and the safety is better.

The invention provides a burning method and system for a FLASH memory, and the method comprises the steps: dividing a to-be-burnt FLASH mirror image file into a plurality of burning data blocks, recording the verification information of the current burning data block in real time after each successful transmission of one burning data block to a target memory, obtaining the verification data of the burning process, and storing the verification data in the target memory. Further extracting an accumulated verification feature of the target burning data in the burning process, and determining a retransmission window of the target burning data after the burning process is interrupted through the accumulated verification feature and an initial verification feature of the target burning data; state difference characteristics between adjacent transmission breakpoints in the data burning process are determined, and a response overtime threshold value of the upper computer after transmission interruption is dynamically adjusted through all the state difference characteristics; and when the real-time transmission interruption time is greater than the response timeout threshold value, carrying out breakpoint resume on the target burning data based on the retransmission window. Based on the scheme, accumulative positioning verification of the retransmission window in FLASH memory data burning can be realized.

The application provides a CPU platform fault log recording method and device, comprising: receiving the running log data stream output by the CPU debugging serial port in real time; collecting the sampling value of the key power supply voltage and monitoring the hardware signal line to obtain the restart event signal and the shutdown event signal; packaging into a structured log recording unit; and writing the compressed log data block back to the flash memory; in response to the external reading instruction, reading the log data block from the specified log area of the flash memory and transmitting to the host end diagnostic tool; reorganizing and displaying in time sequence for fault analysis. The application can construct a log recording channel completely independent of the main CPU and operating system without increasing any additional hardware cost, ensuring that even in the most extreme system failure scenario, the complete context information at the fault moment can be reliably saved, thereby greatly improving the diagnosis efficiency and accuracy of the occasional fault.

The invention provides a brightness calibration coefficient storage method, a related device and a storage medium. The method comprises the following steps: acquiring an actually measured brightness value of each pixel in the display panel; dividing the display panel into a plurality of initial blocks, and calculating the variance of the actually measured brightness value of each initial block; recursively merging the adjacent initial blocks and / or merged blocks until the variance of the actually measured brightness values of the merged blocks is greater than a preset threshold value; according to a preset storage structure, the brightness calibration coefficient of each block is stored with the block as the unit, and the brightness calibration coefficient comprises the base value of the actually measured brightness value of each block and the difference matrix. According to the embodiment of the invention, the storage space required by the brightness calibration coefficient of the display panel is reduced, so that the space occupation of an external flash memory and an on-chip buffer is reduced, and the layout design difficulty in the display panel is reduced.

The invention discloses a satellite-borne equipment embedded system software on-orbit reconstruction method and a satellite-borne equipment embedded system. The method comprises the following steps: partitioning a FLASH memory of a microcontroller of satellite-borne equipment into a region, a BootLoader boot program region and an application program storage region; an independent BootLoader bootstrap program is solidified in the BootLoader bootstrap program area in advance; receiving a program file subpackage from a satellite service computer during on-orbit operation; a two-stage reliable transmission protocol including sequential receiving and packet supplementing receiving is adopted to receive a program file, wrong and missing packets are received and dynamically recorded in the sequential receiving stage, and only the wrong and missing packets are selectively retransmitted in the packet supplementing receiving stage; according to an instruction of the satellite service computer, the received complete program file is verified, the program file is written into the application program storage area after passing the verification, updating is completed, the BootLoader bootstrap program jumps to the updated application program, and on-orbit reconstruction is completed.

The present disclosure discloses a fault recovery method. The method includes: in response to a server being powered on or reset, starting baseboard management controller firmware from one or more flash memories storing the baseboard management controller firmware; in response to a failure of the starting the baseboard management controller firmware from the flash memories, starting a boot loader from a flash memory in which the boot loader is burned; in response to the boot loader being successfully started, obtaining backup baseboard management controller firmware from an external storage device through the boot loader, and burning the backup baseboard management controller firmware to any one of the flash memories; and in response to the burning being completed, resetting the server, and enabling the flash memory to start the backup baseboard management controller firmware from the flash memory in which the backup baseboard management controller firmware is burned.

The invention provides a storage device, an electronic device, a data storage method and a storage medium, and relates to the technical field of data processing, the storage device comprises a CXL interface module, a dynamic memory module, a flash memory module and a flash memory controller module; wherein the dynamic memory module comprises a plurality of device side periodic regions, the flash memory module comprises a plurality of data placement units, and the device side periodic regions are in one-to-one correspondence with the data placement units; the CXL interface module is used for receiving host data from the host side periodic region and temporarily storing the host data in the equipment side periodic region corresponding to the host side periodic region in the dynamic memory module; the dynamic memory module is used for packaging the host data in the equipment side periodic region after preset time; and the flash memory controller module is used for storing the encapsulated host data into a data placement unit corresponding to the equipment side periodic region in the flash memory module. The storage device effectively improves the write amplification phenomenon.

Devices and techniques that provide reconfigurable eMMC partitions are described herein. A flash memory device includes a register to store card specific data including a reconfiguration lock flag indicating whether partitions on the flash memory device are reconfigurable. The flash memory device can include an interface controller and a memory device able to be configured into one or more partitions by the interface controller.

A method of forming a semiconductor includes bonding a first memory die to a first memory-controller die to form a first bonded assembly, bonding second memory die to a second memory-controller die to form a second bonded assembly, and bonding the first bonded assembly to the second bonded assembly to form a memory stack.

The invention belongs to the technical field of avionics system design, and particularly relates to an integrated task computer and a backup upgrading method thereof. The comprehensive task computer comprises a core processor and a FLASH memory, the FLASH memory is provided with a starting mirror image file and an application mirror image file from low to high according to addresses, the starting mirror image file is internally provided with a first boot loader, a first PL end bit stream and a system configuration program from low to high according to the addresses, and the application mirror image file is internally provided with a second boot loader, a second PL end bit stream and a system configuration program from low to high according to the addresses. The system configuration program is internally provided with a bootstrap program of the application mirror image file and an identification module for identifying whether the application software is upgraded or not; and the application mirror image file is provided with a second boot loader, a second PL end bit stream and an application software program from low address to high address. According to the invention, the online upgrading function of the equipment master control software and the underlying firmware thereof is realized, and the stability and convenience of the system are enhanced.

The invention discloses a dynamic adjustment method of a metadata block, electronic equipment and a storage medium, and relates to the technical field of storage equipment. According to the relation between the frequency proportion of a first erasing frequency and a second erasing frequency and a target preset proportion threshold value determined based on the average erasing frequency and the maximum erasing frequency proportion, the first erasing frequency and the second erasing frequency are adjusted; according to the method, whether the data blocks are adjusted or not is judged according to the first data blocks and the numerical value of the first erasing times, when adjustment is determined, the preset number of data blocks in the first data blocks are adjusted into the new second data blocks, meanwhile, the original second data blocks are merged into the first data blocks, dynamic adjustment of the two types of data blocks is achieved, the erasing times of the two types of data blocks are balanced, and therefore the user experience is improved. The technical problem that the solid state disk enters a read-only state due to the fact that the flash memory blocks used by four stages of units reach the service life limit firstly due to the fact that the difference of the erasing times of the two types of flash memory blocks is too large in the prior art can be solved, and the technical effects of improving the availability and reliability of the solid state disk and prolonging the service life of the solid state disk are achieved.