173 results about "Logical block addressing" patented technology

Provided is a method for writing data to a Solid State Disk (SSD), an apparatus and the SSD. According to the method, a Logical Block Address (LBA) of each of a plurality of pieces of written data stored into a target cache module is acquired to obtain a plurality of Logical Block Addresses (LBAs); the plurality of pieces of written data in the buffer is stored into a solid-state storage unit of the SSD; whether the plurality of LBAs are consecutive is determined to obtain a determination result. In a case where the determination result indicates that the plurality of LBAs are consecutive, a Physics Block Address (PBA) of each of the plurality of pieces of written data in the solid-state storage unit is acquired to obtain a plurality of PBAs and a target mapping table according to the plurality of LBAs and the plurality of PBAs is generated.

Methods, systems, and devices for zoned random write operations are described. A memory system may receive a set of write commands associated with respective logical block addresses (LBAs) that may be in a sequential order, where the respective LBAs may be associated with a zone. The memory system may write first data to a first physical block address (PBA), where the first data may be associated with a first LBA of the respective LBAs. The memory system may determine whether a second LBA associated with second data is sequential relative to a write pointer associated with the zone. The memory system may write the second data to a second PBA that may be sequential to the first PBA in response to determining that the second logical block address is non-sequential relative to the write pointer and on a value of a bitmap corresponding to the second LBA.

A method is described. The method includes constructing a bitmap having a first dimension organized into bins of logical block addresses (LBA bins) and a second dimension organized into bins of physical block addresses (PBA bins). Coordinates of the bitmap indicate whether respective physical blocks of non volatile memory within one or more SSDs that fall within a particular PBA bin are being mapped to by an LBA that falls within a particular one of the LBA bins. The method includes using the bitmap during a rebuild of an LBA bin of an LBA / PBA table to avoid reading meta data for physical blocks that are not mapped to by an LBA that falls within the LBA bin.

The invention discloses a storage control method and storage equipment, relates to the technical field of storage, and aims to solve the problem of how to improve data processing efficiency. The storage control method comprises the steps that in response to a control instruction, a source physical block address corresponding to a source logic block address contained in the control instruction is obtained by querying a mapping table; the mapping table stores a mapping relationship between each logical block address and each physical block address. And modifying a target physical block address corresponding to the target logic block address in the mapping table into a source physical block address corresponding to the source logic block address. Therefore, on the host side, the to-be-processed data corresponding to the source physical block address is migrated to the target physical block address. The to-be-processed data is not transmitted between the host and the storage device, so that the data processing efficiency is improved.

The application provides a monitoring method, device and equipment for a ufs test case and a storage medium, which are applied to a ufs verification platform, the ufs verification platform is connected to a to-be-tested device installed with ufs, the method comprises the following steps: the ufs verification platform generates at least one target instruction based on the ufs test case, sends all the target instructions to the to-be-tested device in sequence, and the to-be-tested device performs target testing based on the target instruction; the ufs verification platform writes all the target instructions and related information into a record file, wherein the related information comprises a logical unit number, a logical block address and a block number of the target instruction; the ufs verification platform generates an end signal and sends the end signal to the to-be-tested device and the record file respectively, the to-be-tested device terminates the target testing, the ufs test case is terminated, and the record file terminates writing. According to the technical scheme of the embodiment of the application, all the target instructions and related information can be recorded, so that the troubleshooting speed and efficiency of the ufs test result are improved.

In some implementations, a memory apparatus may receive a command indicating a logical block address (LBA) that is associated with a logical-to-physical (L2P) table. The memory apparatus may perform a lookup operation associated with a compressed version of an address range of the L2P table to identify a physical address in non-volatile memory associated with the LBA, wherein the compressed version is stored in a volatile memory of the memory apparatus, wherein the compressed version is associated with an exception list that indicates physical addresses for respective LBAs, included in the address range, that are associated with non-sequential physical addresses, and wherein the compressed version is associated with a binary tree that indicates locations in the exception list associated with the respective LBAs. The memory apparatus may perform, based on the command, an action associated with the physical address.

The invention discloses a quick-positioning storage pressure test method and a storage medium thereof.The method comprises the steps that a write-in command is received, a test data packet is obtained, and the test data packet is provided with an initial logic block address, a write-in block number, a logic unit and a check value; the control unit performs verification operation according to the initial logic block address and the verification value in combination with a preset verification level and the verification level determined by the logic unit to obtain a verification result; when the verification result is successful, executing a write operation according to the initial logic block address and the write block number; and when the verification result is failure, storing a state log of the write-in operation, stopping executing the write-in operation, and outputting positioning information according to the logic unit, the verification result and the state log. Through the verification operation combining the initial logic block address and the verification value, data verification can be rapidly carried out, rapid positioning can be carried out under the condition of data errors and abnormities, and the accuracy and the test efficiency of the storage pressure test are improved.

The invention relates to the technical field of solid state disks, and discloses a data downswiping management method and device, equipment and a storage medium. The data downwriting management method comprises the following steps: receiving a write request of a logic partition supporting random writing; applying for a data buffer area and a cache basic management unit; receiving write request data corresponding to the write request, and writing the write request data into the data buffer area based on the cache basic management unit; judging whether the write request triggers implicit lower refreshing or not; if the implicit down-brushing is triggered, writing the write request data information in the down-brushing range in the pre-down-brushing area into the down-brushing area according to the size sequence of the logic block addresses; and if the implicit down-brushing is not triggered, writing the write request data information into the pre-down-brushing area. According to the method and the device, the write request of the ZRWA region can be quickly responded, so that the random write performance of the ZRWA region is equivalent to the sequential write performance of the ZNS, and the write performance of the ZRWA region is prevented from being reduced.

A memory control unit of a memory device includes at least one hardware processor; and memory storing instructions that cause the at least one hardware processor to perform operations comprising: generating a scrambler seed and a logical block address (LBA) for a block of write data received by the memory control unit from a host device; generating a flash translation layer (FTL) to map the LBA to a physical address (PA); scrambling the block of data using the scrambler seed; encrypting the scrambler seed, the LBA, and the PA in the FTL using an encryption key; initiating writing a scrambled block of data and encrypted LBA and scrambler seed to a memory array; and decrypting the FTL using an incorrect encryption key in response to an erase command received by the memory control unit from the host device.

An input / output (I / O) erase request directed at memory devices is received by a processing device. The erase request includes logical block address that is associated with a data object. The memory devices include groups of zones corresponding to sequential logical addresses. The plurality of zones are associated with a compound data object that includes a plurality of data objects, including the data object. One or more zones associated with the data object are identified. A data set counter associated with each of the one or more zones is decremented. The data set counter represents a number of sets of data associated with the zone. Responsive to determining that the data set counter associated with one of the one or more ones satisfies a criterion, the one of the one or more zones is a caused to be erased.

A processing device includes a plurality of cores coupled to a memory device that stores data. The cores execute a plurality of service applications that implement at least a portion of a flash translation layer (FTL) to direct operations to be performed by the memory device with reference to the data while tracking translations between a logical block address space to a physical address space. The cores also execute an FTL service framework that includes a plurality of application programming interfaces (APIs), wherein the plurality of APIs are configured to standardize communication between the plurality of service applications across the plurality of cores during runtime operation of the plurality of cores.

A method, performed by pointer fetch circuitry, includes buffering, in a pointer buffer of host interface circuitry, pointers associated with chop commands of a logical block address read command residing in a submission queue of a host system. The method includes sending address translation requests to an address translation circuit for respective translation units of respective chop commands, each translation unit includes a subset of the pointers. The method includes detecting an address translation request miss at a cache of the address translation circuit for a translation unit of a chop command. The method includes sending a translation miss message to a page request interface (PRI) handler. The translation miss message contains a virtual address of the translation unit and a restart point for the chop command, the translation miss message to trigger the PRI handler to send a page miss request to a translation agent of the host system.

Embodiments of the present disclosure provide an address allocation method and device, a storage medium and an electronic device, and relate to the technical field of computers. The method comprises: in response to a write request, obtaining snapshot information; and according to a mapping rule, allocating a physical block address corresponding to a logical block address of at least one data by using the snapshot information; wherein the snapshot information is used to allocate adjacent logical block addresses to physical block addresses in different areas. In this way, by allocating adjacent logical block addresses to different physical areas, the situation of some data being concentrated in high pages is avoided, thereby improving reading performance and user experience.

An example apparatus for sequential garbage collection can include a memory device including a plurality of memory blocks associated with a plurality of logical block addresses (LBAs). The example apparatus can include a controller coupled to the memory device. The controller can be configured to monitor a quantity of read operations and a quantity of write operations associated with a plurality of command sizes performed on a portion of the plurality of memory blocks. The controller can be configured to monitor a quantity of read operations and a quantity of write operations associated with a particular LBA. The controller can be configured to determine a type of garbage collection operation to perform based on the monitoring.

A computing system having a host system connected to a memory sub-system via a computer bus. In response to the host system sending a first command configured to identify a first logical block addressing data size at a block level, the memory sub-system can format data storage for a namespace in a non-volatile memory at the block level. In response to the host system sending a second command configured to identify a second logical block addressing data size at a sub block level, the memory sub-system can configure access to the namespace at the second logical block addressing data size without changing the data storage in the non-volatile memory for the namespace at the block level.

The application discloses a storage resource recycling method and electronic equipment, and relates to the technical field of storage. The method can determine a target migration management structure used by a storage system according to the consumption speed and recycling speed of storage units in the storage system, the target migration management structure is used for storing physical block addresses and logical block addresses of a plurality of migration storage units, so that the recycling speed of the storage units in the garbage recycling process is matched with the load of the storage system. When performing a disk writing process, at least one disk writing request is quickly generated according to the request concurrency of the storage system and the target migration management structure used by the storage system, which is beneficial to improving the disk writing efficiency, and then the recycling process of the at least one first storage space can be quickly realized, and the processing time length of the garbage recycling process and the waste of the storage space are reduced.

Provided is a disk device, a control method for a disk device, and a program, which enable a rotational latency to be minimized to access a next logical block address (LBA) regardless of which head is used for access in a disk device having a plurality of heads. The disk device of an embodiment includes a storage unit that stores a table in which a track skew value for each head is stored, and a control unit that reads out a track skew value corresponding to a head that is an object of operation from the table and performs track control.

A storage device according to some example embodiments comprises a non-volatile memory including a first memory including a plurality of zones configured to sequentially store data based on a write pointer, the write pointer indicating a position to write the data, and a second memory configured to store preliminary data to be written in the plurality of zones, and a storage controller configured to receive a plurality of operation requests, each of the plurality of operation requests including a logical block address, a write command, and write data, and store first write data corresponding to a first operation request in the second memory as first preliminary data, if the position of a first logical block address corresponding to the first operation request among the plurality of operation requests and the write pointer does not match.

Data relocation or rebuild can be accomplished much more efficiently by using either a metadata option or an mSet option. The metadata option involves scanning metadata in a source block to find logical block addresses (LBAs) that belong to a particular mSet. Thereafter, all of the data for any found LBAs for the particular mSet are copied to the destination block one after another. The mSet option involves bringing the mSet related to one of the LBAs found in the metadata to a specific storage location, such as random access memory (RAM), and then scanning the mSet to find any jumbo block addresses (JBAs) that belong to the source block. Thereafter, all of the data for the found JBAs are copied to the destination block one after another. Either option results in reducing the amount of mSet loading and ensures more efficient sequential reads.

The present technology enhances workload management of data storage systems by using an internal copy function and / or a zone-append technology. The internal copy function is used, e.g., in merge operations to move data between locations on a disk without using off-disk resources (e.g., processing or memory of a CPU). Zone-append technology uses nameless writes (e.g., write instruction without an assigned destination address on the disk) to combine IO units from different threads to be written to a common zone of a disk (e.g., a shingled magnetic recording (SMR) disk). Sequential addresses are assigned to IO units from different threads based on their order in the write queue, reducing the latency and seek time typically associated with random writes. The zone-append technology, e.g., uses sequential write operations within specified zones, allowing the disk to determine the actual write location and to report post-write logical block addresses (LBAs).

A method of operating a computing system which includes a plurality of storage devices, a memory device, and a switch, is provided. The method includes: providing a first mapping request including first metadata corresponding to first user data to the memory device through the switch, by a first storage device of the plurality of storage devices; identifying a first standard corresponding to the first metadata based on the first mapping request, by the memory device; and generating first map data indicating a relationship between a first physical block address and a first logical block address of the first user data based on the first standard, by the memory device.

The invention belongs to the related technical field of computer storage, and particularly relates to a large-scale file set batch migration method which comprises the following steps: directly loading and reading metadata information of a source end file set from source end equipment, and extracting metadata information of each file of a target file set in batches; according to metadata information of each effective file, obtaining a mapping relation from all file logic blocks of the effective file to corresponding logic block addresses, uniformly storing the mapping relation into a data structure for global data block indexing, performing ascending sorting and merging operation on all the logic block addresses in the data structure to obtain a new logic block address sequence, and storing the new logic block address sequence into a database; each logic block address is correspondingly marked as a continuous read area; performing n times of disk reading in batches through n direct I / Os, and correspondingly obtaining data of n continuous reading areas; and sending all disk reading data, metadata information of all valid files and the data structure to a target end, and executing reconstruction. The problem of frequent random I / O can be avoided.

Methods, systems, and devices for physical prefetch are described. A memory system may prefetch data from physical addresses that are sequential to a physical address that has recently been read by the memory system. For example, the memory system may determine that a rate of access for a virtual block exceeds a threshold, and the memory system may prefetch the physically sequential data in response to the rate of access exceeding the threshold. In some examples, the memory system may receive a command to read a logical block address corresponding to a first physical address. The memory system may determine that the rate of access to the virtual block exceeds the threshold. The memory system may identify one or more second physical addresses that are sequential to the first physical address, and the memory system may transfer data from the one or more second physical addresses to a buffer.

An apparatus includes a memory array including blocks of non-volatile memory cells and a control circuit coupled to the memory array. The control circuit is configured to receive first write commands, determine that the first write commands satisfy predetermined criteria, and process the first write commands by: statically mapping the logical block addresses to corresponding physical block addresses of first ones of the blocks of non-volatile memory cells, and writing data from the first write commands to the first ones of the blocks.

The invention relates to the field of data storage, in particular to a data query method and device, electronic equipment and a storage medium, a logical block address range of each node is stored in a cache of the storage medium, and the logical block address range comprises a latest accessed logical block address. The information can reflect the distribution condition of the hot data. When a data access request arrives, the address of the target logic block can be matched with the address range of the node, so that active sensing of hot data is realized. If the target logical block address is in the address range of a node, it can be determined that the node stores target data. Finally, the target data can be directly inquired and obtained from the cache according to the matching result, and a long I / O path is not needed. The data reading efficiency and the response speed can be improved.

Methods and apparatus for thermal management in data storage devices are provided. A data storage device includes a first non-volatile memory (NVM), and one or more processors coupled to the first NVM. The one or more processors are configured to receive, from a host, a host command to be performed in connection with the first NVM, the host command comprising a starting logical block address (LBA) and a transfer length, store the starting LBA and the transfer length in a second NVM, attempt to perform the host command, detect, before completion of the performance of the host command, a thermal shutdown state of the first NVM, and invalidate, using the stored starting LBA and the stored transfer length, residual data stored in the first NVM in association with partial completion of the host command prior to the thermal shutdown state.

Methods, systems, and devices for security function management within a multi-port memory system are described. A memory system may include multiple ports each coupled with one or more host systems. The memory system may receive a namespace configuration indicating an allocation of one or more logical block addresses (LBAs) to one or more of the ports. The memory system may further receive one or more requests for access to one or more LBA ranges, and may perform an authorization procedure to authorize a single entity to provision and unlock corresponding LBA ranges. In some examples, LBA ranges may be locked by default on bootup of the memory system. In some cases, host systems may request a management controller to coordinate authorization, or may request authorization from a memory system directly using one or more credentials or identifiers. Further, a management port may be indicated via one or more commands.

A data security system comprising plurality of logical blocks having LBAs, kernel-level storage controller to intercept low-level I / O operations directed to storage medium and dynamically allocate scattered storage locations from unmarked logical block addresses, plurality of LBAs, dynamically allocated by kernel-level storage controller to store encrypted fragments of protected data, encrypted file identity mapping stored across plurality of LBAs, wherein file identity mapping comprises mappings between symbolic file identifiers and addresses of encrypted fragments, persistent record keeping framework comprising encrypted log of protected data state change, shell file visible to the operating system, wherein shell file has zero bytes of data and serves as entry point for run-time reconstruction, runtime reconstruction module configured to intercept read requests to retrieve encrypted fragments, authenticate, upon successful authentication, retrieve, plurality of encrypted fragments and decrypt the fragments, merge decrypted fragments with the shell file to form and share extensible shell file.

A data storage device comprises recording heads and magnetic recording media. An initialization process is performed following a logical block address (LBA) remapping operation that remaps LBAs to physical locations on the media. The initialization process comprises initializing a write target LBA in response to a write command by writing data to a physical location on the media that is mapped to the write target LBA, receiving a read command to read data from a read target LBA, reading and returning data from the physical location on the magnetic recording media that is mapped to the read target LBA if the read target LBA has been initialized, and generating and returning a background data pattern if the read target LBA has not been initialized.

A system for mitigating latency in I / O transactions may include and / or represent a storage device configured to store data at logical block addresses (LBAs) and circuitry configured to monitor the latency of I / O transactions performed on the storage device. In one example, the circuitry may be configured to detect a latency of an I / O transaction performed on a portion of the data stored at one of the LBAs. In this example, the circuitry may be further configured to determine that the latency of the I / O transaction exceeds a certain threshold and then perform a remedial action in connection with the portion of data in response to determining that the latency exceeds the certain threshold. Various other methods, systems, and computer-readable media are also disclosed.