262 results about "Logical block addressing" patented technology

The invention relates to the technical field of data compression, and particularly discloses a method for realizing data compression in an RAID card and an RAID control chip, and the method comprises the following steps: S1, receiving a plurality of IO writing commands issued by a host, and obtaining the logic block address and length of each IO; s2, executing a merging operation on the plurality of IOs to generate a merged IO block; s3, performing a data compression operation on the merged IO block through a data compression engine to obtain compressed data; s4, establishing a mapping relation from a logic block address to a physical block address of the compressed data, and storing the mapping relation in a logic-to-physical mapping table; s5, the compressed data are written into a solid state disk through an RAID engine, and meanwhile, logic-to-physical mapping table metadata are stored persistently; s6, sending a recovery command or a zero-writing command to the solid state disk recovery space for the address space which is not used after compression; the problem that an existing SSD compression scheme is high in power consumption is solved, reliability is better, original user data content is closer, and the obtained compression effect is better.

A method for use in a storage processor, comprising: receiving an I / O request that is associated with a logical block address; allocating a cache slot that corresponds to the logical block address, wherein allocating the cache slot includes: identifying a type of memory that is required to host the cache slot by using one or more configuration settings that are associated with the cache slot, identifying a cache slot that is both available and hosted in the identified type of memory, and assigning the identified cache slot to the logical block address; and executing the I / O request by using the allocated cache slot, wherein using the allocated cache slot includes identifying a memory address that is associated with the cache slot and executing at least one direct memory access (DMA) command that is associated with the allocated cache slot.

The present application discloses methods of operating a memory system, memory systems, hosts, and memory controllers. An example method includes receiving a read command, the read command including a first logical block address (LBA); based on a first attribute identifier corresponding to a first mapping table block in a compressed mapping table, determining a first physical address corresponding to the first LBA in the first mapping table block, the compressed mapping table including a plurality of attribute identifiers, the plurality of attribute identifiers corresponding to different mapping table blocks in a logical-to-physical (L2P) mapping table, an attribute identifier indicating whether physical addresses in a corresponding mapping table block are continuous, and the first mapping table block being the mapping table block in which the first LBA is located; and performing a read operation on a memory device based on the first physical address.

The invention discloses a server and a hard disk medium error processing method, and relates to the technical field of servers, the server comprises a controller and a redundant array of independent disks connected with the controller, the redundant array of independent disks comprises a plurality of hard disks, and different data in the same strip is stored in the same sector of each hard disk. If the controller detects that the at least two hard disks have medium errors in the same target sector, the controller obtains a target logic block address corresponding to the target sector in the at least two hard disks, and for any one of the at least two hard disks, a new sector is redistributed for the target logic block address corresponding to the hard disk in a standby sector preset by the hard disk, and reconstructing the new sectors allocated to the at least two hard disks so as to enable the redundant array of independent disks to work normally. According to the method and the device, the waste of storage resources in the redundant array of independent disks caused by direct replacement of a new redundant array of independent disks is reduced, and the user experience is improved.

A storage device includes a memory storage region and a controller having a processor. The processor retrieves user data from the memory storage region using a physical block address corresponding to a logical block address (LBA), in response to a read command. The retrieved user data includes a first hash received through a host interface in a prior host data transmission. The processor further performs error correction on the user data to generate error-corrected user data. The processor further causes a cryptographic engine to produce a second hash of the error-corrected user data. The first hash is compared to the second hash associated with the error-corrected user data to determine a match result. A notification is generated in response to the match result.

Provided is a method for writing data to a Solid State Disk (SSD), an apparatus and the SSD. According to the method, a Logical Block Address (LBA) of each of a plurality of pieces of written data stored into a target cache module is acquired to obtain a plurality of Logical Block Addresses (LBAs); the plurality of pieces of written data in the buffer is stored into a solid-state storage unit of the SSD; whether the plurality of LBAs are consecutive is determined to obtain a determination result. In a case where the determination result indicates that the plurality of LBAs are consecutive, a Physics Block Address (PBA) of each of the plurality of pieces of written data in the solid-state storage unit is acquired to obtain a plurality of PBAs and a target mapping table according to the plurality of LBAs and the plurality of PBAs is generated.

Embodiments of the present invention provide a data processing method, a device, and a storage medium. The method comprises: acquiring first access log information of a block device in a first time period, wherein the block device corresponds to a plurality of logical block addresses; determining a target grouping length on the basis of the first access log information so as to group the plurality of logical block addresses on the basis of the target grouping length to obtain a plurality of groups, wherein the logical block addresses in a same group have similar access behaviors; determining access feature values respectively corresponding to the plurality of groups; and on the basis of the access feature values respectively corresponding to the plurality of groups, determining cold and hot data categories respectively corresponding to the plurality of groups.

Methods, systems, and devices for zoned random write operations are described. A memory system may receive a set of write commands associated with respective logical block addresses (LBAs) that may be in a sequential order, where the respective LBAs may be associated with a zone. The memory system may write first data to a first physical block address (PBA), where the first data may be associated with a first LBA of the respective LBAs. The memory system may determine whether a second LBA associated with second data is sequential relative to a write pointer associated with the zone. The memory system may write the second data to a second PBA that may be sequential to the first PBA in response to determining that the second logical block address is non-sequential relative to the write pointer and on a value of a bitmap corresponding to the second LBA.

A storage device provides thin provisioning by presenting more logical capacity than available physical capacity. The storage device uses a dynamic random-access memory (DRAM) having a size that is proportional to the available physical capacity of the storage device. The storage device includes a memory device with a physical capacity and the DRAM. A controller on the storage device creates segments including logical block address (LBA) sets in an LBA space. The LBA sets include an LBA from each segment that are linked to enable the LBAs in a LBA set to share a mapping space in the DRAM. The controller also creates an L2P table including a LBA set entry per LBA set, with each LBA set entry including sub-entries to store physical locations on the memory device that are associated with the LBAs in the LBA set. The controller also stores the L2P table in the DRAM.

A method is described. The method includes constructing a bitmap having a first dimension organized into bins of logical block addresses (LBA bins) and a second dimension organized into bins of physical block addresses (PBA bins). Coordinates of the bitmap indicate whether respective physical blocks of non volatile memory within one or more SSDs that fall within a particular PBA bin are being mapped to by an LBA that falls within a particular one of the LBA bins. The method includes using the bitmap during a rebuild of an LBA bin of an LBA / PBA table to avoid reading meta data for physical blocks that are not mapped to by an LBA that falls within the LBA bin.

The invention discloses a storage control method and storage equipment, relates to the technical field of storage, and aims to solve the problem of how to improve data processing efficiency. The storage control method comprises the steps that in response to a control instruction, a source physical block address corresponding to a source logic block address contained in the control instruction is obtained by querying a mapping table; the mapping table stores a mapping relationship between each logical block address and each physical block address. And modifying a target physical block address corresponding to the target logic block address in the mapping table into a source physical block address corresponding to the source logic block address. Therefore, on the host side, the to-be-processed data corresponding to the source physical block address is migrated to the target physical block address. The to-be-processed data is not transmitted between the host and the storage device, so that the data processing efficiency is improved.

The application provides a monitoring method, device and equipment for a ufs test case and a storage medium, which are applied to a ufs verification platform, the ufs verification platform is connected to a to-be-tested device installed with ufs, the method comprises the following steps: the ufs verification platform generates at least one target instruction based on the ufs test case, sends all the target instructions to the to-be-tested device in sequence, and the to-be-tested device performs target testing based on the target instruction; the ufs verification platform writes all the target instructions and related information into a record file, wherein the related information comprises a logical unit number, a logical block address and a block number of the target instruction; the ufs verification platform generates an end signal and sends the end signal to the to-be-tested device and the record file respectively, the to-be-tested device terminates the target testing, the ufs test case is terminated, and the record file terminates writing. According to the technical scheme of the embodiment of the application, all the target instructions and related information can be recorded, so that the troubleshooting speed and efficiency of the ufs test result are improved.

In some implementations, a memory apparatus may receive a command indicating a logical block address (LBA) that is associated with a logical-to-physical (L2P) table. The memory apparatus may perform a lookup operation associated with a compressed version of an address range of the L2P table to identify a physical address in non-volatile memory associated with the LBA, wherein the compressed version is stored in a volatile memory of the memory apparatus, wherein the compressed version is associated with an exception list that indicates physical addresses for respective LBAs, included in the address range, that are associated with non-sequential physical addresses, and wherein the compressed version is associated with a binary tree that indicates locations in the exception list associated with the respective LBAs. The memory apparatus may perform, based on the command, an action associated with the physical address.

The invention discloses a quick-positioning storage pressure test method and a storage medium thereof.The method comprises the steps that a write-in command is received, a test data packet is obtained, and the test data packet is provided with an initial logic block address, a write-in block number, a logic unit and a check value; the control unit performs verification operation according to the initial logic block address and the verification value in combination with a preset verification level and the verification level determined by the logic unit to obtain a verification result; when the verification result is successful, executing a write operation according to the initial logic block address and the write block number; and when the verification result is failure, storing a state log of the write-in operation, stopping executing the write-in operation, and outputting positioning information according to the logic unit, the verification result and the state log. Through the verification operation combining the initial logic block address and the verification value, data verification can be rapidly carried out, rapid positioning can be carried out under the condition of data errors and abnormities, and the accuracy and the test efficiency of the storage pressure test are improved.

The invention relates to the technical field of solid state disks, and discloses a data downswiping management method and device, equipment and a storage medium. The data downwriting management method comprises the following steps: receiving a write request of a logic partition supporting random writing; applying for a data buffer area and a cache basic management unit; receiving write request data corresponding to the write request, and writing the write request data into the data buffer area based on the cache basic management unit; judging whether the write request triggers implicit lower refreshing or not; if the implicit down-brushing is triggered, writing the write request data information in the down-brushing range in the pre-down-brushing area into the down-brushing area according to the size sequence of the logic block addresses; and if the implicit down-brushing is not triggered, writing the write request data information into the pre-down-brushing area. According to the method and the device, the write request of the ZRWA region can be quickly responded, so that the random write performance of the ZRWA region is equivalent to the sequential write performance of the ZNS, and the write performance of the ZRWA region is prevented from being reduced.

A memory control unit of a memory device includes at least one hardware processor; and memory storing instructions that cause the at least one hardware processor to perform operations comprising: generating a scrambler seed and a logical block address (LBA) for a block of write data received by the memory control unit from a host device; generating a flash translation layer (FTL) to map the LBA to a physical address (PA); scrambling the block of data using the scrambler seed; encrypting the scrambler seed, the LBA, and the PA in the FTL using an encryption key; initiating writing a scrambled block of data and encrypted LBA and scrambler seed to a memory array; and decrypting the FTL using an incorrect encryption key in response to an erase command received by the memory control unit from the host device.

An input / output (I / O) erase request directed at memory devices is received by a processing device. The erase request includes logical block address that is associated with a data object. The memory devices include groups of zones corresponding to sequential logical addresses. The plurality of zones are associated with a compound data object that includes a plurality of data objects, including the data object. One or more zones associated with the data object are identified. A data set counter associated with each of the one or more zones is decremented. The data set counter represents a number of sets of data associated with the zone. Responsive to determining that the data set counter associated with one of the one or more ones satisfies a criterion, the one of the one or more zones is a caused to be erased.

A processing device includes a plurality of cores coupled to a memory device that stores data. The cores execute a plurality of service applications that implement at least a portion of a flash translation layer (FTL) to direct operations to be performed by the memory device with reference to the data while tracking translations between a logical block address space to a physical address space. The cores also execute an FTL service framework that includes a plurality of application programming interfaces (APIs), wherein the plurality of APIs are configured to standardize communication between the plurality of service applications across the plurality of cores during runtime operation of the plurality of cores.

A method, performed by pointer fetch circuitry, includes buffering, in a pointer buffer of host interface circuitry, pointers associated with chop commands of a logical block address read command residing in a submission queue of a host system. The method includes sending address translation requests to an address translation circuit for respective translation units of respective chop commands, each translation unit includes a subset of the pointers. The method includes detecting an address translation request miss at a cache of the address translation circuit for a translation unit of a chop command. The method includes sending a translation miss message to a page request interface (PRI) handler. The translation miss message contains a virtual address of the translation unit and a restart point for the chop command, the translation miss message to trigger the PRI handler to send a page miss request to a translation agent of the host system.

Embodiments of the present disclosure provide an address allocation method and device, a storage medium and an electronic device, and relate to the technical field of computers. The method comprises: in response to a write request, obtaining snapshot information; and according to a mapping rule, allocating a physical block address corresponding to a logical block address of at least one data by using the snapshot information; wherein the snapshot information is used to allocate adjacent logical block addresses to physical block addresses in different areas. In this way, by allocating adjacent logical block addresses to different physical areas, the situation of some data being concentrated in high pages is avoided, thereby improving reading performance and user experience.

Disclosed is a method of operating an electronic device which includes a first storage device, a second storage device, and a host device. The method includes providing a first request indicating a memory operation of target data to the first storage device, providing a second request indicating a redirection of the memory operation to the second storage device based on the first request, performing the memory operation based on the second request, providing the first storage device with a first completion response indicating that the memory operation is performed, and providing a second completion response to the host device based on the first completion response. The first storage device stores first mapping information of a logical block address (LBA) of the target data and a physical block address (PBA) indicating a physical block of the second storage device, in which the target data are stored.

An example apparatus for sequential garbage collection can include a memory device including a plurality of memory blocks associated with a plurality of logical block addresses (LBAs). The example apparatus can include a controller coupled to the memory device. The controller can be configured to monitor a quantity of read operations and a quantity of write operations associated with a plurality of command sizes performed on a portion of the plurality of memory blocks. The controller can be configured to monitor a quantity of read operations and a quantity of write operations associated with a particular LBA. The controller can be configured to determine a type of garbage collection operation to perform based on the monitoring.

A computing system having a host system connected to a memory sub-system via a computer bus. In response to the host system sending a first command configured to identify a first logical block addressing data size at a block level, the memory sub-system can format data storage for a namespace in a non-volatile memory at the block level. In response to the host system sending a second command configured to identify a second logical block addressing data size at a sub block level, the memory sub-system can configure access to the namespace at the second logical block addressing data size without changing the data storage in the non-volatile memory for the namespace at the block level.

The invention discloses a storage resource recovery method and electronic equipment, and relates to the technical field of storage, and the method can determine a target migration management structure used by a storage system according to a consumption speed and a recovery speed of a storage unit in the storage system, the target migration management structure is used for storing physical block addresses and logic block addresses of a plurality of migration storage units, so that the storage unit recycling speed of garbage recycling processing is matched with the load of the storage system. Moreover, during disk dropping processing, at least one disk dropping request is quickly generated according to the request concurrence number of the storage system and the target migration management structure used by the storage system, so that the disk dropping efficiency is improved, the recovery processing of at least one first storage space can be quickly realized, and the disk dropping efficiency is improved. And the treatment duration and storage space waste in the garbage recycling process can be reduced.

The application discloses a storage resource recycling method and electronic equipment, and relates to the technical field of storage. The method can determine a target migration management structure used by a storage system according to the consumption speed and recycling speed of storage units in the storage system, the target migration management structure is used for storing physical block addresses and logical block addresses of a plurality of migration storage units, so that the recycling speed of the storage units in the garbage recycling process is matched with the load of the storage system. When performing a disk writing process, at least one disk writing request is quickly generated according to the request concurrency of the storage system and the target migration management structure used by the storage system, which is beneficial to improving the disk writing efficiency, and then the recycling process of the at least one first storage space can be quickly realized, and the processing time length of the garbage recycling process and the waste of the storage space are reduced.

A method of operating a computing system which includes a plurality of storage devices, a memory device, and a switch, is provided. The method includes: providing a first mapping request including first metadata corresponding to first user data to the memory device through the switch, by a first storage device of the plurality of storage devices; identifying a first standard corresponding to the first metadata based on the first mapping request, by the memory device; and generating first map data indicating a relationship between a first physical block address and a first logical block address of the first user data based on the first standard, by the memory device.

Provided is a disk device, a control method for a disk device, and a program, which enable a rotational latency to be minimized to access a next logical block address (LBA) regardless of which head is used for access in a disk device having a plurality of heads. The disk device of an embodiment includes a storage unit that stores a table in which a track skew value for each head is stored, and a control unit that reads out a track skew value corresponding to a head that is an object of operation from the table and performs track control.

A storage device according to some example embodiments comprises a non-volatile memory including a first memory including a plurality of zones configured to sequentially store data based on a write pointer, the write pointer indicating a position to write the data, and a second memory configured to store preliminary data to be written in the plurality of zones, and a storage controller configured to receive a plurality of operation requests, each of the plurality of operation requests including a logical block address, a write command, and write data, and store first write data corresponding to a first operation request in the second memory as first preliminary data, if the position of a first logical block address corresponding to the first operation request among the plurality of operation requests and the write pointer does not match.

Data relocation or rebuild can be accomplished much more efficiently by using either a metadata option or an mSet option. The metadata option involves scanning metadata in a source block to find logical block addresses (LBAs) that belong to a particular mSet. Thereafter, all of the data for any found LBAs for the particular mSet are copied to the destination block one after another. The mSet option involves bringing the mSet related to one of the LBAs found in the metadata to a specific storage location, such as random access memory (RAM), and then scanning the mSet to find any jumbo block addresses (JBAs) that belong to the source block. Thereafter, all of the data for the found JBAs are copied to the destination block one after another. Either option results in reducing the amount of mSet loading and ensures more efficient sequential reads.

The present technology enhances workload management of data storage systems by using an internal copy function and / or a zone-append technology. The internal copy function is used, e.g., in merge operations to move data between locations on a disk without using off-disk resources (e.g., processing or memory of a CPU). Zone-append technology uses nameless writes (e.g., write instruction without an assigned destination address on the disk) to combine IO units from different threads to be written to a common zone of a disk (e.g., a shingled magnetic recording (SMR) disk). Sequential addresses are assigned to IO units from different threads based on their order in the write queue, reducing the latency and seek time typically associated with random writes. The zone-append technology, e.g., uses sequential write operations within specified zones, allowing the disk to determine the actual write location and to report post-write logical block addresses (LBAs).