1846 results about "Datapath" patented technology

A storage domain management system supports storage domains. The storage server includes a plurality of communication interfaces. A first set of communication interfaces in the plurality is adapted for connection to all kinds of users of data. A second set of communication interfaces in the plurality is adapted for connection to respective devices in a pool of storage devices for use in a storage domain. Data processing resources in the server are coupled to the plurality of communication interfaces for transferring data among the interfaces. The data processing resources comprise a plurality of driver modules and configurable logic linking driver modules into data paths. Each configured data path acts as a virtual circuit that includes a set of driver modules selected from the plurality of driver modules. A data storage transaction which is received at a communication interface is mapped to one of the configured data paths. A display and a user input device are included with data processing structures to manage images displayed on the display.

A network security device which acts as an “airlock” for traffic between a communications device and a network. Data is screened using rules based analysis by the security device to counter various threats, including viruses, phishing, attempts to “hijack” communications, communications with known malicious addresses or unknown addresses, and transmission of sensitive information. Data packets can be reassembled into files for screening, and decoded or expanded as necessary, but is never executed. The data path for the data being screened is kept separate from the operations of the network security device itself, so that the device is incorruptible—its programming cannot be compromised from outside sources. Updates for rules and entry of sensitive data for screening, etc., must be done through a physical interface, not via the normal data communications channel. The device is invisible—it cannot be “seen” by the network, and thus cannot be attacked.

The splitting of storage applications and functions into a control path (CP) component and a data path (DP) component is disclosed. Reads and writes may be handled primarily in the DP. The CP may be responsible for discovery, configuration, and exception handling. The CP can also be enabled for orchestrating complex data management operations such as snapshots and migration. Storage virtualization maps a virtual I/O to one or more physical I/O. A virtual target (vTarget) in the virtual domain is associated with one physical port in the physical domain. Each vTarget may be associated with one or more virtual LUNs (vLUNs). Each vLUN includes one or more vExtents. Each vExtent may point to a region table, and each entry in the region table may contain a pointer to a region representing a portion of a pExtent, and attributes (e.g. read/write, read only, no access) for that region.

Advanced features for interactive television applications are described, including a back feature, a forward feature, a history feature, a go to feature, an extras feature, a reminder feature, a favorites feature, a parental control feature, and a search feature. Features may be inter-resource. Support for multiple data paths, Internet access, interactive services, and user profiles are also described.

A hybrid centralized and distributed processing system includes a switching device that connects a storage processor to one or more servers through a host channel processor. The switching device also connects the storage processor to one or more storage devices such as disk drive arrays, and to a metadata cache and a block data cache memory. The storage processor processes access request from one or more servers in the form of a logical volume or logical block address and accesses the metadata cache to determine the physical data address. The storage processor monitors the performance of the storage system and performs automatic tuning by reallocating the logical volume, load balancing, hot spot removal, and dynamic expansion of storage volume. The storage processor also provides fault-tolerant access and provides parallel high performance data paths for fail over. The storage processor also provides faster access by providing parallel data paths for, making local copies and providing remote data copies, and by selecting data from a storage device that retrieves the data the earliest.

An apparatus for optimizing communications between session border controllers in a network environment is provided that includes a session border controller (SBC) operable to communicate with a first endpoint and a second endpoint. The SBC is also operable to communicate with a data path border element (DBE) and a signaling path border element (SBE). The DBE is operable to provide a media relay for a communication session involving the endpoints, the media relay being invoked by either of the endpoints using a traversal using relay network address translation (TURN) protocol, which allows the SBC to operate in either of two modes depending on protocol support present in the endpoints.

A new general method for building hybrid processors achieves higher performance in applications by allowing more powerful, tightly-coupled instruction set extensions to be implemented in reconfigurable logic. New instructions set configurations can be discovered and designed by automatic and semi-automatic methods. Improved reconfigurable execution units support deep pipelining, addition of additional registers and register files, compound instructions with many source and destination registers and wide data paths. New interface methods allow lower latency, higher bandwidth connections between hybrid processors and other logic.

A system is provided for facilitating remote load balancing in a high-availability network. During operation, the system receives a plurality of data frames destined for a destination device, wherein the destination device is coupled to a network via a trunk link, the trunk link coupling the destination device to at least two separate egress switching devices. The system then forwards the data frames via at least two data paths, each of which leads to a respective egress switching device.

Some embodiments provide a novel method for load balancing data messages that are sent by a source compute node (SCN) to one or more different groups of destination compute nodes (DCNs). In some embodiments, the method deploys a load balancer in the source compute node's egress datapath. This load balancer receives each data message sent from the source compute node, and determines whether the data message is addressed to one of the DCN groups for which the load balancer spreads the data traffic to balance the load across (e.g., data traffic directed to) the DCNs in the group. When the received data message is not addressed to one of the load balanced DCN groups, the load balancer forwards the received data message to its addressed destination. On the other hand, when the received data message is addressed to one of load balancer's DCN groups, the load balancer identifies a DCN in the addressed DCN group that should receive the data message, and directs the data message to the identified DCN. To direct the data message to the identified DCN, the load balancer in some embodiments changes the destination address (e.g., the destination IP address, destination port, destination MAC address, etc.) in the data message from the address of the identified DCN group to the address (e.g., the destination IP address) of the identified DCN.

A method of producing a reconfigurable circuit device for running a computer program of moderate complexity such as multimedia processing. Code for the application is compiled into Control Flow Graphs representing distinct parts of the application to be run. From those Control Flow Graphs are extracted basic blocks. The basic blocks are converted to Data Flow Graphs by a compiler utility. From two or more Data Flow Graphs, a largest common subgraph is determined. The largest common subgraph is ASAP scheduled and substituted back into the Data Flow Graphs which also have been scheduled. The separate Data Flow Graphs containing the scheduled largest common subgraph are converted to data paths that are then combined to form code for operating the application. The largest common subgraph is effected in hardware that is shared among the parts of the application from which the Data Flow Graphs were developed. Scheduling of the overall code is effected for sequencing, providing fastest run times and the code is implemented in hardware by partitioning and placement of processing elements on a chip and design of the connective fabric for the design elements.

A system and method of operation is disclosed describing migration, management, and operation of applications and servers from customer data centers to cloud computing platforms without modification to existing environments or user access procedures. A cloud isolation layer operates as a virtual layer on the cloud platform, enabling server operation in a virtual environment that appears the same as the prior local environment. A cloud software image and a local cloud gateway act to redirect existing addressing from the local environment to the cloud implementation through secure network and data paths. A local management application provides a control interface and maps and manages the local environment and utilized cloud resources.

For a network control system that receives, from a user, logical datapath sets that logically express desired forwarding behaviors that are to be implemented by a set of managed switching elements, a controller for managing several managed switching elements that forward data in a network that includes the managed switching elements is described. The controller includes a set of modules for detecting a change in one or more managed switching elements and for updating logical datapath set based on the detected change. The logical datapath set is for subsequent translation into a set of physical forwarding behaviors of the managed switching elements.

The invention relates to a method for a handover of a mobile node from a non-3GPP to a 3GPP network, and of a mobile node, which is located in a non-3GPP/3GPP network. The handover is improved by discovering an appropriate MME and registering the mobile node at the discovered MME, in advance. This includes to first determine the location of the mobile node in the non-3GPP network, so as to be able to detect an MME in the vicinity of the mobile node's location. The 3GPP contexts are then transmitted to the new MME before the handover is performed. Moreover, the invention teaches to change the Serving-Gateway in the 3GPP network before performing a handover, thereby accelerating the handover. When a handover gets likely, the mobile node's location is determined and a new Serving-Gateway is selected. The data path is changed to go via the new Serving-Gateway.

A computing system includes data encryption in the data path between a data source and data storage devices. The data encryption may utilize a key which is derived at least in part from an identification code stored in a non-volatile memory. The key may also be derived at least in part from user input to the computer.

A disk drive is disclosed including a disk having a plurality of data tracks, wherein each data track includes a plurality of data sectors. A head is actuated over the disk for accessing the data sectors. A write command is received from a host, wherein the write command includes a host block and corresponding host block address. The host block is partitioned into a plurality of sub blocks, and a plurality of sub block addresses are generated in response to the host block address, wherein each sub block address corresponds to one of the sub blocks. Error detection code (EDC) data is generated for each sub block in response to the sub block and corresponding sub block address. Each sub block and corresponding EDC data are combined to generate a plurality of partial codewords that are written to the data sectors corresponding to the sub block addresses.

A reconfigurable data path processor comprises a plurality of independent processing elements. Each of the processing elements advantageously comprising an identical architecture. Each processing element comprises a plurality of data processing means for generating a potential output. Each processor is also capable of through-putting an input as a potential output with little or no processing. Each processing element comprises a conditional multiplexer having a first conditional multiplexer input, a second conditional multiplexer input and a conditional multiplexer output. A first potential output value is transmitted to the first conditional multiplexer input, and a second potential output value is transmitted to the second conditional multiplexer output. The conditional multiplexer couples either the first conditional multiplexer input or the second conditional multiplexer input to the conditional multiplexer output, according to an output control command. The output control command is generated by processing a set of arithmetic status-bits through a logical mask. The conditional multiplexer output is coupled to a first processing element output. A first set of arithmetic bits are generated according to the processing of the first processable value. A second set of arithmetic bits may be generated from a second processing operation. The selection of the arithmetic status-bits is performed by an arithmetic-status bit multiplexer selects the desired set of arithmetic status bits from among the first and second set of arithmetic status bits. The conditional multiplexer evaluates the select arithmetic status bits according to logical mask defining an algorithm for evaluating the arithmetic status bits.

One embodiment entails delivering a software payload to guest software in a virtual machine so that the software payload is part of a file system accessible by the guest software, wherein delivery avoids a data path involving a network stack of the virtual machine.

A communication system uses analog and digital circuits along the same data path in a manner that permits the analog circuitry to avoid adverse affects caused by the digital circuitry. Consistent with one embodiment directed to a signal processing system that detects faint incoming signals, the analog and digital circuits are implemented on a single piece of silicon. In such signal processing systems, noise generated by digital processing blocks can degrade the performance of sensitive analog portions. The effective noise is reduced by causing the analog and digital portions of the system to function during separate time intervals. The noise-generating portions of the system may then be turned off during a first data-communication interval while the analog block operates. The data acquired during this period is stored for subsequent processing by the digital portion during a second shorter data-communication interval. Other aspects are applicable to reception arrangements in which part of the incoming signal may be disregarded without significant degradation in performance of the rest of the system, and other aspects are directed to transmission arrangements in which the inverse of the above reception arrangement is used.

File operations on files in a peripheral system are controlled by an intelligent controller with a file processor. The files are accessed as if the intelligent controller were an addressable virtual storage space. This is accomplished first by communicating controller commands for the intelligent controller through read/write commands addressed to a Command Region of a virtual storage device. The controller commands set up a Mapped Data Region in the virtual storage device for use in controlling data transfer operations to and from the peripheral system. With the Mapped Data Regions set up, blocks of data are transferred between the host and the intelligent controller in response to read/write commands addressed to the Mapped Data Region of the virtual storage device.In an additional feature of the invention file operations are communicated between host and controller through a device driver at the host and a device emulator at the intelligent controller. If the address in the device write/read command is pointing to the Command Region of the virtual storage device, a Command Region process interprets and implements the controller operation required by the controller command embedded in the device write/read command. One of these controller commands causes the Command Region processor to map a requested file to a Mapped Data Region in the virtual storage device. If the address detected by the detecting operation is in a Mapped Data Region, a Mapped Data Region process is called. The Mapped Data Region process reads or writes requested data of a file mapped to the Mapped Data Region addressed by the read/write command. This mapped file read or write is accomplished as a transfer of data over a data path separate from a control path. In an additional feature of the invention, the data transfer between host system and intelligent controller is accomplished by performing a direct memory access transfer of data.