180results about How to "Reduce area" patented technology

The invention relates to a power supply module which comprises an inductance circuit, a switch circuit, a check driving circuit and a controller, wherein the inductance circuit is provided with an inductor and a voltage feedback line, and the voltage feedback line feeds back the end voltage of the inductor. The switch circuit is electrically connected with the inductance circuit to drive the inductance circuit. The check driving circuit is electrically connected with the switch circuit and the voltage feedback line, and the check driving circuit controls the switch circuit and generates a current feedback signal according to the end voltage of the inductor. The controller is electrically connected with the check driving circuit, and controls the check driving circuit according to the current feedback signal.

This application provides a voltage conversion circuit and electronic device, including: a controller, a terminating resistor, a plurality of first resistors, a plurality of second resistors, and a plurality of control switches. The first end of the terminating resistor is grounded; the first resistors are connected in series, and the first end of the first first resistor is connected to the second end of the terminating resistor; the first end of one second resistor is connected to the first end of the first first resistor, and the first end of each of the other second resistors is connected to the second end of the first resistor respectively; the first end of each control switch is connected to the second end of one of the second resistors respectively, and the second end of the control switch is connected to or grounded to a preset reference voltage according to a control signal sent by the controller; one of the plurality of control switches is set as a modulation switch, which is used to receive a modulation signal sent by the controller, and both the modulation switch and the modulation signal are determined based on nonlinear error.

This disclosure provides a DC-DC converter and chip, wherein the DC-DC converter includes a bootstrap boost circuit, a charge pump boost circuit, a high-side drive circuit, a low-side drive circuit, a high-side power transistor, and a low-side power transistor. The bootstrap boost circuit provides a first boost voltage to the high-side drive circuit. The high-side drive circuit outputs a first high-side drive voltage to the control electrode of the high-side power transistor based on the first boost voltage. The charge pump boost circuit generates a second boost voltage through a charge pump and outputs a second high-side drive voltage to the control electrode of the high-side power transistor based on the second boost voltage. The second boost voltage is greater than the first boost voltage. The first electrode of the high-side power transistor is coupled to the input voltage terminal, and the second electrode is coupled to the first electrode of the low-side power transistor via a switching node. The high-side power transistor is turned on or off according to the first and second high-side drive voltages. One end of the bootstrap boost circuit and one end of the charge pump boost circuit are respectively coupled to the switching node.

The utility model discloses a kind of car sunroof guide rails with buffering noise reduction structure, it is related to sunroof guide rail field, this kind of car sunroof guide rail with buffering noise reduction structure includes the guide rail main body extending along first direction, outwardly extending mounting plate is formed on the guide rail main body one side outer wall, multiple mounting holes are opened on mounting plate, for bolt connection frame, bolt is passed in mounting hole when connecting;This kind of car sunroof guide rail with buffering noise reduction structure forms three-dimensional grid structure by buffer groove and extension groove, main rubber pad absorbs vertical impact, extension rubber pad inhibits longitudinal vibration, double elastic deformation greatly reduces the area of mounting plate contact part after installation with frame, blocks vibration transmission path, rubber ring in the protruding part groove isolates bolt and mounting plate metal contact, eliminates high-frequency friction abnormal sound.

The utility model discloses a kind of electrically conductive structure, photovoltaic module and photovoltaic power generation system, electrically conductive structure includes electrically conductive matrix, insulating layer and first adhesive layer. Insulating layer is located at the side of electrically conductive matrix. First adhesive layer is connected at the side of insulating layer away from electrically conductive matrix. According to the electrically conductive structure of the utility model, by integrating electrically conductive matrix, insulating layer and first adhesive layer together, compared with the connection mode of traditional electrically conductive structure and electrical component (for example battery piece), the use of adhesive tape is reduced, thereby reducing the area of optical obstruction, it is favorable to promote the output power of electrical component connected with electrically conductive structure, while the mutual displacement of electrically conductive matrix, insulating layer and first adhesive layer in the process of assembly and use can be avoided, it is favorable to promote the structural stability and reliability of electrically conductive structure, promote the use safety of electrically conductive structure. In addition, the laying process of electrically conductive structure is simplified, and the mounting yield of electrically conductive structure is improved.

The application discloses a cold plate device and a battery pack, comprising a cold plate body, the cold plate body is provided with a flow channel area, a sealing area and a pressure relief area, the sealing area is used for sealing the flow channel area, the flow channel area is used for containing a heat exchange medium, and the pressure relief area is used for being correspondingly arranged with an explosion-proof valve of a cylindrical battery; the pressure relief area comprises a pressure relief hole and a thinning area located outside the pressure relief hole, and a projection of an outer edge of the thinning area on a bottom surface of the cylindrical battery can surround the explosion-proof valve. The pressure relief area is composed of the pressure relief hole and the thinning area, so that the area of the pressure relief hole can be reduced, and the sealing connection strength of the edge of the flow channel area can be prevented from being affected due to the excessively large area of the pressure relief hole. The thinning area is weak in strength, when the explosion-proof valve of the cylindrical battery is opened for pressure relief, the explosion-proof valve and high-pressure gas sprayed out can easily damage the thinning area, so that the thinning area is collapsed, and it is ensured that the high-pressure gas in the cylindrical battery can be relieved through the cold plate device.

The utility model relates to the technical field of ultrasonic imaging and chip design, and relates to a circuit system and chip for realizing on-chip continuous wave Doppler ultrasound. The utility model directly connects together the host computer receiver and the host computer receiver and internal transducer array element through the CW channel; the array periphery can be multiplexed for transmitting the analog channel of the received signal in B mode; the MUX switch is arranged on the array unit inside and the array periphery circuit; the MUX switch of array unit inside is controlled to control the access of arbitrary transducer array element to the CW channel; arbitrary CW channel is connected to the host computer interface outside the chip through the MUX switch on the array periphery circuit. The utility model realizes the continuous wave Doppler ultrasound function under the premise of not increasing the number of additional cables and not increasing the additional power consumption; the flexibility of CW transmission and reception is guaranteed, the chip area is saved, the cable needed for ultrasonic probe integration is reduced, and the utility model can be widely applied to various ultrasonic imaging systems and ultrasonic chips.

The application discloses a low-power bandgap reference current source circuit and a control method, and the circuit comprises a current mode bandgap circuit, an error amplifier input stage circuit, a threshold modulation circuit and a current mirror circuit; the current mode bandgap circuit is internally provided with an error amplifier OPAMP and a proportional resistance network; the error amplifier input stage circuit is a PMOS pair tube input stage circuit; the threshold modulation circuit is a source-liner forward bias threshold modulation circuit, which is used for forward biasing the threshold voltage of all PMOS tubes in the low-power bandgap reference current source circuit and enabling the NMOS tube connected with the error amplifier OPAMP output stage to work in a saturation region; and the current mirror circuit is a series diode compensation method current mirror circuit structure. The application is compatible with a standard CMOS process, realizes sub-1V low voltage, micro-nano ampere level low power consumption, high-precision low-noise small area effect, solves various technical pain points of a traditional scheme, and has excellent application prospects in a wearable device power management system.

The application discloses a kind of fermented feed fermented by three strains of probiotics of Bacillus YA ( Bacillus sp ), yeast Y ( Saccharomyces cerevisiae ) and capsular red bacteria R3 ( Rhodobacter capsulatus ), and preparation method and application in aquaculture thereof, and viable count is not less than 1×10 7 CFU / g.The fermented feed is replaced ordinary feed according to certain proportion, and feeding result shows that aquaculture water quality is significantly improved after adding fermented feed, and fish growth performance, digestive enzyme activity, immunity, and muscle quality are also obviously improved.Using the feed in suitable range can shorten growth cycle, reduce cost, improve aquaculture environment, reduce antibiotic use, and improve muscle quality of farmed animals, with good economic and ecological benefits, simple fermentation process, low cost, and suitable for industrial large-scale production.

The application discloses a power device, a preparation method and a vehicle, and relates to the technical field of power devices. The power device comprises a substrate, a central region of the substrate forms a cell structure, and a part of the substrate away from the central region forms a voltage-withstanding terminal; an edge position of the voltage-withstanding terminal is provided with a step part; and a first passivation layer is deposited on the step part, and ions are implanted in the first passivation layer to modulate a carrier distribution in the substrate at the voltage-withstanding terminal. The step part is arranged at the edge position of the voltage-withstanding terminal, the three-dimensional structure of the substrate is fully utilized, and the area of the voltage-withstanding terminal is reduced. The first passivation layer is deposited on the step part, and charged ions are implanted in the first passivation layer, so that the charged ions are pinned in the first passivation layer and cannot move with an applied electric field, and the purpose of modulating the carrier distribution in the substrate is achieved, and the effectiveness and stability of the voltage-withstanding of the voltage-withstanding terminal are effectively realized.

A switchable combiner and / or splitter circuit comprising at least two Wilkinson elements is suggested. The switchable circuit comprises one first terminal and for each Wilkinson element one pair of second terminals associated with the corresponding Wilkinson element. Each Wilkinson element connects the first terminal with the associated pair of second terminals. Each Wilkinson element includes a switchable component enabling selectively activating the associated pair of second terminals. The proposed solution combines a Single-Pole-Double-Through switch and a Wilkinson element and, thus, reduces the chip area required for integrating the circuit.

The application relates to the technical field of pots, and particularly provides a multi-layer anti-sticking pot, which comprises at least two non-sticking layers, the at least two non-sticking layers are stacked in sequence to jointly form a non-sticking pot body, the inner surface of the non-sticking pot body is formed with a scale structure, the scale structure extends and distributes from the center of the non-sticking pot body to the edge, the scale structure comprises a plurality of recessed parts and convex parts formed between the recessed parts, the recessed parts and the convex parts are matched and used for reducing the area of contact with food to be cooked. The at least two non-sticking layers are stacked to jointly form the non-sticking pot body, the anti-sticking property of the pot is improved, the scale structure of the non-sticking pot body reduces the contact area between the surface layer of the pot and the food, physical anti-sticking and chemical non-sticking are realized, and the anti-sticking property of the pot is further improved.

The disclosure provides a low dropout linear regulator circuit and a memory, the circuit comprising: a first transistor, a second transistor and a feedback control circuit; the gate dielectric layer thickness of the first transistor is less than a preset threshold; the first end of the first transistor and the second end of the second transistor are connected to receive a power supply voltage; the second end of the first transistor and the first end of the second transistor are connected to output a target voltage; the control end of the second transistor receives a power-on control signal, and the second transistor is used to output the target voltage during the power-on process; the feedback control circuit is connected with the control end of the first transistor, the feedback control circuit is used to receive the power-on control signal, control the first transistor to be disconnected during the power-on process, and control the first transistor to output the target voltage after the power-on is completed; wherein the power-on control signal is in an enabled state during the power-on process, and is in a disabled state during the remaining period. The disclosure can reduce the circuit area, avoid overvoltage and simplify the timing.

The application discloses a shrinkage-compensating concrete containing acid-free weak base expandable graphite and a preparation method thereof. The concrete comprises cement 200-500 parts, mineral admixtures 50-200 parts, fine aggregate 600-800 parts, coarse aggregate 1000-1300 parts, water 120-200 parts, additive 5-15 parts and acid-free weak base low-temperature expandable graphite 15-75 parts. The expansion trigger temperature of the graphite is 90-100 DEG C, and the pH value is 6.0-8.0. The method comprises the following steps: firstly, uniformly mixing and stirring cement, mineral admixtures, fine aggregate, coarse aggregate and acid-free weak base low-temperature expandable graphite to obtain dry mixture B; secondly, mixing water and additive and adding the mixture into the dry mixture B to uniformly stir to obtain a concrete mixture; and thirdly, forming the concrete mixture, carrying out steam curing after final setting, naturally cooling to room temperature and obtaining the shrinkage-compensating concrete. Therefore, the concrete self-shrinkage can be precisely and efficiently compensated in the steam curing process of the concrete.

This invention belongs to the field of integrated optoelectronics technology, specifically relating to a parameterized photonic unit library generation system and method based on adiabatic performance hierarchical mapping. The system comprises, in sequence, a module 1: adiabatic performance hierarchical definition interface; a module 2: a local constraint dynamic mapping engine; a module 3: an inverse geometric synthesizer; and a module 4: a visual tradeoff analyzer. Module 1, the adiabatic performance hierarchical definition interface, is used for system presets or allows users to define discretized performance levels (Tier). Module 2, the local constraint dynamic mapping engine, is used to map the global performance target η... target The translation is local geometric constraints; Module 3: Inverse Geometric Synthesizer, used to perform deterministic reverse construction; Module 4: Visual Trade-off Analyzer, used to show the user the efficiency-length trade-off curve before generating the layout.

The application discloses a solar cell panel support shaking early warning device, and relates to the technical field of solar panel supports, which comprises a base, a supporting cylinder fixedly connected to the upper surface of the base, a motor fixedly connected between the inner walls of the base, a storage rack slidingly connected between the inner walls of the supporting cylinder, a screw rod rotatably connected to the bottom of the inner walls of the supporting cylinder, the output end of the motor being fixedly connected to the bottom end of the screw rod, the screw rod being threadedly connected with the bottom end of the storage rack, and U-shaped pressing rods being slidingly connected to the outer surface of the supporting cylinder at equal intervals. The device can reduce the overall height of the device by sliding the storage rack into the supporting cylinder, thereby reducing the overall gravity center of the device, making the device easier to keep balanced, and reducing the area of the device subjected to wind, the force arm of the device, the torque of the wind force acting on the device, and the influence of the wind force on the device, so that the shaking amplitude of the device is reduced.

This application provides a DWA algorithm implementation circuit and an analog-to-digital converter. The DWA algorithm implementation circuit includes a shifter and a combinational logic circuit. The shifter's data input terminal receives thermometer codes output by a quantizer based on a first clock control signal; the shifter's data output terminal is connected to the input terminal of the combinational logic circuit and serves as the output terminal of the DWA algorithm implementation circuit; the combinational logic circuit concatenates the thermometer codes output by the shifter and performs combinational logic operations on the concatenated thermometer codes to generate a shift indication signal for the shifter; the shifter performs shift operations based on the shift indication signal. This application significantly simplifies the circuit structure, saves circuit area, and reduces circuit cost; simultaneously, it improves circuit speed and increases its flexibility.

The application aims to provide a medical patch, which comprises a tearable film layer for being torn under external force, a gel layer connected with the tearable film layer and containing a skin external medicine, and the like. The gel layer is provided with a plurality of cross-distributed segmentation grooves to form a plurality of gel blocks, and the tearable film layer is provided with a tear line groove. Compared with the prior art, the application can facilitate the adhesion to the affected area and reduce the area of the region with the medicine component contacting the normal skin.

The application discloses a high-precision quick-switching continuous sandwich plate production line, which comprises a lower plate uncoiling and profiling system, an upper plate uncoiling and profiling system, an upper steel plate transition roller way, a double-track pressure curing machine, a lower roller way, a tracking cutting saw, a cooling bed, a stacking machine, a packing machine, a first mineral wool supply system and a second mineral wool supply system, and the core of the application is that the lower plate uncoiling and profiling system and the upper plate uncoiling and profiling system are installed by exchanging positions, the lower plate uncoiling and profiling system is arranged at the front end of the upper plate uncoiling and profiling system, and part of the upper steel plate transition roller way and the lower profiling machine transverse moving system are cancelled, so that the lower plate uncoiling and profiling system is not interfered by the upper steel plate transition roller way, the plate type can be directly switched by using a crown block to hoist and switch the roller frame assembly of the lower profiling machine, the step of moving the lower profiling machine out of the line to switch the specifications is omitted, the investment cost of the production line is greatly reduced, the use area of the workshop is saved, and the switching of the specifications is more accurate and quick.

This invention relates to an in-memory computing circuit in the field of integrated circuits, and particularly to a multifunctional in-memory computing circuit and chip based on a 9T1C-SRAM cell. The multifunctional in-memory computing circuit includes five NMOS transistors N1-N5, four PMOS transistors P1-P4, and a capacitor C0. P1, P2, N1, and N2 form a latch structure; N3 controls row-direction read / write operations via word line WL and bit line BL; P3, P4, N4, and N5 are used to implement Boolean logic write-back, row-direction read / write, and multiply-accumulate functions. This invention's multifunctional in-memory computing circuit simultaneously supports Boolean logic write-back, signed multiply-accumulate (MAC) operations, and bidirectional row and column read / write, achieving deep integration of logical operations, arithmetic operations, and data movement within the same memory cell.

This invention discloses an analog-to-digital converter (ADC) for voltage-mode RRAM (Remote Digital RAM) memory circuits, belonging to the field of ADC technology, including a source line SL. i The system includes a sampling module, an error amplifier A, a first quantization circuit, a second quantization circuit, a buffer BU, and power supplies LDO- and LDO+; the source line SL... i The error amplifier A is connected to the sampling module; its inverting input is connected to the sampling module, and its non-inverting input is connected to a capacitor C. C The capacitor C C The lower plate is grounded; power supplies LDO- and LDO+ provide high and low initialization reference voltages V to the first and second quantization circuits, respectively. ref The quantization reference potentials are used to determine the positive or negative value of the quantization value. No external signal control is required. When expanding the quantization bit width, only the number of quantization potentials provided by the power supply needs to be changed, without exponentially increasing the number of comparators or setting up a DAC capacitor array, which greatly reduces the circuit area and power consumption.

This invention relates to the field of chip technology, and more particularly to a method, electronic device, and medium for splicing together to generate a target SRAM. The method generates a target SRAM based on a candidate SRAM, a first register, and a second register, such that the final generated target depth is equal to or greater than the target depth with an error within a preset depth difference range, and the final generated target bit width is equal to or greater than the target bit width with an error within a preset bit width difference range. This invention reduces the waste of size and area in the final generated target SRAM.

This invention discloses a MOS for battery protection and its manufacturing method. The MOS for battery protection does not use wire bonding or copper clip structures, and the gate, source and drain of each chip are directly soldered to the base island. This makes the size of the molding compound close to the size of the MOS main chip, reducing parasitic resistance, parasitic inductance and thermal resistance of the package, thereby reducing the area and volume of the finished product, saving molding compound and PCB area, and making it more suitable for use in small spaces such as mobile phone batteries and Bluetooth headset batteries.

This invention relates to the field of baseband data bit synchronization, specifically a binary baseband signal bit synchronization method. The method includes performing binary symbol determination on baseband data to obtain baseband bit data; using the ratio of the baseband bit data's sampling rate to the baseband bandwidth as the oversampling rate; calculating a midpoint based on the oversampling rate; using preset filter bits, a synchronization counter, a first missynchronization avoidance counter, and a second missynchronization avoidance counter to synchronize the baseband bit data based on the oversampling rate and the midpoint; simultaneously, performing majority decision on the baseband bit data or baseband data according to the application scenario to obtain synchronization bit data; and using the synchronization bit data as the bit synchronization result for the binary baseband. This method simplifies existing self-synchronization methods; due to the simplified algorithm, it achieves lower hardware costs and lower power consumption, making it more suitable for the Internet of Things (IoT).

The application relates to the technical field of equipment installation, and particularly discloses a pit edge mounting base and a construction method, which comprises a pre-buried plate, the pre-buried plate is installed on the bottom of the inner wall of a pouring groove arranged at the edge of a pit body, a supporting piece is fixedly installed on the pre-buried plate, a guard angle steel is installed on the top of the supporting piece, the top of the guard angle steel is flush with the top of the pouring groove, an angle steel supporting lug is fixedly connected to the side of the guard angle steel close to the pit, a gap is formed between the upper surface of the angle steel supporting lug and the upper surface of the guard angle steel, and the gap is used for mounting a pit cover plate; the pre-buried plate is used for connecting the structure of the pit foundation, the top of the pre-buried plate is provided with a civil engineering formwork during the civil engineering process, so that the pre-buried plate can be effectively leveled through the civil engineering formwork; and the pre-buried plate is arranged in a plane, after pouring the foundation, no protrusion is formed, and compared with the inclined steel bar used as the pre-buried piece, the safety hidden danger of tripping the installation personnel is eliminated.

The embodiment of the present application discloses a kind of multiplexer and communication equipment, the multiplexer includes a transmitting port, at least one receiving port, at least one antenna port, filter set and switch.The fixed end of switch is connected with the first TDD filter in filter set, the first free end of switch is connected with the output end of the second TDD filter in filter set, and the second free end of switch is connected with one of receiving port;Transmitting port is connected with the input end of FDD transmitting filter in filter set and the input end of second TDD filter, and the output end of FDD receiving filter in filter set is connected with one of receiving port;The output end of FDD transmitting filter, the input end of FDD receiving filter and the first TDD filter are respectively connected with one of antenna port.Using the embodiment of the present application can improve port multiplexing rate and reduce circuit area under the premise of ensuring the reliable work of FDD and TDD.

The application is suitable for the field of radio frequency technology, and particularly relates to a phase comparison circuit and a radio frequency chip. The phase comparison circuit comprises a first amplifier, a second amplifier, a first frequency divider, a second frequency divider, a first Schmitt trigger, a second Schmitt trigger, a first flip-flop, a second flip-flop, an AND gate unit, a first filter unit and a second filter unit; an input end of the first amplifier is used for receiving a first radio frequency signal, an output end of the first amplifier is connected with an input end of the first frequency divider, an input end of the second amplifier is used for receiving a second radio frequency signal, and an output end of the second amplifier is connected with an input end of the second frequency divider; the first frequency divider and the second frequency divider are respectively used for reducing the frequency of the amplified first radio frequency signal and the amplified second radio frequency signal; compared with the prior art, the phase comparison circuit provided by the application has the advantages of simple structure, wide phase detection range, stable output and the ability to effectively reduce the complexity of radio frequency front-end power control.