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767results about How to "Reduce area" patented technology

Improved AHB-to-APB bus bridge and control method thereof

An improved APB bus bridge structurally comprises an AHB bus interface and an APB bus interface and further comprises an interface sequential conversion and control module, a control FIFO (First In First Out) module and a data FIFO module, wherein the interface sequential conversion and control module comprises a state machine, a data FIFO control logic unit and a control FIFO control logic unit and a register. A control method of the improved APB bus bridge comprises the following steps: generating a ready signal by the APB bus bridge; determining that the ready signal has a high level, and autonomously sending a transmission request by an AHB bus master; receiving and judging the transmission request by the APB bus bridge, wherein if the transmission request is effective, a control signal and data of the transmission request are stored in the corresponding FIFO modules respectively and the APB bus bridge does not distinguish read and write transmissions; and through state conversion and control of the state machine of the interface sequential conversion and control module, after finishing sequential matching conversion of the two buses, quickly carrying out reliable transmission operation. The improved APB bus bridge is applicable to sequential synchronous and asynchronous AHB-to-APB bus transmission and is compatible with a memory interface.
Owner:杭州中科微电子有限公司

Capacitance single mass three-shaft acceleration transducer and preparation method

The invention relates to a capacitive triaxial acceleration transducer with a single mass block and a preparation method thereof. A mass block region and a comb structure region are formed on a substrate, wherein, the mass block region comprises a first conducting layer, a socle beam which is positioned on the first conducting layer and is in fulcrum connection with the substrate, and a first block and a second movable block which are respectively connected with the two sides of the socle beam; the movable blocks and the first conducting layer form a differential capacitor used for measuring the accelerated speed in the first direction; the comb structure region is formed on the same layer with the mass block region, which comprises a first group of comb structure which is formed on the outer side of the second movable block and is used for measuring the accelerated speed in the second direction, and a second group of comb structure which is symmetrically formed on the opposite two natural sides of any movable block and is used for measuring the accelerated speed in the third direction; and furtherer more, the gravity of a combined region formed by the mass block region and the comb structure region deviates from the socle beam; therefore, the triaxial acceleration transducer formed by adopting the single mass block can realize the function of measuring the vector acceleration.
Owner:MEMSENSING MICROSYST SUZHOU CHINA

Ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube

The invention discloses an ultra-junction vertical double-diffused metal-oxide transistor which comprises an N-type doped silicon substrate, an N-type doped silicon epitaxial layer, a primitive cell area, a terminal area arranged on the periphery of the primitive cell area and a transition area which is positioned between the primitive cell area and the terminal area; the N-type doped silicon epitaxial layer is arranged on the N-type doped silicon substrate; the primitive cell area and the terminal area are arranged on the N-type doped silicon epitaxial layer; the terminal area of the transistor comprises a first ultra-junction structure and an N-type silicon doped semiconductor area, wherein the first ultra-junction structure comprises an N-type column and a P-type column; a lateral P-type column and an N-type area with high-concentration are arranged in the N-type silicon doped semiconductor area; an N-type thin layer with high-concentration is arranged on the surfaces of the first ultra-junction and the N-type silicon doped semiconductor area; and a field oxide layer is arranged on the N-type thin layer. The ultra-junction vertical double-diffused metal-oxide transistor is characterized in that: the lateral P-type column is arranged in the N-type silicon doped semiconductor area and the N-type thin layer with high-concentration is arranged on the surface of the terminal area of the transistor.
Owner:SOUTHEAST UNIV

Phase-change energy storage bedding system

The invention provides a phase-change energy storage bedding system. The system comprises a bedding module, an energy supply module and an energy transfer module. The energy transfer module transfersenergy of the energy supply module to the bedding module; the bedding module comprises a phase-change material and a heat conducting component, wherein the heat conducting component is used for transferring the energy provided by the energy supply module to the phase-change material; the energy supply module comprises daily equipment, and the daily equipment generates waste heat; the energy transfer module comprises a heat pump system, in winter, the heat pump system is used for transferring the energy of the energy supply module or complementing waste heat, and increasing the grade of the waste heat, and the heat of the increased grade is transferred to the heat conducting component. In summer, needed cooling capacity is produced in a free cooling capacity recovery mode, an operation modeof combination with a refrigerating system and an independent operation mode of the refrigerating system. In this way, in winter, the phase-change energy storage bedding system can recover the wasteheat of the daily equipment and increase the grade of the waste heat to heat a human body; in summer, free cooling capacity can be recovered from outdoor air or the needed cooling capacity is preparedthrough a refrigerating cycle, so that the human body is cooled.
Owner:张伯济

Embedded type touch screen and display device

The invention discloses an embedded type touch screen and a display device. As each self-capacitance electrode is provided with a plurality of hollow areas, the area of each self-capacitance electrode can be reduced, and natural capacitance of each self-capacitance electrode is reduced; if it is assumed that the finger capacitance is unchanged in the touching process, the capacitance on each self-capacitance electrode, namely, the sum of the natural capacitance and the finger capacitance is decreased relatively, and therefore RC delay of a feedback signal on each self-capacitance electrode can be reduced; moreover, the change amount of the capacitance on each self-capacitance electrode before and after touching is carried out is increased relative to the natural capacitance of each self-capacitance electrode, relatively, the change amount of each feedback signal caused by the finger is increased, and therefore the touch sensitivity of the touch screen is improved; in addition, as the hollow areas are arranged in the self-capacitance electrodes to reduce the area of the self-capacitance electrodes, a touch blind area between every two adjacent self-capacitance electrodes and the number of the self-capacitance electrodes do not need to be increased, and it is ensured that on the basis of the narrow-border design, the touch sensitivity of the touch screen is improved.
Owner:BOE TECH GRP CO LTD +1

Online detection fault-tolerance system of FPGA (Field programmable Gate Array) digital sequential circuit of SRAM (Static Random Access Memory) type and method

InactiveCN101930052AImprove system reliabilityReduce areaDigital circuit testingField-programmable object arrayField-programmable gate array
The invention discloses an online detection fault-tolerance system of an FPGA (Field programmable Gate Array) digital sequential circuit of an SRAM (Static Random Access Memory) type and a method. The method comprises the following steps of: respectively dividing the sequential circuit for detection and fault-tolerance into combinational logics and sequential logics; respectively carrying out triplication redundancy and majority voting to the combinational logics and the sequential logics to cover failures and obtain a redundant sequential circuit, dividing the redundant sequential circuit in the physical structure into three independent dynamic reconstruction regions and a static region and macro-processing the communication between the dynamic reconstruction regions and the static region with a bus; and respectively physically restraining the three redundant combinational logics to the three independent dynamic reconstruction regions and physically restraining the three redundant sequential logics to the static region. Compared with the prior art, the invention combines two-stage redundancy and reconfiguration technologies, not only can improve the system reliability, but also can reduce implementation resources and decrease the power consumption of a designed circuit.
Owner:UNIV OF ELECTRONIC SCI & TECH OF CHINA
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