101 results about "Organic memory" patented technology

In an organic memory which is included in a radio chip formed from a thin film, data are written to the organic memory by a signal inputted with a wired connection, and the data is read with a signal by radio transmission. A bit line and a word line which form the organic memory are each selected by a signal which specifies an address generated based on the signal inputted with a wired connection. A voltage is applied to a selected memory element. Thus writing is performed. Reading is performed by a clock signal or the like which are generated from a radio signal.

A bistable electrical device (50) employing a bistable body (52) and a high conductivity material (54). A sufficient amount of high conductivity material (54) is included in the bistable body (52) to impart bistable between a low resistance state and a high resistance state by application of an electrical voltage (60).

A system and methodology are disclosed for forming a passive layer on a conductive layer, such as can be done during fabrication of an organic memory cell, which generally mitigates drawbacks inherent in conventional inorganic memory devices. The passive layer includes a conductivity facilitating compound, such as copper sulfide (Cu₂S), which is generated from an upper portion of a conductive material. The conductive material can serve as a bottom electrode in the memory cell, and the upper portion of the conductive material can be transformed into the passive layer via treatment with a plasma generated from fluorine (F) based gases.

An organic switching memory device includes a plurality of first electrode lines; an organic memory layer formed on the plurality of first electrode lines, the organic memory layer having a voltage-current hysteresis characteristic; a semiconductor diode layer stacked on the organic memory layer; and a plurality of second electrode lines formed on the semiconductor diode layer, the plurality of second electrode lines being disposed in a direction so as to intersect the plurality of first electrode lines.

An object of the invention is to reduce an area occupied by a capacitor in a circuit in a semiconductor device, and to downsize a semiconductor device on which the capacitor and an organic memory are mounted. The organic memory and the capacitor, included in a peripheral circuit, in which the same material as the layer containing the organic compound used for the organic memory is used as a dielectric, are used. The peripheral circuit here means a circuit having at least a capacitor such as a resonance circuit, a power supply circuit, a boosting circuit, a DA converter, or a protective circuit. Further, a capacitor in which a semiconductor is used as a dielectric may be provided over the same substrate as well as the capacitor in which the same material as the layer containing the organic compound is used as a dielectric. In this case, it is desirable that the capacitor in which the same material as the layer containing the organic compound is used as a dielectric and the capacitor in which the semiconductor is used as a dielectric are connected to each other in parallel.

It is an object of the present invention to provide a volatile organic memory in which data can be written other than during manufacturing and falsification by rewriting can be prevented, and to provide a semiconductor device including such an organic memory. It is a feature of the invention that a semiconductor device includes a plurality of bit lines extending in a first direction; a plurality of word lines extending in a second direction different from the first direction; a memory cell array including a plurality of memory cells each provided at one of intersections of the bit lines and the word lines; and memory elements provided in the memory cells, wherein the memory elements include bit lines, an organic compound layer, and the word lines, and the organic compound layer includes a layer in which an inorganic compound and an organic compound are mixed.

When an electrode is formed over an organic layer, a temperature is limited because the organic layer can be influenced depending on a temperature in forming the electrode. Therefore, there are problems that an expected electrode cannot be formed, and miniaturization of an element is inhibited. The present invention provides a structure of an organic memory element in which two electrodes are provided in the same layer as two terminals of the memory element, and a layer containing an organic compound is provided between the electrodes. By narrowing a distance between the two electrodes, writing can be performed at low voltage. In addition, a structure of the memory element is simplified, and the area of the memory element can be reduced.

The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.

A circuitized substrate comprised of at least one dielectric material having an electrically conductive pattern thereon. At least part of the pattern is used as the first layer of an organic memory device which further includes at least a second dielectric layer over the pattern and a second pattern aligned with respect to the lower part for achieving several points of contact to thus form the device. The substrate is preferably combined with other dielectric-circuit layered assemblies to form a multilayered substrate on which can be positioned discrete electronic components (e.g., a logic chip) coupled to the internal memory device to work in combination therewith. An electrical assembly capable of using the substrate is also provided, as is an information handling system adapted for using one or more such electrical assemblies as part thereof.

In a method for fabricating a nonvolatile memory element a substrate is provided, a nanomask structure is fabricated on the substrate and a self-assembled monolayer of an organic memory molecule is grown on the substrate on a region not covered by the nanomask structure. A surface of the substrate is patterned by means of an electrode beam in order to form regions with organic memory molecules and regions without organic memory molecules and a top contact is applied to the monolayer formed from the organic memory molecules and the nanomask.

An electrical assembly which includes a circuitized substrate comprised of an organic dielectric material having a first electrically conductive pattern thereon. At least part of the dielectric layer and pattern form the first, base portion of an organic memory device, the remaining portion being a second, polymer layer formed over the part of the pattern and a second conductive circuit formed on the polymer layer. A second dielectric layer if formed over the second conductive circuit and first circuit pattern to enclose the organic memory device. The device is electrically coupled to a first electrical component through the second dielectric layer and this first electrical component is electrically coupled to a second electrical component. A method of making the electrical assembly is also provided, as is an information handling system adapted for using one or more such electrical assemblies as part thereof.

The invention provides a semiconductor device where data can be written after the production and forgery caused by rewriting of data can be prevented, and which can be manufactured at a low cost using a simple structure and an inexpensive material. Further, the invention provides a semiconductor device having the aforementioned functions, where wireless communication is not blocked by the internal structure. The semiconductor device of the invention has an organic memory provided with a memory cell array including a plurality of memory cells, a control circuit for controlling the organic memory, and a wire for connecting an antenna. Each of the plurality of memory cells has a transistor and a memory element. The memory element has a structure where an organic compound layer is provided between a first conductive layer and a second conductive layer. The second conductive layer is formed in a linear shape.

A method of driving a multi-state organic memory device which includes an organic memory layer between upper and lower electrodes. The method comprises continuously applying voltages having different polarities to conduct switching into a low resistance state, and applying a single pulse to conduct switching into a high resistance state. A multi-state memory is realized using one memory device, since it is possible to gain three or more resistance states, thus significantly improving integration. The method has excellent reproducibility, and the resistance state induced by multiple pulses has an excellent nonvolatile characteristic.

To provide a method for manufacturing a semiconductor device using a method in which a desired position is rapidly subjected to laser irradiation while switching laser irradiation patterns. With respect to an organic memory element having a structure in which an organic compound layer is interposed between a pair of conductive layers, data is written to the organic memory element by laser irradiation using a laser irradiation apparatus. Further, a laser beam emitted from a laser oscillator is split by a diffractive optical element into a plurality of laser beams, thereby irradiating a plurality of portions on the organic compound layer with laser beams by single irradiation.

The invention provides a polymorphic organic resistive random access memory and a preparation method, and belongs to the technical field of a super-large-scale integrated circuit. The organic resistive random access memory comprises a substrate, a bottom electrode on the substrate, a middle organic function layer and a top electrode; and the middle organic function layer is a titanyl phthalocyanine film which contains a metal Cu or Ag nano filament. Two resistance switching mechanisms are introduced: the first one is that the metal Cu or Ag nano filament is fused to form a closed state by adding enough positive pressure to the top electrode, and after negative pressure is added, the metal Cu or Ag nano filament is formed again to be converted into an open state; and the second one is that the resistance switching is realized by the positive operation and the reverse operation of an oxidation reduction reaction of the top electrode and the organic film. The polymorphic organic resistive random access memory realizes the polymorphic resistance switching characteristic and the multi-value memory function, and has very high application value in the aspect of the organic memory with low cost and high performance.

Disclosed herein are ferrocene-containing polymers in which ferrocene is conjugated to the backbone of conductive conjugated polymers. Further disclosed are organic memory devices comprising the ferrocene-containing polymers. Because the organic memory devices possess the advantages of decreased switching time, decreased operating voltage, decreased fabrication costs and increased reliability, they may be used as highly integrated large-capacity memory devices.

An organic memory device may include a stack of an organic material layer and a fullerene layer to provide a data storage element between first and second electrodes. The data storage element may include an organic material layer formed on the first electrode, and a fullerene layer between the organic material layer and the second electrode. Methods of fabricating organic memory devices are also discussed.

A method of manufacturing a patterned ferroelectric polymer memory medium is disclosed, which includes forming an electrode on a substrate; forming a ferroelectric polymer thin film on the electrode; and patterning and orienting the polymer thin film into a plurality of nanostructures by embossing techniques. Also disclosed are two methods which include forming nanofeatures in an interlayer dielectric (ILD) layer deposited on a substrate; forming a ferroelectric polymer thin film on the ILD layer in the nanofeatures; and patterning and orienting the polymer thin film into a plurality of nanostructures by pressing. The patterning process followed by an annealing process promotes specific crystal orientation, which significantly reduces the operation voltage, and increases the signal-to-noise ratio. The invention also covers devices made of a ferroelectric polymer layer oriented by such an embossing method and the use of such devices at a coercive field of 10 MV/m or less.

The present invention discloses a large-area multifunction graphene film preparation method, and belongs to the field of nanometer materials. The technical scheme of the present invention comprises: doping conductive polymers with different performances in graphene oxide, dispersing the conductive polymer-doped graphene oxide in an organic solvent, settling the conductive polymer-doped graphene oxide on the substrate surface through a layer-by-layer settlement manner, and carrying out drying and reduction to prepare the multi-layer and multi-functionalized large-area conductive graphene film. According to the present invention, the preparation method has characteristics of simpleness, green environmental protection, abundant raw materials and high raw material utilization rate, the preparation of the multifunctional large-area transparent conductive graphene film can be achieved, and the prepared conductive graphene film has characteristics of high electrical conductivity, high light transmittance, good flexibility and good stability, and can be widely used in the fields of OLED, solar batteries, super capacitor electrodes, flexible electrodes, organic memory devices and the like.

Conjugation interrupted polymer semiconductor materials and their preparation and application methods belong to the field of organic photoelectric materials technology, and have potential important applications in the fields of light-emitting diodes, solar cells, phosphorescent host materials, organic electrical storage materials, porous materials, and gas sensing. . The conjugation interrupted polymer semiconductor material of the present invention has the following structure: the material has the advantages of high stability and simple synthesis route. This type of conjugation interrupted hyperbranched polymer semiconductor photoelectric material is prepared by Friedel-Crafts polymerization catalyzed by boron trifluoride ether at room temperature; the raw material is cheap, the operation is simple, the preparation is at normal temperature, and the yield is high.

The present invention provides a multi-cell organic memory device that can operate as a non-volatile memory device having a plurality of multi-cell structures constructed within the memory device. A lower electrode can be formed, wherein one or more passive layers are formed on top of the lower electrode. An Inter Layer Dielectric (ILD) is formed above the passive layers and lower electrode, whereby a via or other type relief is created within the ILD and an organic semiconductor material is then utilized to partially fill the via above the passive layer. The portions of the via that are not filled with organic material are filled with dielectric material, thus forming a multi-dimensional memory structure above the passive layer or layers and the lower electrode. One or more top electrodes are then added above the memory structure, whereby distinctive memory cells are created within the organic portions of the memory structure and activated (e.g., read/write) between the top electrodes and bottom electrode, respectively. In this manner, multiple storage cells can be formed within a singular organic structure thereby increasing memory device density and storage.

The invention relates to a dual-layer floating gate flexible organic memory device and a preparation method therefor. The dual-layer floating gate flexible organic memory device mainly comprises a substrate, a dielectric layer, a control gate, a barrier layer, a first floating gate layer, an isolating layer, a second floating gate layer, a tunneling layer, an organic semiconductor layer, a source electrode and a drain electrode, wherein the source electrode and the drain electrode are positioned above the tunneling layer. A dual-layer gold nanocrystalline is taken as the floating gate layers, so that the memory window of the memory device can be improved, and the working voltage range can be expanded; a femtosecond laser reduction technology is adopted, so that a link of intermediate repeated electrode deposition is reduced, the production process is simplified, the pollution doping in the production is lowered, and the product yield can be improved; the barrier layer, the isolating layer and the tunneling layer adopted by the dual-layer floating gate flexible organic memory device all adopt high-dielectric-constant graphene oxide, so that leakage current can be effectively lowered, the stability of the memory can be improved, and the working voltage can be lowered; all the materials adopted by the memory device are flexible and can be bent, so that the memory device can be applied to flexible circuits; and in addition, the femtosecond laser reduction technology and a vacuum thermal evaporation and spin coating technology adopted in the preparation method of the invention are mature in technology and low in product, so that the large-scale production of the dual-layer floating gate flexible organic memory device can be realized.