28results about How to "Increase write speed" patented technology

The invention belongs to the technical field of automobile data storage, and provides a data storage method and system based on field-level association storage, and the method comprises the steps: building a storage structure for data to be stored based on fields in a distributed database, and associating the fields; pre-processing the associated storage data, and performing timing data compression and duplicate removal on the pre-processed storage data; and optimizing a query path for the preprocessed storage data based on index establishment and a caching technology. According to the method, the data structure is remarkably simplified by adopting a field-level associated storage mode. According to the method, a lengthy and complex table structure in a traditional data model is disassembled, fields are used as basic units for storage, and an efficient association index is established according to the logic relation between the fields. The data storage efficiency is greatly improved, the data writing and reading speed is remarkably increased, and a solid foundation is laid for subsequent data processing and analysis.

The invention discloses a method for improving optical storage performance by superposing and rewriting a Type X structure based on femtosecond laser direct writing, and belongs to the technical field of optical storage, and the method comprises the steps: 1, determining a processing parameter window of the Type X structure; 2, determining a seed pulse parameter and a write-in pulse parameter; 3, random data writing and reading are carried out; according to the method, the storage points are superposed and rewritten by utilizing the erasable rewriting characteristic of the Type X, so that the limitation of optical diffraction limit can be bypassed, the storage capacity of the femtosecond laser permanent optical storage technology is improved by at least one order of magnitude, the number of pulses required by each storage point can be reduced, and the data writing speed is improved.

The invention provides a solid state disk garbage collection and host write address repetition detection method, which comprises the following steps that: a host covers data written into a logic address, finds a first physical address which is written in a covered manner, and writes the first physical address into a hardware acceleration module; reading continuous physical address data in batches at the beginning of garbage collection, and writing a currently read second physical address into a hardware acceleration module; the hardware acceleration module compares the first physical address with the second physical address; after data are read through garbage collection, a comparison result of the hardware acceleration module is obtained, if the comparison result is consistent, the current second physical address is skipped, continuous physical address data are continuously read, and if the comparison result is inconsistent, the second physical address data are written into a new physical address; and the steps are repeated until garbage recycling is completed. According to the invention, the speed of garbage collection and data writing is accelerated, so that the purposes of improving the data transmission efficiency and reducing the use power consumption are achieved.

Compared with a common structure of a magnetic tunnel junction, the low-power-consumption nonvolatile memory device, the memory array and the preparation method thereof are characterized in that a non-uniform magnetic moment induction layer is additionally sputtered on an upper interface or a lower interface of a free layer or is consistent with the common structure of the magnetic tunnel junction; the difference is that the thickness of the upper ferromagnetic layer or the lower ferromagnetic layer in the free layer is not uniform, the upper ferromagnetic layer or the lower ferromagnetic layer grows in a wedge shape from thin to thick, and the perpendicular magnetic anisotropy is reduced along with increase of the thickness. The invention provides two low-power-consumption nonvolatile memory device structure design schemes and storage array arrangement design, is suitable for a CMOS standard logic circuit, and can effectively improve the writing speed, reduce the MTJ overturning current density and the writing energy consumption, and improve the MRAM storage density.

The invention discloses a data garbage collection method, electronic equipment and a storage medium, and the data garbage collection method comprises the steps: responding to target data on a source block of the storage equipment, including valid data and invalid data, and carrying out feature processing on the valid data to obtain a feature value of the valid data; judging whether a characteristic value which is the same as the characteristic value of the effective data exists in a characteristic value table or not; wherein feature values of various preset data are stored in the feature value table; and if the feature value which is the same as the feature value of the effective data exists in the feature value table, determining that the target data on the source block is erasable data. By means of the mode, normal reading of the effective data can be guaranteed, the process that the effective data are written into the target block again to be stored is reduced, the situation of write amplification is reduced, and the host write-in speed and the access speed of the storage device are improved.

According to the ZNS-based AI large model storage acceleration algorithm provided by the invention, the storage mode of the ZNS-based neural network learning algorithm and the state machine scheduling algorithm are defined, and the ZNS-based SSD independently stores parameters of each layer, so that the requirement of equipment for large-capacity memory storage is reduced, and the storage speed of the equipment is improved. Meanwhile, the parameter import performance in the neural network algorithm learning process is improved, and the overall power consumption and the whole disk write amplification are reduced. According to the method, an upper computer mode matched with ZNS SSD is defined in combination with the processing process of a neural network learning algorithm, the operation performance of a model is improved in cooperation with an upper computer, and upper-layer ecological software can conveniently mobilize data of each Zone; the ZNS SSD is matched with the upper computer to define the time sequence of the loading parameters of each layer, the capacity requirement for the DRAM in the large model processing process is reduced, meanwhile, the ZNS SSD enters the low-power-consumption mode when the model parameters do not need to be loaded so as to save the power consumption of the whole machine, and the application field and scene of the large model can be conveniently popularized.

The invention discloses a data storage method based on a hard disk, a product, a device and a medium, and relates to the technical field of data storage. When the end-of-life period in the current storage mode is reached, the current storage mode is not continued to be used, but a target storage mode having a smaller number of storage cell layers than the current storage mode is determined. And converting the current storage mode into the target storage mode, mapping the residual life of the hard disk in the current storage mode into the life in the target storage mode to continue data storage, prolonging the use duration and use value of the hard disk as a storage device, and restoring the corresponding storage function. The storage stability and safety are improved, and the risk of data loss is avoided.

The application belongs to the field of integrated circuits, and specifically provides a low-power consumption enhanced reading type 11T CNFET SRAM cell circuit to solve the problems of slow speed, low stability, high power consumption and the like in the prior art; the application comprises N-type carbon nanometer field effect transistors MN1-MN9 and P-type carbon nanometer field effect transistors MP1-2, on the basis of a conventional 6T SRAM cell circuit, a dynamic load structure composed of transistors MN7, MN8 and MN9, and a high-resistance differential readout circuit composed of transistors MN3, MN4, MN5 and MN6; the adoption of P-type transistors realizes a bistable latch structure to reduce holding and writing power consumption, eliminate path competition phenomena caused by data flipping during writing, and improve writing speed; during reading, a resistive load tube is turned on to eliminate charge accumulation and ensure data storage stability; the high-resistance differential readout circuit reduces voltage disturbance of a storage node caused by bit line load; meanwhile, the differential writing / reading circuit can suppress common-mode noise and external interference on the bit line, reduce the probability of error sampling, and enhance overall anti-interference capability.

The present invention discloses a power consumption attack resistant storage unit based on a digital mechanism, the storage unit is composed of a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a first inverter, a second inverter, a third inverter, a first transmission gate and a second transmission gate. The power consumption attack resistant storage unit based on a digital mechanism of the present invention can improve the ability of the unit circuit to resist side channel attacks, can greatly improve the stability of the unit while sacrificing a smaller unit area, and reduces the power consumption of the unit.

The application discloses a kind of mass object fast storage systems based on NAS file system, it is related to big data service and so on field.The mass object fast storage system of the application includes server module, client module and NAS file system;After client module receives the data that user writes, object data is assembled into byte array and is sent to server module;Server module calculates the file name of byte array writing NAS system, file name is universal unique identification code uuid, array is stored in the file of corresponding NAS system, and file name and the index position of array in file are returned to client;Client calculates the final unique identification of each object, and user reads object file from NAS system using final identification.The application can store a large number of object data based on NAS fast, avoid metadata problem, and can provide super-high object writing speed close to network card limit.

The invention provides a display panel and a display device. A pixel circuit of the display panel comprises a driving transistor, a data writing module and a threshold grabbing module. The first end of the data writing module is electrically connected with a data signal line, and the second end of the data writing module is electrically connected with the first end of the driving transistor; the first end of the threshold grabbing module is electrically connected with the second end of the driving transistor, and the second end of the threshold grabbing module is electrically connected with the first grid electrode of the driving transistor; a second grid electrode of the driving transistor is electrically connected with the grid voltage control line, and a film layer where the second grid electrode of the driving transistor is located is located between the active layer and the substrate. Wherein in the data writing stage, the time-varying signal transmitted by the grid voltage control line is a high-level signal; in the light emitting stage, the time-varying signal transmitted by the grid voltage control line is a low-level signal. According to the scheme, the display abnormity phenomenon can be weakened or eliminated from the two aspects of improving the data signal writing efficiency and enhancing the output stability of the light-emitting driving current.

The present application provides a cache data writing method, a cache data reading method and a storage medium thereof. In response to a write request for target data, a target page code address of a write cache logical space is obtained, and then, based on the target page code address, it is determined whether the write request hits the cache. Then, when the write request does not hit the cache, the target data is written to a flash memory; when the write request hits the cache, based on the target page code address, the target data is written to a cache space of a cache node corresponding to a write cache linked list or a read cache linked list, wherein the cache nodes in the write cache linked list or the read cache linked list are mapped to the target page code address, and then, in the case of a cache hit, through the write call design between multiple cache linked lists and the mapping relationship between the cache logical space and the cache linked list, there is no need to directly call the flash memory each time a new write operation is executed, thereby reducing the number of writes to the flash memory and improving the durability of the flash memory.

A method of operating a host that communicates with a memory system including a log area and a data area is provided. The method of operating the host includes determining to update old data stored in the memory system, transmitting a write command to the memory system for writing log data and meta log data for updating the old data to the log area, and in response to a write completion of the meta log data and the log data received from the memory system, transmitting a write command to the memory system for writing new data corresponding to the log data to the data area. Each of the meta log data and the log data includes a descriptor identifier (ID) indicating a same write transaction.

This application discloses a data processing method, apparatus, electronic device, and computer-readable medium, relating to the field of computer technology. A specific embodiment includes: obtaining a data stream and a cluster identifier based on a received data processing request; obtaining node data corresponding to the cluster identifier; generating a first hash value based on the node data; calculating a second hash value for each data item in the data stream; determining the target node corresponding to each data item in the data stream based on the first hash value, the second hash value, and a hash ring; determining the number of data items to be written for each target node; configuring an independent connection pool for each target node based on the number; and writing each data item to the corresponding target node based on the connection pool. This improves write performance and throughput when writing data to the cluster, avoids single-point overload, ensures uniform data distribution in the cluster, increases data write speed, and shortens data write latency.

The invention discloses a storage array, a memory and a writing, reading and erasing method thereof. The storage array comprises a plurality of storage units arranged in an array; the storage unit comprises a selection tube, a first storage tube and a second storage tube, and the selection tube is connected in series between the first storage tube and the second storage tube; wherein the selection tubes of the storage units in the same row are connected to the same word line, and the word lines connected with the selection tubes of the storage units in different rows are different; the adjacent storage tubes of the adjacent row storage units are connected to the same storage tube word line; and the two storage tubes of the same row of storage units are connected with different storage tube word lines. By connecting the adjacent storage tubes of the adjacent rows of storage units to the same storage tube word line, the adjacent storage tubes of the adjacent rows of storage units can share one storage tube word line, so that the number of the storage tube word lines in the storage array can be reduced, the condition of routing congestion between the storage tube word lines can be relieved, and the storage efficiency of the storage array is improved. Therefore, the integration level of the storage array can be improved.

The embodiment of the invention provides a copywriting information generation method and device, a storage medium and a program product. In the embodiment of the invention, document types are distinguished, and in response to a selection operation on at least one text document option and a selection operation on at least one audiovisual document option, a text document generation model and an audiovisual document generation model are respectively utilized to generate an audiovisual document; at least one first textual document and at least one first audiovisual document are generated. And further, in response to a publishing operation, combining the first audio-visual copywriting and the first text copywriting into target copywriting information according to copywriting layout information supported by a target social platform, and publishing the target copywriting information to the target social platform. The writing speed of the copywriting information can be improved, and the use experience of the service demand user and the transaction rate between the service demand user and the second user are improved.

The present invention provides a non-volatile ferroelectric semiconductor memory and a preparation method thereof, wherein the memory comprises a substrate, a control gate and a storage gate sequentially arranged above the substrate; wherein a source and a drain are arranged on the substrate, and a substrate region between the source and the drain forms a channel isolating the source and the drain; a ferroelectric layer is arranged between the channel and the storage gate, and the storage gate is used to apply a voltage to the upper surface of the ferroelectric layer to change the polarization state of the ferroelectric layer; the control gate is used to control the conduction or closing of the channel; and data writing, reading and erasing are realized by controlling the voltages of the storage gate, the source, the control gate and the drain. The above invention can improve storage density, reduce power consumption and enhance reliability.

The invention discloses a magnetoresistive random access memory element which comprises a bottom electrode, a spin-orbit torque layer, a magnetic tunnel junction and a top electrode. The bottom electrode includes a first layer and a second layer connected to each other. The material of the first layer comprises Tax1Ny1, the material of the second layer comprises Tax2Ny2, and the following conditional expression is satisfied: y2 / x2gt, 1, y1 / x1 > = 1, and y2 / x2gt; y1 / x1. The spin-orbit torque layer is arranged on the bottom electrode, the magnetic tunnel junction is arranged on the spin-orbit torque layer, and the top electrode is arranged on the magnetic tunnel junction.

The present application provides a kind of object data processing method, electronic equipment, storage medium and program product.The method comprises: after starting multi-version function for object data, determine the version number and generation of object data, the generation is used to indicate the operation serial number of the object data;After determining the different versions of multiple object data to be written, without imposing write lock on the different versions of multiple object data to be written, based on the version number of the multiple object data, the multiple object data with the same generation are concurrently written to database.

The present invention discloses a data storage method, product, device and medium based on a hard disk, and relates to the technical field of data storage. When the end of life period under the current storage mode is reached, the current storage mode is not continued to be used, but a target storage mode with a smaller number of storage unit layers than the current storage mode is determined. The current storage mode is converted to the target storage mode, and the remaining life of the hard disk in the current storage mode is mapped to the life in the target storage mode to continue data storage, thereby extending the use time and use value of the hard disk as a storage device, restoring the corresponding storage function, improving the stability and security of storage, and avoiding the risk of data loss.

The utility model discloses a step-shaped three-point type posture correcting pen which comprises a refill, a pen container, a container cap, a refill sleeve inserted in the pen container, a linkage piece arranged at the lower end of the refill sleeve and matched with the lower section of the refill in a clamping mode or a clamping mode, and a reset mechanism arranged in the pen container and capable of pushing the refill sleeve and the refill to reset upwards. The lower section of the pen container is provided with three trigger mechanisms capable of driving the core sleeve to slide downwards through the linkage piece, and the three trigger mechanisms are sequentially arranged in the circumferential direction of the pen container at intervals according to the regular pen holding posture positions of the thumb, the index finger and the middle finger and are also sequentially arranged in the axial direction at intervals. The pen container has the advantages that a user can be assisted in holding the pen container according to a step-shaped three-point type posture, the non-standard pen holding posture of the user can be forcibly corrected, pen holding is comfortable, and the writing speed and the writing attractiveness can be improved; and the user can quickly and accurately find the corresponding positions of three fingers and three pressing points, so that the use convenience is improved.

The invention discloses a buffer generation method and device, equipment and a storage medium, and relates to the technical field of solid state disks. Comprising the steps of obtaining a disk array level of a target server and a hard disk type of the target server; generating a first buffer area of the target server based on the disk array level and the hard disk type; the first buffer area is used for temporarily storing verification data of a disk stripe which is being processed by the target server; generating a second buffer area of the target server from a host memory of the target server; the second buffer area is used for temporarily storing the verification data of the disk stripe which is not processed by the target server. The write-in speed and the hardware cost of the disk stripe can be considered, and effective balance between the write-in speed and the hardware cost is achieved.

This disclosure provides a memory system and its operation method, as well as a computer-readable storage medium. The memory system includes a memory, the physical space of which is divided into a user space and a hidden space; a memory controller coupled to the memory, and the memory controller is configured to: set a first storage block in the user space as a write acceleration cache; wherein the first storage block is a first-level storage cell mode; the write acceleration cache is configured to cache data; and set a free storage block in the hidden space as a write acceleration cache; wherein the free storage block is a first-level storage cell mode.

The invention discloses a memory and module equipment. The memory comprises K groups of memory modules, each group of memory modules comprises at least two sub-memory modules which are adjacently arranged, and each sub-memory module comprises a memory array, a first-stage amplifier, a local data line and a selection unit which are connected in sequence; wherein in each group of storage modules, the local data lines of the at least two sub-storage modules are connected in a penetrating manner so as to be shared, and the selection units of the at least two sub-storage modules are arranged in adjacent areas between the sub-storage modules. According to the invention, the requirements of reducing prefetch and ensuring speed of the memory are considered.

The invention discloses an arbitration circuit and method for a write-in request. The arbitration circuit comprises a plurality of request channels, request storage modules corresponding to the request channels, an arbiter and a DMA (Direct Memory Access) module, each request channel comprises a plurality of request modules, and each request module at least corresponds to one data storage module; each request module initiates a data writing request; each request storage module stores data writing requests of all the request modules in the corresponding request channel; the arbiter carries out arbitration to obtain a current target request channel; and the DMA module obtains a data write-in request in a target request storage module corresponding to the target request channel, determines a target data storage module according to the control write-in information carried in the data write-in request, reads the to-be-written data from the target data storage module and writes the to-be-written data into the external equipment. According to the embodiment of the invention, the problem of arbitration of a large number of write requests is avoided, the arbitration result generation speed of the write requests is accelerated, and the data write-in speed is improved.

The invention relates to the technical field of distributed clusters, and discloses a data writing method and device, a distributed cluster system, equipment and a medium. The distributed cluster system comprises a cluster shared storage unit and at least one cluster node; a cache unit is arranged on each cluster node; the method comprises the following steps: when to-be-written data of a target cluster node is obtained, writing the to-be-written data into a cache unit of the target cluster node, and synchronizing the to-be-written data to cache units of other cluster nodes through the cache unit of the target cluster node; and writing the cache data stored in the cache unit of the target cluster node into the cluster shared storage unit. According to the scheme, the writing speed of writing the to-be-written data into the shared storage unit through the cache unit is higher, so that the overall writing performance of the system is improved.

The present invention provides a CDN cache replacement method, the method comprising creating a memory table with a fixed-size space, wherein the memory table is an empty table and the number of the memory table is one; when a current CDN node obtains a first resource from a previous CDN node, the obtained first resource is sliced ​​to obtain a plurality of fragments, a first index corresponding to each of the fragments is calculated, and the fragments are stored in the memory table based on the first index; when the current CDN node returns a second resource in response to a user request, a second index of the second resource to be returned is calculated, and the memory table storing the fragments is searched for the second resource to be returned according to the second index; if the second resource to be returned is found in the memory table storing the fragments, the second resource to be returned is returned and a hotspot update is performed; if the second resource to be returned is not found, the second resource to be returned is not found in the memory table storing the fragments, thereby improving disk IO efficiency.

The embodiments of the present application relate to the field of data processing technology, and specifically to a video data processing method, product, device and storage medium, which are intended to optimize the video data processing process. The method includes: receiving first video data in a compressed format; obtaining an estimated storage space occupancy of a target video frame in the first video data according to the actual storage space occupancy of the cached video frame and the compression time of the video frame; writing the target video frame into the parallel memory when the estimated storage space occupancy does not exceed the remaining capacity of the parallel memory; reading the video frame corresponding to the first video data stored in the parallel memory from the parallel memory when the number of frames of the video frame corresponding to the first video data stored in the parallel memory meets a preset transmission frame number threshold; and writing the video frame corresponding to the first video data into an external memory.