994 results about "Multi state" patented technology

The invention provides surgical or diagnostic tools and associated methods that offer improved user control for operating remotely within regions of the body. These tools include a proximally-located actuator for the operation of a distal end effector, as well as proximally-located actuators for articulational and rotational movements of the end effector. Control mechanisms and methods refine operator control of end effector actuation and of these articulational and rotational movements. A rotation lock provides for enablement and disablement of rotatability of the end effector. The tool may also include other features. A multi-state ratchet for end effector actuation provides enablement-disablement options with tactile feedback. A force limiter mechanism protects the end effector and manipulated objects from the harm of potentially excessive force applied by the operator. An articulation lock allows the fixing and releasing of both neutral and articulated configurations of the tool and of consequent placement of the end effector.

The invention provides surgical or diagnostic tools and associated methods that offer user control for operating remotely within regions of the body. These tools include a proximally-located actuator for the operation of a distal end effector, as well as proximally-located actuators for articulational and rotational movements of the end effector. Control mechanisms and methods refine operator control of end effector actuation and of these articulational and rotational movements. An articulation lock allows the fixing and releasing of both neutral and articulated configurations of the tool and of consequent placement of the end effector. The tool may also include other features. A multi-state ratchet for end effector actuation provides enablement-disablement options with tactile feedback. A force limiter mechanism protects the end effector and manipulated objects from the harm of potentially excessive force applied by the operator. A rotation lock provides for enablement and disablement of rotatability of the end effector.

Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation if there is an error. The tracking cells provide a means to adjust the read parameters to optimum levels in order to reflect the current conditions of the memory system. Additionally, some memory systems that use multi-state memory cells will apply rotation data schemes to minimize wear. The rotation scheme can be encoded in the tracking cells based on the states of multiple tracking cells, which is decoded upon reading.

Non-volatile memory cells store a level of charge corresponding to the data being stored in a dielectric material storage element that is sandwiched between a control gate and the semiconductor substrate surface over channel regions of the memory cells. More than two memory states are provided by one of more than two levels of charge being stored in a common region of the dielectric material. More than one such common region may be included in each cell. In one form, two such regions are provided adjacent source and drain diffusions in a cell that also includes a select transistor positioned between them. In another form, NAND arrays of strings of memory cells store charge in regions of a dielectric layer sandwiched between word lines and the semiconductor substrate.

The present invention presents a “smart verify” technique whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations. This technique can increase multi-state write speed while maintaining reliable operation within sequentially verified, multi-state memory implementations. It does so by providing “intelligent” element to minimize the number of sequential verify operations for each program / verify / lockout step of the write sequence. In an exemplary embodiment of the write sequence for the multi-state memory during a program / verify cycle sequence of the selected storage elements, at the beginning of the process only the lowest state of the multi-state range to which the selected storage elements are being programmed is checked during the verify phase. Once the first storage state is reached by one or more of the selected elements, the next state in the sequence of multi-states is added to the verify process.

A method of video analysis may comprise tracking a state of each target in a video through multiple frames of said video, each state indicating a visibility condition of a target.

The present invention is directed to systems and methods for monitoring performance of a variety of activities, preferably including swimming, in a number of states. The invention may comprise an analytics application, a primary device and, optionally, one or more secondary devices or third-party devices for sensing characteristics of the performance of an activity or the environment in which it is performed. The devices are worn during the performance of the activity and contain sensors, preferably accelerometers, for sensing information pertaining to the performance of one or more activities. The information sensed may be provided to a user in the form of real-time feedback and / or made available for long-term analytics and tracking.

A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read / write registers of the non-volatile memory circuit, and then written from the read / write registers to the first section of the non-volatile memory circuit using a binary write operation. Portions of the data and then subsequently folded from the first section of the non-volatile memory to the second section of the non-volatile memory, where a folding operation includes reading the portions of the data from multiple locations in the first section into the read / write registers and performing a multi-state programming operation of the portions of the data from the read / write registers into a location the second section of the non-volatile memory. The multi-state programming operations include a first phase and a second phase and one or more of the binary write operations are performed between the phases of the multi-state programming operations.

A non-volatile memory device includes the ability to recover data in event of a program failure without having to maintain a copy of the data until the write is completed. As the integrity of the data can thus be maintained with having to save a copy, buffers can be freed up for other data or even eliminated, reducing the amount of controller space that needs to devoted data buffering. In exemplary embodiments, the data is recovered by logically combining the verify data for the (failed) write process maintained in data latches with the results of one or more read operations to reconstitute the data. The exemplary embodiments are for memory cells storing multi-state data, both in the format of independent upper page, lower page form, as well as in 2-bit form. This can be accomplished by a state machine and data latches in the sense amp area on the memory, without use of the controller.

The present invention presents several techniques for using writable tracking cells. Multiple tracking cells are provided for each write block of the memory. These cells are re-programmed each time the user cells of the associated write block are written, preferably at the same time, using the same fixed, global reference levels to set the tracking and user cell programmed thresholds. The threshold voltages of the tracking cells are read every time the user cells are read, and these thresholds are used to determine the stored logic levels of the user cells. In one set of embodiments, populations of one or more tracking cells are associated with different logic levels of a multi-state memory. These tracking cell populations may be provided for only a subset of the logic levels. The read points for translating the threshold voltages are derived for all of the logic levels based upon this subset. In one embodiment, two populations each consisting of multiple tracking cells are associated with two logic levels of the multi-bit cell. In an analog implementation, the user cells are read directly using the analog threshold values of the tracking cell populations without their first being translated to digital values. A set of alternate embodiments provide for using different voltages and / or timing for the writing of tracking cells to provide less uncertainty in the tracking cells' final written thresholds.