The present application relates to the technical field of
integrated circuit design, in particular to a kind of 1553B
bus protocol
chip's interrupt control and
data packing method, comprising the following steps: in 1553B
bus message transmission, interrupt event information, command word, status word, data
word length,
error state and cache index are collected,
package description item is generated and is bound with corresponding data word, data word range and cache reading position are determined according to
package description item, and then write in
package queue, according to interrupt event information,
error state and package
queue state, interrupt arbitration is carried out, after
host processor reads package description item and corresponding data word, interrupt confirmation and cache release are executed.The present application associates interrupt reason, message boundary, cache position and data word packing relationship on
chip side, so that
host processor reads message data according to package, and makes interrupt output, data reading and cache release keep corresponding relationship.