182 results about "Context switch" patented technology

The invention provides an NPU instruction level context switching method and device, and relates to the technical field of data processing.The method comprises the steps that when a context switching instruction is received, a non-refresh instruction is forbidden, it is waited for completion of an instruction being executed, and context data is stored in a main storage module; after completion, recovering the context switching related instruction of the NPU module, and executing the target task; and after the target task is executed, recovering the context data to the NPU module, and recovering the execution of the non-refresh instruction. According to the method, optimization is carried out aiming at the problem that an existing NPU architecture generally can only support limited preemption at an algorithm boundary or a specific context switching point and even cannot preemption, so that a high-priority task must wait for a low-priority task to be completed, and remarkable priority inversion and / or key inversion are / is caused. A full-stack solution from a system on chip to an instruction set architecture and then to an operating system kernel is provided, and preemption of an NPU instruction level is achieved.

The invention discloses a real time operating system (RTOS) multi-task priority scheduling and real-time control method based on advanced RISC machines (ARM), and relates to the technical field of embedded computing and control. Comprising the following steps: S1, time slice management setting: dividing CPU time according to a preset time period to obtain time slices; s2, performing task scheduling: setting each task according to a task control block, and performing context switching and priority arbitration through an OSScheduler () function; and S3, performing exception response: performing forced interruption and exception recovery operation through a set multi-stage exception classification mechanism. Through a three-level decision model and a partition response mechanism, it can be ensured that a high-priority task can be responded in time within strict time constraints, the hard real-time requirement is met, meanwhile, CPU time is divided through a fixed time slice, a counter is updated through timer interruption, and therefore the time deviation of task execution can be reduced, and the task execution efficiency is improved. And the certainty of the system is improved.

A method and related systems for dynamically adjusting on-device configurations for models based on detected context switches is disclosed. The system can use an on-device language model to determine context parameters in a first mode and then uses the context parameters to determine prediction models or prediction model parameters to use for inputs provided in a second mode.

The invention relates to the technical field of message pushing, in particular to an SaaS (Software as a Service) intelligent concurrent pushing system which comprises a tenant flow monitoring module, a resource binding module, a lock-free object writing module, a handle layout construction module and a cache prefetching delivery module. According to the method, the high-frequency business object is identified by monitoring the flow characteristics of the tenants, and the complete Slab page is dynamically applied and bound to the thread exclusive local allocation buffer area, so that physical isolation of bottom layer resources is realized to eliminate global lock competition and context switching overhead in a multi-thread environment; lock-free memory writing is executed based on a privatized pointer, the object construction efficiency is greatly improved, a compact storage structure in which a bitmap is adjacent to a connection handle is constructed, a hardware cache prefetching mechanism is triggered by utilizing bitmap reading, connection data is loaded to a CPU cache line in advance, and the connection data is stored in the cache line. And the cache miss rate is reduced and the concurrent delivery performance of massive messages is remarkably improved by utilizing a memory locality principle.

The invention relates to a user mode interruption processing method and device, equipment and a program product. Through the interrupt information carried by the user mode interrupt request, the operating system can quickly and accurately determine the source and the processing path of the target user mode interrupt in numerous possible interrupt situations. Meanwhile, the context switching time in the interrupt processing process can be effectively shortened by obtaining the current process and the current stack frame thereof, matching the current process and the current stack frame thereof with the target process and determining a mechanism of the target stack frame in combination with the interrupt address information, so that the context switching time in the interrupt processing process can be effectively shortened when the interrupt occurs. The target stack frame can be quickly determined to provide an accurate execution environment recovery basis for subsequent switching between the kernel mode and the user mode and execution of the interrupt service program, and the interrupt processing speed can be increased by switching the kernel mode to the user mode to run the interrupt service program of the user mode. And the overall performance and resource utilization rate of the operating system are improved.

The invention provides a file system client kernel mode and user mode communication method based on asynchronous communication. According to the asynchronous communication-based file system client kernel mode and user mode communication method provided by the embodiment of the invention, the context switching overhead of communication between the user mode and the kernel mode can be reduced, the data transmission throughput is improved, the resource utilization rate is optimized through dynamic queue management, and the problem of performance bottleneck in a high-concurrency scene is effectively solved.

A device includes a parallel processor and a context switch scheduling circuit that is part of or separate from the parallel processor. The parallel processor is configured to execute requests from a plurality of virtual functions. The context switch scheduling circuit is configured to, responsive to a first virtual function of the plurality of virtual functions becoming idle during a first time slice at the parallel processor, perform a context switch for a second virtual function of the plurality of virtual functions before expiration of the first time slice, and assign a second time slice at the parallel processor to the second virtual function.

The invention discloses a data zero-copy processing method and system based on an eBPF zero-trust gateway, and belongs to the technical field of computer network security. According to the method, an XDP program is loaded on a network card driving layer, and an AFXDP technology is combined to construct a kernel mode and user mode shared memory pool UMEM; when an original message arrives, an eBPF unit mounted by an XDP program intercepts the message in real time, a tunnel packaging space is reserved in situ in an original memory, and if the head space is insufficient, a new memory page is logically mapped from a UMEM standby buffer pool to achieve extension. Identity fingerprints are generated by extracting message feature vectors, load in-situ encryption is completed in cooperation with a kernel kTLS module, and data are prevented from being returned to a user mode for processing. According to the method, multiple copying and context switching of a kernel-user mode of a traditional SSL VPN are eliminated, the throughput is improved by 2-3 times, the delay is reduced to the microsecond level, the CPU utilization rate is reduced by 40% or above, application layer DDoS attacks are effectively defended, and the method is suitable for 5G edge computing and cloud native zero-trust gateway scenes.

The invention discloses a multi-core scheduling system and method based on interrupt affinity and a storage medium. The technical problem that data locality guarantee and load balancing are difficult to consider at the same time is solved by constructing a self-adaptive optimization closed loop of perception-decision-execution-feedback, and the method comprises the steps that a routing interruption configuration mechanism provides a basis for dynamic adjustment; an interrupt guide task placement mechanism ensures that an interrupt service program and an associated task are executed in the same CPU core, and the cache hit rate is increased; the execution overhead of an interrupt service program is brought into core load statistics through task context switching and a'task + ISR 'two-dimensional precise load evaluation mechanism triggered by ISR inlet / outlet double nodes, and real load awareness is achieved; a load-driven dynamic interrupt routing mechanism is combined with dual control of a hysteresis threshold and cooling time, so that a ping-pong effect is avoided. According to the method, dynamic load balancing is realized on the premise of keeping data locality, and the real-time response performance and throughput of the multi-core system are remarkably improved.

The invention discloses an instruction conversion context switching optimization method based on stack frame hierarchical compression, which comprises the following steps of: loading and executing an executable file in a dynamic instruction conversion mode, and establishing a storage instruction set and a recovery instruction set containing a context switching complete process for context switching related instructions; constructing a register group according to the association degree of registers in the storage instruction set so as to realize the combined storage of register data by adopting a continuous memory space in the ARM architecture, and carrying out hierarchical compression on push data according to a function call hierarchical structure, recovery of the register data and the stack pressing data is achieved in the recovery instruction set according to the mapping relation table and the incidence relation table recorded in the storage process, the flexibility of processing a complex nested structure and a data type is improved, and correct execution of a program is ensured.

Systems and methods are described to address shortcomings in a conventional conversation system via a novel technique utilizing artificial neural networks to train the conversation system whether or not to continue context. In some aspects, an interactive media guidance application determines a type of conversation continuity in a natural language conversation comprising first and second queries. The interactive media guidance application determines a first token in the first query and a second token in the second query. The interactive media guidance application identifies entity data for the first and second tokens. The interactive media guidance application retrieves, from a knowledge graph, graph connections between the entity data for the first and second tokens. The interactive media guidance application applies this data as inputs to an artificial neural network. The interactive media guidance application determines an output that indicates the type of conversation continuity between the first and second queries.

Systems, methods, and apparatuses for reducing context switches in a virtualized computing environment are provided herein. An example method comprises executing a supervisor, executing a first virtual machine on the supervisor, detecting a first exit from the first virtual machine, responsive to detecting the first exit, loading a userspace context without loading a supervisor context, executing a second virtual machine on the supervisor, detecting a second exit from the second virtual machine, and responsive to detecting the second exit, loading the supervisor context.

The invention provides a dynamic binary translation optimization method and system based on regional granularity. The method comprises the following steps: S1, initializing a program entry; s2, acquiring and analyzing an instruction; s3, performing cache query; s4, hot spot judgment; s5, performing interpretive execution; s6, initiating a compiling request; s7, compiling mode selection; s8, compiling and caching the code blocks; s9, skipping to a local code for execution; and S10, returning to the main cycle. According to the invention, the technical problems of limited optimization space, high context switching overhead and high code expansion rate are solved.

The invention discloses an intelligent storage integrated memory storage architecture. The intelligent storage integrated memory storage architecture comprises a computing type memory semantic solid state disk which is used for providing a unified memory address space based on a computing expression link protocol and supporting a host to perform byte granularity access through a loading / storage instruction; an internal intelligent layering and granularity management mechanism is arranged; a flexible data placement mechanism capable of perceiving semantics is set; the host operating system is connected with the computing type memory semantic solid state disk and is used for receiving the long-delay prompt sent by the computing type memory semantic solid state disk and carrying out context switching; and a uniform abstract interface layer is arranged, and is used for uniformly managing byte granularity memory access to the computing type memory semantic solid state disk and transmission of data placement semantic prompts, and submitting a task unloading request to the embedded computing engine. By means of the mode, the problem of multi-impedance mismatch of traditional hierarchical storage in performance, cost, energy efficiency and intelligent processing can be solved.

The invention relates to an efficient execution optimization method for an embedded operating system based on an MIPS instruction set, and belongs to the field of computer operating systems. The method comprises the following measures: improving the parallelism of instructions: maximizing the parallel execution of the instructions through the intelligent analysis and dynamic scheduling strategy of an operating system; enhancing branch prediction capability: based on process and thread affinity, adding an intelligent scheduling strategy, cache consistency optimization and affinity strategy dynamic adjustment; the context switching efficiency is optimized; and through an improved context switching mechanism, the overhead during task switching of the operating system is reduced. According to the method, the instruction parallelism is enhanced, so that the processor can more efficiently execute a plurality of instructions; the branch prediction accuracy is improved, and the performance loss caused by wrong prediction is reduced; by improving the context switching efficiency, the overhead during task switching is reduced. These measures collectively ensure smoother computing and more efficient management.

The invention discloses a thread scheduling method, electronic equipment, a storage medium and a program product, and relates to the technical field of computers, security check is performed on a source thread and a target thread through a thread switching request initiated by the source thread, an allocatable time period of the source thread allocated to the target thread is calculated according to a security detection result, and the allocatable time period of the source thread allocated to the target thread is sent to the electronic equipment. Bypassing a processing mechanism of a completely fair scheduler, updating the virtual running time of a source thread, distributing an allocable time period to a target thread, calling a context switching function to execute thread switching operation on the source thread and the target thread, and synchronously updating the virtual running time of the target thread when the target thread consumes the allocable time period. According to the thread scheduling method and device, the problem that in the related technology, when a complete fair scheduler processes high-frequency and collaborative thread tasks, due to the indirect handover mechanism and fair scheduling characteristics of the complete fair scheduler, the delay of thread scheduling is improved is solved, and the delay of thread scheduling is reduced.

The embodiment of the invention provides a task scheduling and notification method and device, a storage medium and a program product. In the embodiment of the invention, at least part of asynchronous operation instructions with the incidence relation in the target task are divided into the same group, and during the execution period of the asynchronous operation instructions in the same group, a task scheduler schedules and executes other tasks. Under the condition that all the asynchronous operation instructions in the same group are executed, the task scheduler controls the target task to enter a scheduling waiting state so as to wait to be scheduled again, and then under the condition that the target task is scheduled, task context switching is carried out so that the target task can be switched back to continue to be executed; compared with a scheme that task context switching is triggered once after each asynchronous operation instruction is completed, the task context switching frequency can be reduced by performing task context switching under the condition that the asynchronous operation instructions in the same group are completely executed by taking the group as a unit, and the task execution performance is improved on the whole.

The invention relates to the technical field of lock scheduling prediction, in particular to a lock scheduling condition-based lock strategy adjustment method and a terminal, and the method comprises the steps of obtaining historically collected system operation data which comprises lock scheduling data, system load data and system scheduling overhead data; training a machine learning model according to the historically collected system operation data; predicting the contention degree of the lock in real time according to the trained machine learning model to obtain a prediction result; adjusting a scheduling strategy of the lock according to the prediction result; according to the technical scheme, the contention degree of the lock can be intelligently predicted, then the lock strategy is dynamically adjusted, the balance between high performance and fairness is achieved, the optimization of the lock scheduling strategy is achieved, unnecessary spinning and context switching can be reduced, the CPU use efficiency is improved, and therefore the overall stability and response capacity of the system are improved.

The present application relates to a context switching verification method and apparatus. The apparatus comprises: an excitation generation module generates an excitation signal according to a verification requirement for a module under test, and sends same to a reference model module and the module under test, the excitation signal being used for indicating a command sequence which needs to be processed and comprises at least one command under test; the module under test processes each command under test according to the excitation signal, sends at a preset processing node a target signal to the reference model module, and sends to a response inspection module first data generated during the command processing process; the reference model module processes each command under test according to the excitation signal and the target signal, and sends to the response inspection module second data generated during the processing command process; and the response inspection module verifies, according to the first data and the second data, the capability of the module under test executing a context switching command. The present application can automatically and accurately compare data and behaviors during context switching, thereby achieving context switching capability verification.

Methods, apparatus, and computer programs are disclosed for context switching. In some embodiments, a method comprises dedicating a first subset of a plurality of vector registers to a first thread of a plurality of threads for thread execution; and responsive to a context switch from the first thread to a second thread, bypassing saving a state of the first subset of the plurality of vector registers; and saving a state of a second subset of the plurality of vector registers, wherein the second subset of the plurality of vector registers is not dedicated to the first thread, and wherein the first and second subsets are mutually exclusive.

The embodiment of the invention discloses a method and device for TLS traffic proxy, a gateway, a machine readable storage medium and a computer program product, and relates to the technical field of communication. The method comprises the following steps: acquiring a TLS protocol ciphertext; decrypting the TLS protocol ciphertext through a kernel mode TLS module to obtain a TLS protocol plaintext; determining a protocol type of the TLS protocol plaintext according to the first traffic feature of the TLS protocol plaintext; under the condition that the protocol type of the TLS protocol plaintext is a recording protocol, determining the message type of the TLS protocol plaintext according to the second traffic characteristic of the TLS protocol plaintext; and under the condition that the message type of the TLS protocol plaintext is a proxy message, forwarding the proxy message to a specified port according to a kernel mode port mapping strategy established based on the eBPF. According to the method, proxy message forwarding of the kernel mode can be achieved, context switching between the user mode and the kernel mode and data copying between the user mode and the kernel mode are reduced, and therefore the efficiency of processing proxy traffic services is improved.

The invention discloses a GPU fault detection and processing method and device, equipment and a storage medium, and relates to the technical field of cloud computing, and the method comprises the steps: determining the position information of a video memory abnormal process based on the context switching frequency and verification error count of a GPU; compressing an association result obtained by dynamically associating each application performance index with the processor information of the GPU to obtain compressed data, and performing stream processing, time sequence prediction and twin mapping operation on the compressed data to obtain a detection result; processing the position information by using a target monitoring rule generated based on historical fault data and based on the target knowledge graph and the detection result to obtain a to-be-processed scheme; and generating a snapshot strategy by using an early warning signal generated based on the regional temperature distribution data of the GPU and the depth of the task queue, and processing the to-be-processed scheme based on the snapshot strategy by using the standby computing node to obtain a target scheme. Therefore, the GPU detection efficiency can be improved.

The embodiment of the invention discloses an inline optimization method and device for an SQL (Structured Query Language) callable routine, equipment and a medium, and the method comprises the following steps: compiling the SQL callable routine to obtain an initial execution plan; analyzing the initial execution plan to determine a sub-method list; setting the initial execution plan as a current execution plan, traversing each sub-method in the sub-method list, and executing the following loop operations: executing an inline expansion operation on a target sub-method in the current execution plan to generate a new execution plan; updating the new execution plan to the current execution plan; and determining a current execution plan obtained after the loop operation is completed as an optimized target execution plan so as to complete inline optimization of the SQL callable routine. According to the technical scheme, the context switching cost caused by stack frame switching during calling of the SQL callable routine of the database is saved, so that the execution performance of the SQL callable routine is improved.

The invention discloses an SSL (Secure Socket Layer) VPN (Virtual Private Network) system based on a layered architecture and a message processing method, in the scheme, an architecture in which a control plane and a data plane are completely decoupled is formed, an SSL VPN process is configured to be specially used for processing an encrypted control layer message, and an original data layer message is configured to be directly delivered to an independent high-performance forwarding engine through a bypass mechanism. According to the scheme, multi-core support is provided for a large-flow high-concurrency scene of the data message while the security of the SSL VPN is reserved, and meanwhile, the performance loss of a CPU (Central Processing Unit) in processes of context switching, message copying and the like in a kernel mode and a user mode in a traditional forwarding model is avoided by depending on a shared memory channel of a forwarding engine.

A streaming engine employed in a digital data processor specifies a fixed read only data stream defined by plural nested loops. An address generator produces addresses of data elements. A steam head register stores data elements next to be supplied to functional units for use as operands. Stream metadata is stored in response to a stream store instruction. Stored stream metadata is restored to the stream engine in response to a stream restore instruction. An interrupt changes an open stream to a frozen state discarding stored stream data. A return from interrupt changes a frozen stream to an active state.

The application provides a processing method, device, storage medium and system for serial machine communication, and belongs to the technical field of communication. The monitoring method comprises the following steps: storing element information corresponding to a plurality of ports by using a first queue pool; adding elements corresponding to one or more TCP ports in the plurality of TCP ports into a to-be-processed linked list, adding element information corresponding to one or more TCP ports with a cache mark into a preparation linked list, and receiving output information of the TCP ports in the preparation linked list; when the one or more TCP ports are connected, predicting I / O operations generated in a next process, and marking the process by using an asynchronous keyword. The application configures the to-be-processed linked list, the preparation linked list, the cache mark and the asynchronous keyword based on the coroutine technology, realizes processing of asynchronous communication of the serial machine, and does not have a time slice of context switching of the CPU, so that the CPU resource overhead is reduced.

The invention discloses an input and output request scheduling method and device, a storage medium and a program product, and relates to the technical field of computer application, and the method comprises the steps: employing a high-efficiency annular request queue to manage each input and output request, guaranteeing the rapid enqueue and dequeue operation of each input and output request, and improving the operation efficiency. And request scheduling is performed according to the system resource state, the resource demand information corresponding to each input / output request and the priority, so that the system resources can be dynamically allocated. Therefore, the system can process a plurality of input and output requests at the same time, the concurrent processing capability of the system is fully utilized, the plurality of input and output requests can be reasonably scheduled, competition and conflicts of system resources are avoided, the overall throughput of the system is improved, and the problems of high system calling overhead, frequent context switching, high efficiency and the like are solved. The technical problems of low input and output request scheduling efficiency in the prior art are solved, and the technical effects of reducing the system calling overhead, avoiding frequent context switching and improving the input and output request scheduling efficiency are achieved.

Embodiments of the present disclosure provide a data read / write method, system, and apparatus, a computing device, and a storage medium. The data read / write method comprises: receiving, by means of an asynchronous I / O layer, a data read / write request sent from a user space, and storing the data read / write request in a request queue; when the asynchronous I / O layer determines that the data read / write request is of a pass-through type, sending the data read / write request to a driver layer; and parsing the data read / write request by means of the driver layer, and sending request information of the data read / write request to a target processing end device for read / write processing. The data read / write request sent from the user space is received by means of the asynchronous I / O layer, and is sent to the driver layer after the data read / write request is determined to be of the pass-through type, thereby reducing context switching and data copying overhead, and improving the processing efficiency of I / O operations. The request is parsed at the driver layer and sent to the processing end device for read / write processing, thereby optimizing the scheduling of I / O tasks, reducing disk addressing time and I / O latency, and improving overall performance and system stability.

In an example, an apparatus comprises a plurality of execution units, and a first memory communicatively couple to the plurality of execution units, wherein the first shared memory is shared by the plurality of execution units and a copy engine to copy context state data from at least a first of the plurality of execution units to the first shared memory. Other embodiments are also disclosed and claimed.

The invention discloses a cross-platform VR resource performance evaluation and compatible operation method and system, and the method comprises the steps: building a VR resource performance evaluation model based on the performance evaluation of a CPU and a GPU, and the model comprises a CPU score, a GPU score, a weight coefficient and a performance stability correction factor of a current device; the CPU score is obtained through calculation of inter-process communication and a context switching number in a current equipment system environment, the GPU score is obtained through calculation of an actual computing power value and rendering delay which are obtained through multiple iterations of a standard GLSL matrix multiplication in the current equipment system environment, and the performance stability correction factor is determined according to frame time when VR resources are operated by current equipment; when the VR resources need to be operated, the evaluation score of the VR resources operated by the current equipment is calculated through the performance evaluation model, and the corresponding configuration parameters are allocated to operate the VR resources. According to the invention, the fluency and stability of the VR picture during operation can be ensured, and the user experience is improved.