108results about "Program saving/restoring" patented technology

This disclosure describes a large language model (LLM)-based agent operating system comprising an application layer, a kernel layer, and a hardware layer. The kernel layer comprises an AIOS kernel comprising: LLM core(s), an agent scheduler, a context manager, a memory manager, a storage manager, and a system call interface configured to manage interactions among the agent scheduler, the context manager, the memory manager, and the storage manager.

Techniques are disclosed for capturing information surrounding a user's interactions with an application for enriching application context to be used by a digital assistant for supporting the user's interactions. In one aspect, a method includes detecting an event from a client device, where the event is associated with a user's interaction with an application on the client device. In response to detecting the event, application context is obtained for the application. The obtaining includes accessing the application context from a data store based on an identifier. A first generative artificial intelligence model can then be used to generate a list having an executable action based on the event and the application context. An execution plan is then created and executed, which includes executing the executable action using an asset to obtain an output. The output or a communication derived from the output is sent to the client device.

The present disclosure relates to a method for configuring a relay register module, including: receiving a start allocation request for at least one task sent by a task scheduler; determining, based on the start allocation request, a number of relay registers to be allocated to each task of the at least one task; allocating the corresponding number of relay registers to each task; and sending a wake-up signal to the task scheduler in a case where the allocation is completed, the wake-up signal is used by the task scheduler to start a task to which relay registers are allocated; wherein the relay register module is configured to store an intermediate result obtained from an operation based on an instruction of the task. The present disclosure further relates to an apparatus for configuring a relay register module.

Techniques are provided for orchestrating operations between a storage environment and a computing environment hosting virtual machines. A virtual machine proxy, associated with a computing environment hosting a virtual machine, is accessed by an orchestrator to identify the virtual machine and properties of the virtual machine. A storage proxy, associated with a storage environment comprising a volume within which snapshots of the virtual machine are to be stored, is accessed by the orchestrator to initialize a backup procedure. The orchestrator utilizes the virtual machine proxy to create a snapshot of the virtual machine. The orchestrator utilizes the storage proxy to back up the snapshot to the volume using the backup procedure.

Approaches presented herein provide for the management of resources to be used to process a request, such as may involve orchestration of nodes for an inference request. Upon receiving an inference request, an orchestrator can determine a sequence of context nodes and inference nodes to be used to process the inference request, based in part upon a determined class of inferencing to be performed. The orchestrator can append metadata to the inference request that identifies the sequence, and can transmit the appended request to one or more first nodes in the sequence. If the nodes have a network programmable device, or similar capability, the request can be forwarded to the nodes in sequence without having to go back to the orchestrator between nodes.

An apparatus includes an instruction decoder and a processing circuitry system. In response to a data structure processing instruction specifying at least one input data structure identifier and an output data structure identifier, the instruction decoder controls the processing circuitry system to perform processing operations on at least one input data structure to produce an output data structure. Each input / output data structure includes a data arrangement corresponding to multiple memory addresses. The apparatus includes two or more sets of one or more data structure metadata buffers, each set associated with a corresponding data structure identifier and designated to store metadata indicating the memory address of the data structure identified by the corresponding data structure identifier.

An application processing method is performed by an electronic device. The electronic device includes a first processor and a second processor, the first processor running a first operating system, the second processor running a second operating system. The method includes: entering an application management interface in the first operating system, the application management interface displaying an application processing entry of a first application installed in the second operating system; and in response to a triggering operation performed on the application processing entry of the first application, entering a management item interface of the first application. An application management item of the first application is displayed in the management item interface of the first application.

The invention belongs to the technical field of memory scheduling. The invention discloses a memory scheduling and application acceleration method for an end-side heavy load scene. According to the embodiment of the invention, in a cold start process oriented to GB-level large-scale applications, in a multi-task scene of a mobile terminal, a vehicle-mounted terminal and the like, by uniformly scheduling a selective file preloading module, a self-adaptive memory recovery module and a context-aware process termination module, on the premise that application program codes are not modified, the application program codes can be quickly and efficiently started, and the application program codes can be quickly and efficiently started. The method comprises the following steps: modeling a file access mode and page type characteristics related to cold start, dynamically adjusting a preload object, a recovery strategy and a process termination sequence based on a preload memory budget and real-time memory pressure, preferentially retaining a key preload page, and selecting a background application with a relatively high net releasable memory and a relatively low short-term restart probability to terminate; and collaborative optimization of the cold start time delay and the background survivability under the constraint of the limited memory and the I / O bandwidth is realized.

This application provides a state management method and apparatus, and an intelligent driving device. The method includes: receiving a state switching request sent by a first service node, where the state switching request includes a target state of the first service node; determining information about an extended task based on the state switching request, where the extended task is associated with at least one other service node, and there is a dependency relationship between the at least one other service node and the target state; and controlling an action of the first service node based on the information about the extended task, where the action includes switching to the target state or maintaining a current state. The method in this application may be applied to the intelligent driving device, for example, an intelligent vehicle or an electric vehicle. When state information of all services cannot be directly obtained, state management for a service in a system may still be implemented. This helps implement decoupling between a state management framework platform and a service layer, and helps independent evolution and mutual compatibility of an intelligent driving computing platform and an intelligent driving service.

An apparatus comprises exception return state register storage, and processing circuitry. In response to a guarded control stack (GCS) exception return state push instruction, the processing circuitry obtains exception return state information from the exception return state register storage and push the state information to a GCS data structure. In response to a GCS exception return state pop instruction, the processing circuitry obtains GCS-protected exception return state information from the GCS data structure. In at least one operating state, the processing circuitry detects, in response to an attempt to modify the exception return state information stored in the exception return state register storage, whether an exception return state lock parameter is in a locked state or an unlocked state, and signals a fault when it is in the locked state.

The invention relates to the technical field of artificial intelligence application, and provides a multi-agent cooperation-based invoice intelligent auditing system, which comprises an invoice access analysis module, a multi-agent auditing module, a rule management module, a result aggregation early warning module and a visual filing module, and the multi-agent auditing module is used for performing auditing, duplicate checking, compliance and accounting operations on the structured invoice data through a plurality of parallel agents to generate auditing sub-results of each agent. The system simultaneously performs auditing, duplicate checking, compliance and accounting operations on the invoice data by setting the plurality of parallel agents; and a plurality of key auditing links which must be executed in series originally are parallelized, so that the enterprise financial processing efficiency is improved.

The invention discloses a fluid pulsation accelerator architecture for reinforcement learning of a large language model, and belongs to the technical field of artificial intelligence hardware acceleration. The system aims at solving the problems that when a current universal processor executes an RLHF working load, an instruction driving normal form is not matched with data flow calculation, fixed parallel granularity cannot adapt to a dynamic load, and the efficiency is low due to the fact that a framework does not sense data statistical characteristics. The core of the system is a liquid systolic array calculation fabric capable of being dynamically reconstructed, execution is triggered through data flow, and kernel boundaries and instruction overhead are eliminated. According to the system, a global lookup table subsystem is fused, and nonlinear calculation is optimized through merging query and parallel lookup by using data distribution prior; and a dynamic scheduling unit is configured, and elastic parallelism is realized by adopting a resource allocation algorithm supporting work stealing. According to the method, the throughput and the energy efficiency of RLHF training and a large language model reasoning stage can be remarkably improved, and a new design normal form is provided for a next-generation AI special computing architecture.

A method, computer program product, and computing system for dividing a speech signal into a plurality of chunks. A first context window is defined with a first period of past context for processing the plurality of chunks with a neural network of a speech processing system. The neural network is trained using the first context window. A second context window is defined with a first period of past context for processing the plurality of chunks with the neural network. The neural network is trained using the second context window.

A multiprocessor system and method for swapping applications executing on the multiprocessor system are disclosed. The plurality of applications may include a first application and a plurality of other applications. The first application may be dynamically swapped with a second application. The swapping may be performed without stopping the plurality of other applications. The plurality of other applications may continue to execute during the swapping to perform a real-time operation and process real-time data. After the swapping, the plurality of other applications may continue to execute with the second application, and at least a subset of the plurality of other applications may communicate with the second application to perform the real time operation and process the real time data.

A computer implemented method of accessing a shared data set using a shared and an exclusive lock is provided. The method includes: initiating at least one reader thread configured to perform a read operation; recording a reader thread state for the at least one reader thread in a data structure; selectively acquiring the shared lock for the at least one reader thread; implementing processing of the at least one reader thread; selectively interrupting the processing of the at least one reader thread in response to an exclusive lock request; restoring the at least one reader thread state using the reader thread state recorded in the data structure and releasing the shared lock; acquiring an exclusive lock; resuming the processing of the at least one reader thread; reacquiring the shared lock for the at least one reader thread in response to determining a releasing of the exclusive lock.

The invention relates to a method for interrupting a user process in a high-performance computer that includes at least one compute node including at least a processor to execute the user process, at least one IOMMU and at least one PCIe device, The method includes allocating a memory region to store a union of structures, the union of structures including a Posted-Interrupt Descriptor (PID) structure and a User Posted-Interrupt Descriptor (UPID) structure, The IOMMU uses the PID structure and the processor uses the UPID structure. The method also includes configuring the IOMMU with a remapping interrupt table (IRT) including associating an entry of the IRT with an address of the memory region of the union of structures. The method also includes, by the processor, the user process using the registered interrupt handler of the UPID structure.

A method and apparatus for managing threads are provided. The method includes creating a first thread, the first thread being a kernel mode thread, the first thread having a first thread context; creating a second thread using the first thread, wherein the second thread is a user mode thread, and the second thread inherits the first thread context; controlling the first thread to enter an idle loop state after the second thread is enqueued to a run queue; and selecting and executing the second thread from the run queue using a scheduling thread.

A computer-readable recording medium stores a program for causing a computer to execute a process including: identifying an available capacity of a memory of any GPU sharable by two or more programs including a target program having a process that is repeatedly executed using a machine learning model, the available capacity being identified when any GPU is assigned to the process of the target program; determining whether the memory is insufficient based on a comparison of the identified available capacity and a memory usage measured during a previous execution of the process of the target program; executing the process of the target program by any GPU when the memory is sufficient; and holding execution of the process of the target program by the any GPU, when the memory is insufficient, the execution of the process being held until, in the memory, a storage area assigned to another program is released.

Processing circuitry 16 performs a stack pointer switch validity checking operation associated with a switch of the stack pointer from an outgoing stack pointer value to an incoming stack pointer value. The validity checking operation comprises verifying whether an incoming data value obtained by memory access circuitry 26 in response to a memory access request specifying an address determined based on the incoming stack pointer value meets at least one stack cap value validity condition, including a condition that a predetermined portion of the incoming data value corresponds to a given page address indicative of a page of address space comprising the address determined based on the incoming stack pointer value. The at least one stack cap value validity condition is determined independent of whether a further portion of the incoming data value other than the predetermined portion corresponds to sub-page address bits of the address determined based on the incoming stack pointer value. An error handling response is triggered in response to determining that the incoming data value fails to meet the at least one stack cap value validity condition.

To improve GPU utilization. [Solution] When the GPU 103 is assigned to process the target program 110, the information processing device 101 identifies the available memory on the GPU 103. Based on a comparison of the identified available memory 104 with the memory usage measured during a previous execution of the target program 110, the information processing device 101 determines whether there is insufficient free memory in the memory 104. If there is sufficient free memory in the memory 104, the information processing device 101 executes process 1 of the target program 110 using the GPU 103b. If there is insufficient free memory in the memory 104, the information processing device 101 waits for the GPU 103b to execute process 1 of the target program 110 until a storage area within the memory 104 allocated to another program is released.

Various examples relate to a semiconductor apparatus, or to a non-transitory computer-readable medium, a method, an apparatus or a device for a computer system, and to a computer system comprising the semiconductor apparatus and the apparatus or device. A semiconductor apparatus comprises interface circuitry for obtaining a dataflow graph comprising a plurality of nodes, and a plurality of processing elements, an interconnect network coupled to the plurality of processing elements and configured to receive an input of the dataflow graph, wherein the dataflow graph is to configure the interconnect network and the plurality of processing elements, wherein the processing elements are to perform a plurality of operations defined by the nodes of dataflow graph, wherein the dataflow graph comprises a first type of node for performing a computation and a second type of node for determining a branching condition, wherein the semiconductor apparatus is configured to, upon determining a result of a branching condition specified by a node having the second type, configure the interconnect network and the processing elements based on the result of the branching condition.

A method of accessing the state of a currently operating application comprises a second application accessing and saving copies of plural memory values relating to the state of the currently operating application as an anchor memory value set, the second application accessing and saving copies of changes to said memory values as a delta memory value set, more often than saving an anchor memory value set, and forming a snapshot of the currently operating application at a selected moment by combining a preceding anchor memory value set and subsequent delta memory value sets up to said selected moment.

Various examples disclose systems and methods related to hardware virtualization for error management. These systems and methods define a task flow for executing tasks on a first partition and a second partition. A processor can contain one or more circuits.The one or more circuits can determine that a first task of a multitude of tasks meets a criterion for execution in a redundant mode, determine a task flow for the execution of the multitude of tasks by assigning a switch before the execution of the first task, wherein the switch causes the one or more circuits to be partitioned into a first partition and a second partition, and the multitude of tasks is executed according to the task flow by executing a first instance of the first task on the first partition and a second instance of the first task on the second partition.

The invention relates to a security dynamic hot patching device and method based on a privilege calling mechanism, and the method comprises the steps: carrying out the unified management of all patches which can be hot replaced during operation through a patch management module, and achieving the corresponding, version control and life cycle management of the patches and privilege calling numbers; in the patch activation process, a system only modifies a call path comprising a symbol table or a function pointer to realize a redirection strategy, so that an original function call stream is guided to a privilege call skip bridge, and a privilege call mechanism is triggered to execute a patch function; the patch updating realizes version upgrading and multi-patch management by replacing the privilege call number and the mapping table item of the patch; during rollback, only the binding relation between the call number and the function entry needs to be modified, and the task execution flow is recovered to the original function or the historical version patch; online management and real-time controllable rollback of the patch are realized; the problem that a dynamic hotfix technology is difficult to meet the requirements for safety, low invasiveness and controllability at the same time is solved, safe takeover and dynamic replacement of function calling are achieved, and flexibility and safety are achieved.

Embodiments of this application disclose a thread priority adjustment method and a related device, applied to an electronic device. The electronic device runs a first application, where a first process of the first application includes a plurality of first threads; identifies an associated thread of the first thread from threads of a second process, where the second process is a process, other than the first process and a resident process, that is run by the electronic device and that provides a service for the first application; and detects that a running status of the first application changes, and adjusts a priority of the first thread and a priority of the associated thread, where a priority adjustment trend of the associated thread is consistent with a priority adjustment trend of the first thread. According to embodiments of this application, a response speed and performance of a system can be improved, thereby improving user experience.

Systems and methods for crowdsourcing cloud application execution are described. An application system receives, from a client device, a first request to initiate an application session. The application system identifies a host device to fulfill the first request. The application system then initiates execution of the application session on the host device and generates, for the client device, a plurality of controls to control the application session executing on the host device. The host device is incentivized for each application session hosted.

A method for operating a data processing system for processing data. The data processing system is set up for the repeated execution of a plurality of data processing tasks. The following steps are carried out for the operation of the data processing system: a) executing the individual data processing tasks at their respective repetition rate in the time grid; b) outputting of output data by the individual data processing tasks into the buffer memory assigned to the clock pulse of the grid; c) reading in of input data by the individual data processing tasks from the buffer memories which are assigned to the preceding clock pulses of the grid.

A system for executing a plurality of software threads, comprising: a plurality of processing circuitries; a plurality of memory areas connected to the processing circuitries, each memory area associated with at least one of the processing circuitries; and at least one hardware processor, connected to the processing circuitries and configured for: in each of a plurality of iterations: while the processing circuitries execute the software threads, collecting for each thread a plurality of thread statistical values indicative of a plurality of memory accesses to at least some of the memory areas performed when executing the thread; for at least one thread, performing an analysis comprising the thread statistical values thereof to identify a preferred memory area of the plurality of memory areas; and configuring one of the at least one processing circuitry associated with the preferred memory area to execute the at least one thread.

A multi-core cluster computing method for securely saving and restoring context data includes storing, by a last core in a primary cluster, last core context data in a first memory. The method also includes storing, by a secondary core in a secondary cluster, secondary core context data in a second memory. The method further includes entering, by the secondary core, a deep sleep power state. The method still further includes entering, by the last core, a system suspend state. The method also includes entering a boot state, by the last core, by restoring the last core context data.