20 results about "Virtual hardware" patented technology

The application provides a resource scheduling method and an electronic device, which can be applied to the technical field of computers. The resource scheduling method comprises the following steps: in response to a resource request for a target task, obtaining resource utilization scores of nodes and hardware accelerators in a cluster according to resource usage amounts of the hardware accelerators, resource allocation amounts of the nodes, and a resource demand amount carried by the resource request; determining a target node in the nodes and a target hardware accelerator of the target node according to the resource utilization scores and a scheduling strategy carried by the resource request, the scheduling strategy indicating a scheduling rule matched with resource integration requirements and / or load balancing requirements of the target task; virtually dividing the target hardware accelerator according to the resource demand amount to obtain a virtual hardware accelerator; and binding the virtual hardware accelerator to a container of the target node to execute the target task by using the container.

The application provides a method for optimizing virtual NVMe read-write performance through an LRU algorithm and a virtual NVMe system, and the method comprises the following steps: constructing a cache management architecture in cooperation with a hash table and a double-linked list, quickly positioning a cache node corresponding to an internal address of an SSD through the hash table, and managing the access order of the SSD address through the double-linked list; when the NVMe performs an SSD read-write operation, the LRU algorithm is first called, and if there is no address in the hash table to execute the read-write file; a linked list order adjustment thread is created when the LRU algorithm is initialized, the node data of the longest non-accessed node exceeding the length of the linked list is flushed to the SSD mirror file, and then the node is deleted; when the read-write data is greater than the size of the linked list node data, the hash mapping is refreshed. The application combines the LRU algorithm, maps the commonly used internal address of the SSD and the corresponding data block, directly operates the memory to read and write the commonly used data, optimizes the read-write mode of the existing virtual simulation NVMe, and further improves the performance of the virtual simulation NVMe in the virtual hardware system.

The application provides a code testing method, a code testing device and a computer storage medium. The code testing method comprises the following steps: performing code mutation testing on a to-be-tested code to generate a target test case; mapping an initial compilation command maintained by a target test framework based on a compiler command mapping rule to obtain a target compilation instruction; calling a corresponding compiler based on the target compilation instruction to compile the to-be-tested code and the target test case to obtain a target execution file; and executing the target execution file in a virtual hardware model integrated in the target test framework and generating a test report corresponding to the to-be-tested code based on an execution result. The code testing efficiency is improved by the code testing method.

The invention discloses an energy storage battery management system simulation debugging method and system based on a QEMU, and belongs to the technical field of embedded system simulation and debugging. The method comprises the following steps: performing simulation debugging configuration based on a QEMU, and creating an independent QEMU virtual machine instance for each BMS node; establishing a virtual hardware link, and constructing a virtual communication network consistent with the topology of a real energy storage battery management system; creating a simulation agent program, and injecting simulation data and faults into the virtual communication network; starting QEMU virtual machine instances of all BMS nodes in parallel, and performing debugging operation through a simulation agent program; and monitoring and analyzing the simulation debugging process. According to the method, the multi-stage BMS of any topology can be flexibly simulated, the BMS of each stage is supported to operate different operating systems, various normal and extreme test working conditions can be safely, conveniently and repeatedly simulated, and the test coverage rate and reliability are greatly improved.

The invention relates to the technical field of automobile remote diagnosis, discloses an automobile remote diagnosis management and control method and device based on Pass-Thru equipment, and realizes accurate response to remote diagnosis requirements of a target vehicle through cooperative work of virtual hardware and a virtual terminal. Specifically, OE request data can be accurately read and processed through virtual hardware arranged on the OE equipment so as to be adaptively transmitted, and the reliability of data transmission is improved; and then, the virtual terminal receiving the transmission data can execute comprehensive and flexible diagnosis operation based on the processed first data processing result, and timely feeds back a diagnosis result through an efficient data interaction process, so that the accuracy, comprehensiveness, practicability and efficiency of remote diagnosis are improved.

This invention discloses an automated performance simulation system for integrated circuit chips based on virtualization technology, belonging to the field of integrated circuit chip design simulation technology. The system includes: a virtualization modeling module, used to construct a configurable virtual hardware environment functionally equivalent to a physical chip based on virtualization technology, complete the full-parameter modeling of the chip to be simulated, and output a chip design parameter dataset; a machine learning inference module, with a built-in dual-path decoupled neural network model with physical prior constraints, used to receive the chip design parameter dataset and output predicted values ​​of performance indicators and a ranking of the causal contribution of performance bottleneck parameters; and a model training module, bidirectionally connected to the machine learning inference module, used to complete the pre-training, incremental adaptation, and closed-loop iterative optimization of the dual-path decoupled neural network model. This invention reduces the cost of adapting to new chips, shortens the R&D process, and achieves automated, high-precision, and efficient simulation of integrated circuit chips.

The present disclosure provides a virtual development environment generation system and a virtual development environment generation method capable of improving the efficiency of development using a virtual development environment. A virtual development environment generation system (1) for generating a virtual development environment obtained by virtualizing a development environment composed of physical hardware and physical devices connected to the physical hardware includes: a data reception unit (11) that acquires development environment specification information, which is information indicating the specification of a development environment; a virtual development environment decision unit (13) that decides a combination of virtual hardware and device models that constitute a virtual development environment based on the development environment specification information, the virtual hardware being virtual hardware obtained by virtualizing physical hardware, and the device models being device models obtained by virtualizing physical devices; and a data transmission unit (20) that outputs a virtual development environment composed of the decided combination.

The embodiment of the invention discloses an image acquisition method, device and equipment in a virtual environment, and the method comprises the steps: receiving a screenshot request sent by a user mode application program of a virtual machine through a screen capture driver bound on virtual PCI equipment of the virtual machine, the virtual PCI device is a virtual hardware device which is virtualized based on the bus architecture of the virtual machine and meets the PCI standard; capturing, by the screen capture driver, desktop image data of a virtual display of the virtual machine in response to the capture request; writing the desktop image data into a target memory address by the screen capture driver; after the user mode application program confirms that the desktop image data is written, the desktop image data is read from the target memory address, by means of the method, the desktop image data can be captured under the condition that the virtual machine does not depend on physical equipment, and the user mode application program can be used for achieving the purpose of capturing the desktop image data under the condition that the virtual machine does not depend on the physical equipment. Therefore, the compatibility of the method when the image is captured in the virtual environment is improved.

A system (600) and method (500) for virtualizing hardware acceleration resources with a guaranteed quality of service is described. In one aspect, the system (600) implementing the method (500) creates virtual hardware accelerators (308A, 308B, 308C) on a hardware accelerator unit (104) coupled to a host server or a host processing unit (102). Address registers and device configuration address registers are assigned to each virtual hardware accelerator (308A, 308B, 308C). Requests for executing applications are received from the virtual hardware accelerators (308 A, 308B, 308C) and translated into hardware accelerator resource requirements. The hardware accelerator resources are partitioned and allocated to the virtual hardware accelerators (308A, 308B, 308C). The hardware accelerator resources (314, 316, 318) are monitored for the usage of each virtual hardware accelerator (308A, 308B, 308C). The monitored resource usage is compared with the allocated resources for each virtual hardware accelerator (308A, 308B, 308C). Quality of service parameters are enforced for each virtual hardware accelerator (308 A, 308B, 308C) by dynamically monitoring and modifying resource allocation based on the comparison and maintaining address space isolation between the virtual hardware accelerators.

The invention provides an agile development method and device for an embedded target system. The method comprises the following steps: identifying a standard hardware module and a non-standard hardware module according to a real embedded hardware system; for a standard hardware module, whether reusable resources exist or not is inquired in a standard virtual module hardware library, and if yes, the standard virtual hardware module is directly extracted; for the non-standard hardware module, whether reusable resources exist or not is inquired in a non-standard virtual module hardware library, if yes, the non-standard virtual hardware module and the universal drive code are directly extracted, and universal drive code replacement and recompilation are completed in the source code, and an executable target code is generated; and then forming a virtual target system by the extracted reusable standard hardware module and the non-standard hardware module, and loading and executing a source code drive to replace a target code of a universal drive code. According to the invention, the reuse rate of the non-standard hardware module is improved, the development period is greatly shortened, and the development and maintenance process is simplified.

The invention provides a processor verification platform and method, electronic equipment and a storage medium. The processor verification platform is used for being deployed on an electronic device, and the processor verification platform comprises a virtual hardware environment module which comprises a model library, and the model library comprises a plurality of software models; the test control system module is used for receiving an environment configuration instruction and a configuration file; the test control system module controls the virtual hardware environment module to call a target software model corresponding to the preset hardware from the model library according to the environment configuration instruction and operate the target software model to form a verification environment; and the execution engine is used for performing data interaction with the target software model according to the test instruction in the verification environment so as to simulate data interaction between firmware of the to-be-verified processor and hardware managed by the to-be-verified processor. According to the processor verification platform, the verification efficiency and effect of the processor firmware before tape-out can be improved, and the verification cost can be reduced.

A virtual function (VF) driver is provided, which receives an indication of base address registers (BARs) exposed by an I / O device providing virtualized hardware resources for use by the VF driver. The VF driver performs an internal probe and analysis to determine a target adaptation of at least one of the BARs exposed by the I / O device. A physical function (PF) driver receives a request message from the VF driver to adapt at least one of the BARs exposed by the I / O device. The BARs exposed by the I / O device are adapted by the PF driver according to the request message. A confirmation message is provided to the VF driver indicating the adaptation to the BARs exposed by the I / O device. The VF driver accesses regions of memory allocated to the adapted BARs exposed by the I / O device.

Virtual development environment generation system 1 generates a virtual development environment by virtualizing a development environment including physical hardware and a physical device connected to the physical hardware. Virtual development environment generation system includes: data receiver that obtains development environment specification information that is information indicating a specification of the development environment; virtual development environment determiner that determines, based on the development environment specification information, a combination of: virtual hardware generated by virtualizing the physical hardware; and a device model generated by virtualizing the physical device, the combination being included in the virtual development environment; and data transmitter that outputs the virtual development environment including the combination determined.

This application provides an automated testing method, apparatus, device, system, and storage medium. The automated testing device is equipped with virtual hardware, which is used to simulate real hardware to perform automated testing in place of the real hardware. The method includes: acquiring the test conditions of the real hardware; simulating the real hardware under the test conditions using the virtual hardware; and when the virtual hardware receives a test command sent by an external device, performing at least one of the following processes: sending feedback information corresponding to the test command to the external device; generating a visual result corresponding to the test command and displaying it on a display device. By using software to simulate various operating parameters of the real hardware, the various behaviors of the virtual hardware are completely consistent with those of the real hardware, thereby replacing the real hardware for automated testing and saving testing costs.

The application relates to a virtual machine starting method and device, computer equipment, a storage medium and a computer program product. The method comprises the following steps: in response to a starting instruction of a server, obtaining virtual hardware version information of each virtual machine installed under the server; in each virtual machine, determining a target virtual machine whose virtual hardware version information does not meet preset version conditions; modifying the virtual hardware version information contained in the configuration file of the target virtual machine into first target virtual hardware version information; the first target virtual hardware version information is virtual hardware version information matched with version information of a virtualization platform program suite running on the server; and performing starting processing on the modified virtual machines. The method can solve the problem that the virtual machine cannot be started due to poor compatibility between the virtualization platform program suite and the server, and the server is restarted or downed, and improves the stability and security of the overall environment of the virtualization platform.

Provided is a simulation device that simulates processing performed by a controller for controlling an industrial machine, the simulation device comprising: a non-real-time OS that does not guarantee real-time performance; and a virtual controller that virtually reproduces the operation of the controller. The virtual controller has: virtual hardware implemented on the non-real-time OS; a real-time OS implemented on the virtual hardware; and a virtual controller control function that is implemented on the real-time OS and simulates the processing performed by the controller for controlling the industrial machine.

The embodiment of the invention provides a joint simulation cloud platform system architecture and a joint simulation method. The architecture comprises a simulation software environment, a hardware simulation platform and a joint simulation platform which are located at a cloud end. The simulation software environment comprises a plurality of pieces of simulation software accessed through a plurality of positions of the Internet; the hardware simulation platform is used for obtaining a plurality of pieces of virtual hardware through hardware simulation; the joint simulation platform is used for simulation design, the simulation is operated by utilizing the integrated simulation software, a virtual experiment is carried out on the simulation by utilizing the integrated virtual hardware, and the joint simulation platform supports a plurality of simulation interface standards. The joint simulation platform is combined with simulation software with various interface standards in the simulation software environment of the cloud to complete design and operation of joint simulation, virtual hardware simulated by the hardware simulation platform is utilized to perform virtual experiments of joint simulation, simulation and virtual experiments in multiple fields are realized, and the joint simulation platform is convenient to use and wide in application range.

A virtual hardware component (VHC) can be instantiated by loading an image that implements the VHC into a programmable device such as a field programmable gate array (FPGA) and installing a corresponding inventory list of parameters according to which the VHC operates. One or more managing agents are automatically invoked in response to the instantiated VHC to manage the VHC. The VHC is provisioned in response to instantiation of the VHC.

The application relates to the field of vehicle-mounted embedded technology and discloses an engineering machine algorithm expansion method, device, chip and storage medium, the method comprises the following steps: obtaining a calculation task; judging the algorithm resource scale required by the calculation task; calling target algorithm resource of a corresponding scale from an algorithm resource pool according to the algorithm resource scale, the algorithm resource pool is a virtual hardware unit set generated by a main algorithm module and / or an algorithm expansion module through hardware unit virtualization; and executing the calculation task through the target algorithm resource. According to the application, the algorithm resource is uniformly scheduled and managed through the virtualization resource pool, so that the user does not need to care whether the called target algorithm resource comes from the main algorithm module or the algorithm expansion module; different calculation tasks apply corresponding size algorithm resources to the algorithm resource pool according to the required algorithm resource size, and the whole block application of the algorithm expansion module is not needed, so that the algorithm expansion is more flexible.

This application provides a method and apparatus for implementing virtual machine management data communication. The method includes: setting up an agent for each virtual machine; creating a virtual hardware peripheral component interconnect standard device for each virtual machine; installing a virtual hardware PCI device driver for each virtual machine; and having each agent run the virtual hardware PCI device driver and communicate with the virtual desktop architecture management platform to manage data through the corresponding virtual hardware PCI device of its virtual machine.