Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

4 results about "Priority inversion" patented technology

In computer science, priority inversion is a scenario in scheduling in which a high priority task is indirectly preempted by a lower priority task effectively inverting the relative priorities of the two tasks.

Real-time task scheduling method and system based on industrial internet of things, and medium

PendingCN122346355AIndustrial InternetPriority inversion
The application discloses a real-time task scheduling method and system based on an industrial Internet of Things, and a medium, the method comprising: taking a heterogeneous two-level bitmap structure as a unique carrier of task priority and readiness state, incorporating corresponding heterogeneous two-level bitmap search fixed overhead, and completing provable real-time admission control of a newly-built task through a response time iteration criterion; a ready task that passes the provable real-time admission control completes heterogeneous two-level bitmap search within a limited clock cycle; when the heterogeneous two-level bitmap search identifies mutual exclusion lock competition and priority inversion risk, a deterministic bitmap migration protocol is executed through a processor atomic instruction, the readiness queue is physically migrated at the moment when priority inheritance takes effect through the deterministic bitmap migration protocol, the problem of inheritance taking effect but scheduling lagging is eliminated, and the response certainty of a control task in a resource competition scene is ensured.
Owner:HUADIAN ZHENGZHOU MECHANICAL DESIGN INST

Thread locking method and related equipment

The invention provides a thread locking method and related equipment, and the method comprises the steps: setting a first structure body of a mutual exclusion lock according to first identification information under the condition that a first thread holds the mutual exclusion lock of a target resource, and obtaining a first feature value; under the condition that the second thread requests to access the target resource, determining the current state of the mutual exclusion lock; when the current state represents that the mutex lock is occupied, calling the first characteristic value to a kernel space of the operating system, and controlling the second thread to enter the kernel space; in the kernel space, comparing the second priority of the second thread with the first priority; when the comparison result is that the second priority is greater than the first priority, increasing the first priority; and when it is detected that the first thread releases the mutual exclusion lock, controlling the second thread to occupy the mutual exclusion lock. By means of the method, priority inversion can be avoided when threads with high priorities wait for exclusive resources, and the task execution efficiency is improved.
Owner:HONOR DEVICE CO LTD

A hardware request scheduling method and system based on kernel ioctl hijacking

PendingCN122285237AComputer hardwarePriority inversion
This application provides a hardware request scheduling method and system based on kernel ioctl hijacking. The method includes: intercepting character device ioctl requests, obtaining the calling process attributes, request command codes, and parameters; rewriting the parameters of matching requests according to a pre-defined security equivalence rewriting rule verified by formal verification and differential fuzzing testing, while directly passing through unmatched requests; allocating the processed requests to corresponding priority queues according to process attributes, retrieving requests sequentially by priority and calling the device's original ioctl processing function, thereby enabling the request to be sent to the device driver for execution. This application does not require modification of existing drivers and user programs, and relies on verifiable ioctl hijacking and request aggregation mechanisms to avoid priority inversion problems and stably improve hardware scheduling throughput performance.
Owner:CHINA UNICOM INTERNET OF THINGS CO LTD +1

Dynamic priority inversion for host memory buffer handling based on a system state

A storage device may dynamically adjust priorities for types of data placed on a bus between the storage device and a host to optimize a bus pipeline and maximize the performance on the storage device, while minimizing inefficiencies and latencies on the storage device. A controller on the storage device may access data on a host memory buffer (HMB) and identify different types of data on a bus between the storage device and a host. The controller assigns priorities to the types of data placed on the bus and processes the data on the bus according to an assigned priority. The controller also determines a current system state and adjusts the priorities assigned to the types of data based on the current system state.
Owner:SANDISK TECHNOLOGIES LLC