Thread performance prediction and control method of chip multi-threading (CMT) computer system

Abstract

The invention relates to a thread performance prediction and control method of a CMT computer system, which is designed to solve the technical problems of accidental starvation and stagnation of threads, misuse of resources, priority inversion and so on in the existing CMT system. The method comprises guiding the distribution of key resources (RRF, rename register file) in the CMT system by using the performance-resources dependency relationship model to predict and control the thread performance; acquiring and adjusting the model parameters by thread sampling and online studying to real-timely track and accurately predict the thread performance; and calculating the number of the key resources desired for achieving the performance by use of a parameter determination model according to a set performance requirement, and re-adjusting the resource distribution. The method provided by the invention has the advantages: the model is simple and can accurately describe the dependency relationship between the performance and resources; the method has high adaptability to realize accurate performance prediction and control of all kinds of threads; the method supports two control modes of absolute performance and performance percentage; and the method is low in realization cost, is easy to realize on basis of the existing system structure and can realize ordered distribution of multi-threading chip resources and performance predictability and controllability.

Description

Technical field [0001] The invention relates to a method for predicting and controlling computer resource allocation and thread performance, in particular to a method for predicting and controlling thread performance in an on-chip multithreading (CMT) computer system. This invention belongs to the field of computer system design, and is used to design, predict and control the performance of computer systems, especially on-chip multi-threaded computer system structures. The specific application field is thread scheduling and resource allocation within the processor on the on-chip multi-threaded architecture. , Design and implementation of functions such as operating system task scheduling. Background technique [0002] Modern computer systems have gradually entered the period of on-chip multi-threading (CMT) system architecture, allowing multiple threads to run simultaneously inside the processor. By mining and using thread-level parallel (TLP), it overcomes the shortcomings of in...

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Problems solved by technology

Therefore, the dependence of thread performance on resources is essentially a real-time and continuous solution to a non-linear problem under multi-input and multi-constraint conditions, which requires consideration of software and hardware costs and realizability, so modeling is difficult

(3) The aforementioned two difficulties actually exist in traditional single-core and single-threaded systems, but relying on the monopoly of on-chip resources and the proper scheduling of the operating system, they can basically meet the system requirements

However, for CMT, there are on-chip resource competition and interference among multiple threads, which further exacerbates the unpredictability and uncontrollability of thread performance and the entire system, so special research and processing are required.

[0005] In summary, the ability to predict and control thread performance is related to whether the performance potential of the CMT system can b

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