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Thread performance prediction and control method of chip multi-threading (CMT) computer system

A computer system, on-chip multi-threading technology, applied in the directions of multi-programming device, resource allocation, etc., can solve the problems of lack of thread performance, competition and interference of on-chip resources, etc., to solve disordered competition and mutual interference, and overcome performance difficulties Predictive, Precisely Predicted and Controlled Effects

Inactive Publication Date: 2014-08-20
SHENYANG AEROSPACE UNIVERSITY
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Problems solved by technology

Therefore, the dependence of thread performance on resources is essentially a real-time and continuous solution to a non-linear problem under multi-input and multi-constraint conditions, which requires consideration of software and hardware costs and realizability, so modeling is difficult
(3) The aforementioned two difficulties actually exist in traditional single-core and single-threaded systems, but relying on the monopoly of on-chip resources and the proper scheduling of the operating system, they can basically meet the system requirements
However, for CMT, there are on-chip resource competition and interference among multiple threads, which further exacerbates the unpredictability and uncontrollability of thread performance and the entire system, so special research and processing are required.
[0005] In summary, the ability to predict and control thread performance is related to whether the performance potential of the CMT system can be fully utilized and whether computing tasks can be performed as required. It is difficult for the existing technology to provide a satisfactory solution in terms of software or hardware.
The reason is that, on the one hand, there is currently a lack of an accurate, quantifiable, universal, and operable model of the "performance-resource" dependency of threads. There is no way to predict and control
On the other hand, the thread scheduling function of the CMT system is partly moved down from the operating system level to the inside of the processor. The progress level of each thread is actually affected and determined by the operating system scheduling method, the resource allocation on the processor chip, and the thread scheduling method. Increased difficulty in predicting and controlling thread performance
In short, there is currently a lack of effective prediction and control methods and technologies for thread performance in CMT systems

Method used

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  • Thread performance prediction and control method of chip multi-threading (CMT) computer system
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[0032] see Figure 2-Figure 3 , the application of the present invention can predict and control the thread performance in the CMT computer system, solve various problems in the CMT computer system because of the disorderly competition and mutual interference of multi-threads to on-chip resources, and overcome the unpredictable performance of multi-thread operation sex, uncontrollability. The specific implementation of the present invention can be completed at the hardware level (that is, inside the processor chip), or can be completed jointly by the operating system and the hardware design. According to the performance requirements (absolute performance or performance percentage) set by users or applications, use the model determined by the parameters to calculate the number of key resources (RRF) required to achieve the performance, adjust resource allocation, and achieve the purpose of thread performance control. The acquisition and adjustment of model parameters are obtai...

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Abstract

The invention relates to a thread performance prediction and control method of a CMT computer system, which is designed to solve the technical problems of accidental starvation and stagnation of threads, misuse of resources, priority inversion and so on in the existing CMT system. The method comprises guiding the distribution of key resources (RRF, rename register file) in the CMT system by using the performance-resources dependency relationship model to predict and control the thread performance; acquiring and adjusting the model parameters by thread sampling and online studying to real-timely track and accurately predict the thread performance; and calculating the number of the key resources desired for achieving the performance by use of a parameter determination model according to a set performance requirement, and re-adjusting the resource distribution. The method provided by the invention has the advantages: the model is simple and can accurately describe the dependency relationship between the performance and resources; the method has high adaptability to realize accurate performance prediction and control of all kinds of threads; the method supports two control modes of absolute performance and performance percentage; and the method is low in realization cost, is easy to realize on basis of the existing system structure and can realize ordered distribution of multi-threading chip resources and performance predictability and controllability.

Description

technical field [0001] The invention relates to a computer resource allocation and thread performance prediction and control method, in particular to a thread performance prediction and control method in a chip multi-thread (CMT) computer system. The invention belongs to the field of computer system design, and is used for performance design, prediction, and control of computer systems, especially on-chip multi-thread computer system structures. The specific application fields are thread scheduling and resource allocation inside processors on chip multi-thread architectures. , The design and implementation of operating system task scheduling and other functions. Background technique [0002] Modern computer systems have gradually entered the period of on-chip multithreading (CMT) system structure, which allows multiple threads to run simultaneously inside the processor. The overall processing power and resource utilization of the system. CMT is hardware-level multithreadin...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/50
Inventor 杨华石祥斌潘琢金
Owner SHENYANG AEROSPACE UNIVERSITY
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