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131results about "Computation using denominational number representation" patented technology
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Pulse neural network hardware accelerator and data processing method
The invention discloses a pulse neural network hardware accelerator and a data processing method, and the accelerator is characterized in that a low-power-consumption three-stage pipeline CPU module is used for receiving input data, scheduling an SNN network acceleration instruction, and sending the input data to an asynchronous edge SNN hardware accelerator module through a coprocessor interface; the asynchronous edge SNN hardware accelerator module comprises a pulse data encoding and decoding module, L neuromorphic kernels and an on-chip network, the pulse data encoding and decoding module encodes input data into a pulse form and sends the pulse form into the neuromorphic kernels, and the neuromorphic kernels are used for performing calculation based on the data in the pulse form; the network-on-chip is used for communication between the neuromorphic kernels, and the connection between neurons before and after synapses in the neuromorphic kernels is realized by adopting a synaptic cross array. According to the invention, the data processing acceleration performance can be greatly improved.
Owner:WUHAN UNIV +1
Information processing method, quantum circuit generation device, and program
PendingUS20250307676A1Quantum computersComputation using denominational number representationInformation processingQuantum circuit
[Problem] To provide an information processing method which further minimizes quantum bit exponential measurement frequency. [Solution] One aspect of the present invention provides an information processing method. The information processing method is provided with the following steps. A conversion step converts an operator for n number of quantum bits into a unitary gate by using fewer than (n / 2) ancillary bits. The format of the unitary gate makes it possible to directly apply the operator. A circuit generation step involves generating a quantum circuit which functions as a time evolution operator when an ancillary bit is observed as a prescribed state, on the basis of the unitary gate.
Owner:QUEMIX INC +1
Decimal bit weight amplitude weight quantizer and quantization method of ten-value logic
PendingCN121349403ACode conversionComputation using denominational number representationAlgorithmLogical operations
According to the bit weight amplitude weight quantizer and the quantization discretization method, the maximum amplitude of input continuous simulation information is discretely divided into a plurality of amplitude paragraphs of a content interval GS, the amplitude paragraphs are associated with a carry system, the amplitude of the input continuous simulation information is discretely divided into a plurality of paragraphs through a number of carry systems, and the amplitude of the input continuous simulation information is divided into a plurality of paragraphs. If a decimal system exists, the amplitude of the continuous analog information is discretized into ten paragraphs, the discretized paragraphs are converted into thermometer coding information through a comparator, and then the thermometer coding information is converted into bit weight information through XOR and XNOR logical operation; the value of the bit weight in the bit weight information is generated by comparing the binary states 0 and 1 on the node, one state on the unique node is compared with different states on other nodes to indicate that the node has the weight, and the position number of the node with the weight is used for indicating the bit weight of all the nodes in the bracket.
Owner:HANGZHOU JIUJIE TIANYU TECHNOLOGY CO LTD
Signal processing method and device based on optical computing chip and photoelectric fusion computing system
ActiveCN121501086ADigital dataComputation using denominational number representationEngineeringLight signal
The invention relates to the field of optical computing, and provides a signal processing method and device based on an optical computing chip and a photoelectric fusion computing system.The signal processing device comprises an optical input modulation module, a first weight mapping module, a second weight mapping module and an optical output combining module, and the optical input modulation module converts an input signal into a modulated optical signal; the first weight mapping module obtains a first output optical signal based on the first weight; the second weight mapping module acquires a second output optical signal based on a second weight; the optical output combining module obtains a comprehensive output signal based on the first output optical signal and the second output optical signal; the second weight mapping module comprises a light dimension reduction unit, a low-dimensional light modulation unit and a light dimension raising unit, and the light dimension reduction unit performs low-dimensional projection on a modulated light signal; the low-dimensional optical modulation unit adjusts the second weight based on the second weight update signal and obtains an optical signal after low-dimensional processing; and the light dimension raising unit carries out high-dimensional projection on the light signal after low-dimensional processing.
Owner:SHANGHAI TURING INTELLIGENT COMPUTING QUANTUM TECHNOLOGY CO LTD
Bicombinary calculation method and system based on double-chain differential coupling principle
PendingCN122173050AGeneral purpose stored program computerComputation using denominational number representationSoftware engineeringLogical operations
The application discloses a ternary computing method and system based on a double-chain difference coupling principle. A difference value (XnYn) is directly generated by a forward component Xn and a reverse component Yn in a difference coupling area, forming a three-value logic {‑1, 0, +1}, and a threshold comparison circuit is omitted, and operation follows BH=Σ(XnYn)×3^n. A hierarchical logic system composed of basic operators, minimum complete operators and global operators is constructed, and arbitrary three-value logic operation is realized; a circular waveguide structure is adopted to configure an optical path difference, so that coherent light directly forms three interference states at an output end, and optical three-value logic gates and optical full adders are realized; a double-chain six-bit structure is adopted for symbol coding, a two-dimensional geometric framework is driven to generate a symbol form, and logical and geometric expression unification is realized.
Owner:蔡光贤
Optical device for generating plurality of conditioned signals
An optical arrangement for generating a plurality of conditioned optical signals is presented. The optical device (305) includes at least one temporally incoherent light source (310) coupled to a plurality of amplitude modulators (341, 342). Each amplitude regulator is configured to attenuate or amplify an optical signal derived from the at least one temporally incoherent light source (310) to provide a corresponding regulated optical signal. An optical computing system is also presented that includes an optical arrangement coupled to a processing device having a plurality of inputs for receiving conditioned optical signals.
Owner:SALIENCE LABS LTD +1
Decimal and multi-system quantization logic gate circuit
PendingCN121597160ALogic circuits characterised by logic functionComputation using denominational number representationLogical operationsLogic gate
The decimal quantization logic gate is a hardware logic operation design based on quantization logic, and the main design idea of the decimal quantization logic gate is that a linear multi-valued logic operation is used as a logic operation part to execute logic operations such as AND (small), OR (large) and NOT (complement); the multi-valued quantizer is used as a quantization part to execute multi-valued quantization of two values, three values, four values,... ten values, sixteen values,... fifty values, one hundred values and the like, and a multi-valued logic operation and multi-valued quantization'quantization logic 'circuit is formed by combining the structures of multi-valued quantization and logic operation together, and a multi-valued quantizer is used as a quantization part to execute multi-valued quantization of two values, three values, four values,... ten values, sixteen values,... fifty values, one hundred values and the like. The logic circuit always executes'quantization 'and'logic operation', so that the logic circuit is called'quantization logic '. The design of all previous'multi-valued logic gate 'and'two-valued logic gate' circuits is as follows: 'logical operation '(AND, OR, NOT) is firstly carried out, and then'quantization' (threshold detection) is carried out to set'fault-tolerant intervals'. Therefore, the quantization logic is the most original thought of logic hardware design.
Owner:胡五生 +2
Cumulative calculation device, cumulative calculation method, and program
ActiveEP4358070B1Key distribution for secure communicationComputation using denominational number representation
Owner:NT T INC
Floating-point processor
PendingFR3162539A1Instruction analysisComputation using denominational number representationComputer architectureExternal data
The invention relates to a processor comprising: an integer processing unit (ALU), a floating-point processing unit (FPU), a register bank (RGBK), an external data bus (DTB), a data path connecting the register bank to the floating-point processing unit, the integer processing unit, and the external data bus, and a processing chain configured to process at least partially simultaneous integer and floating-point instructions, the processing chain comprising common stages for processing an integer and a floating-point instruction, and at least one additional execution stage for executing a floating-point operation. Figure 1
Owner:COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Deterministic Optical Logic System Based on the Total Wave Modified Schrödinger Equation (TWMSE) and Generalized Interference Logic
PendingUS20260079381A1Digital dataLogic circuits using opto-electronic devicesWave fieldScalable parallel processing
We propose a hybrid wave-based logic model for optical computing that integrates both Total Wave Modified Schrödinger Equation (TWMSE) formulations and non-TWMSE interference field logic. This system enables deterministic collapse behavior through physical wave interactions, rather than relying on conventional transistor logic or probabilistic quantum models. In the TWMSE regime, collapse thresholds are governed by field interference between signal and control waves, allowing dynamic selection of tasks based on intensity and phase alignment. In the generalized non-TWMSE regime, similar collapse-like logic can be achieved using thresholded interference models that are classically engineered for optical domain systems. Together, these formulations enable adaptive task selection, nonlinear logic gating, and scalable parallel processing in optical chips. Our architecture supports real-time wavefield decisions and is compatible with standard photonic components such as interferometers, microring resonators, variable attenuators, and optical threshold comparators. The result is a unified logic framework for next-generation AI hardware that harnesses both quantum-inspired and classical wave interference dynamics.
Owner:CHEONG LARRY LIM KHENG
Superconducting circuit and quantum computer
ActiveUS12566989B2Quantum computersComputation using denominational number representationParticle physicsQuantum computer
A superconducting circuit and a quantum computer capable of implementing four-body interaction using a plurality of superconducting qubit circuits supplied with signals of the same frequency are provided. A superconducting circuit (1) includes four superconducting qubit circuits (10), a coupling circuit (20) directly connected to the four superconducting qubit circuits (10). Each of the superconducting qubit circuits (10) indicates a qubit by being in a first phase state or a second phase state, when the number of the superconducting qubit circuits (10) in the first phase state among the four superconducting qubit circuits (10) is an even number, an interaction term of Hamiltonian of the superconducting circuit (1) takes a first value, and when the number of the superconducting qubit circuits (10) in the first phase state among the four superconducting qubit circuits (10) is an odd number, the interaction term takes a second value.
Owner:NEC CORP
Method for performing computations in system
A method for performing computations in a system having a matrix multiplication unit that converts an optical input vector to an analog output vector based on a plurality of weight control signals, the method comprising: receiving a computation request comprising at least one digital input vector and a first plurality of weights; storing the digital input vector and the first plurality of weights in a storage unit; generating a first plurality of modulator control signals based on the digital input vector, generating a first plurality of weight control signals based on the first plurality of weights; generating an optical input vector based on the first plurality of modulator control signals; obtaining a first plurality of digital outputs corresponding to the analog output vector, the first plurality of digital outputs forming a first digital output vector; performing, by the controller, a non-linear conversion on the first digital output vector to produce a first converted digital output vector; storing the first converted digital output vector in a storage unit; an output generated based on the first converted digital output vector is output by the controller.
Owner:LIGHTELLIGENCE PTE LTD
Measurement system fault-tolerant architecture for the four-leg cat code.
Systems and methods are provided for performing fault-tolerant quantum operations for a four-leg Cat code. The quantum system includes an ancilla qubit dispersively coupled to a first logical qubit, and the quantum system may be manipulated at least in part by: generating and applying a first drive waveform to the ancilla qubit, where the first drive waveform includes a first comb of 7t pulses having selective frequencies corresponding to a first selection of even and odd cavity resonant frequencies of the first logical qubit; and reading out the state of the ancilla qubit.
Owner:YALE UNIVERSITY
Circuit and method employing temporal multiplexing to perform a mac operation
Various embodiments of the present disclosure are directed to a photonic circuit for a vector-matrix operation. A source pixel is configured to generate a light beam. An optical fan-out structure is configured to generate a plurality of copies of the light beam. A plurality of modulator pixels are configured to respectively transmit the plurality of copies with individual transmissivities to generate a plurality of transmitted light beams. A plurality of detector pixels are configured to accumulate charge respectively in response to the plurality of transmitted light beams. A controller is configured to control the source pixel and the plurality of modulator pixels to modulate an intensity of the light beam and the individual transmissivities to perform the vector-matrix multiplication operation. The intensity is modulated to temporally encode an input row vector, and the individual transmissivities are modulated to temporally encode corresponding column vectors of a weight matrix.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
Scalable optical quantum computing with hybrid resource states
ActiveJP7795532B2Quantum computersComputation using denominational number representationParticle physicsQuantum computer
A system for scalable, fault-tolerant optical quantum computing includes multiple optical circuits, multiple photon-number-resolving detectors (PNRs), a multiplexer, and an integrated circuit (IC). In operation, the optical circuits generate output states by Gaussian boson sampling (GBS), and the PNRs generate qubit clusters based on the output states. The multiplexer multiplexes the qubit clusters and replaces empty modes with squeezed vacuum states to generate multiple hybrid resource states. The IC stitches the hybrid resource states into a high-dimensional cluster state containing states for fault-tolerant quantum computing.
Owner:XANADU QUANTUM TECH INC
Josephson wideband multiplexer-demultiplexer circuit
The superconducting circuit includes a first port and a plurality of second ports, a plurality of filter poles, each filter pole including an inductor and a capacitor connected in parallel between the first port and a second port of the plurality of second ports, and an admittance inverter including at least one of a coupling capacitor, a coupling inductor, and a Josephson junction, the admittance inverter coupling two consecutive filter poles to each other. When operating as a demultiplexer, the plurality of filter poles and associated admittance inverters define a plurality of current branches such that an input current input through the first port is routed to a selected one of the plurality of second ports by application of a first set of magnetic flux biases.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION
Methods and systems for addition, multiplication, subtraction, and division of rational numbers encoded in the domain of farey rationals for mpc systems
Owner:ALGEMETRIC INC
Quantum circuit construction using simultaneous entanglement gates in a trapped-ion quantum computer
1. A method of performing a computation using an ion trap quantum computing system comprising a classical computer, a system controller, and a quantum processor, the method comprising: computing, by the classical computer, a circuit that implements a selected set of gate operations using one or more Efficient Arbitrary Simultaneous Entanglement (EASE) gates; implementing, by the system controller, the computed circuit on the quantum processor; measuring, by the system controller, a population of qubit states in the quantum processor; and outputting, by the classical computer, the population of qubit states measured in the quantum processor.
Owner:IONQ INC +1
Calibrating Majorana qubits by exploring topological degeneracy
A method for use with a topological quantum computing device is provided. The method may include setting a plurality of device parameters for a qubit architecture including a plurality of Majorana Zero Modes (MZMs). The method may further include adjusting the plurality of device parameters at least in part by determining whether the plurality of MZMs have ground state degeneracy. If it is determined that the plurality of MZMs do not exhibit ground state degeneracy, altering the plurality of device parameters may further include altering one or more device parameters of the plurality of device parameters. If it is determined that the plurality of MZMs exhibit ground state degeneracy, the method may further include altering one or more parameters of a measurement device coupled to the qubit architecture.
Owner:MICROSOFT TECHNOLOGY LICENSING LLC
Ion trap tip
PendingJP2026061883AQuantum computersOptical computing devicesIon trap mass spectrometryParticle physics
This enables the creation of an ion trap chip with high photon collection efficiency. [Solution] The ion trap chip (1) comprises an electrode substrate (10) that holds ions (I) which become qubits in space, a first optical circuit board (300) having a first optical waveguide (110), and a light-receiving unit (120) that receives photons emitted from the ions and introduces the photons into the first optical waveguide, with the light-receiving unit facing the electrode substrate with the ions in between.
Owner:OSAKA UNIVERSITY
Storage and calculation integrated photon calculation system based on phase change metasurface and holographic light field modulation
PendingCN121998011ABreak through bottlenecksImplement weight readingInformation arrangementInference methodsVideo memorySpatial light modulator
The invention discloses a storage and calculation integrated photon calculation system and method based on a phase change metasurface and holographic light field modulation, and aims to solve the problems that storage and calculation are separated, the dynamic modulation speed is low and the precision is limited in an existing photon calculation framework. The invention provides a hybrid computing architecture which takes a blue-ray disc or a phase change storage wafer as a high-density holographic weight storage medium and is combined with a high-speed spatial light modulator and a photoelectric nonlinear activation circuit. Through an area array parallel reading mechanism, a large-scale weight matrix is read at one time by using beam-expanded coherent light, light velocity matrix multiplication is completed, and interlayer fast switching of the deep neural network is realized in combination with a streaming rotation or light beam scanning technology. According to the invention, the non-volatility and multistage refractive index characteristics of the phase change material are utilized to realize high-density on-chip storage and zero-power-consumption lossless reading of large model weight, and the problems of a video memory wall and an energy consumption wall in large model reasoning are effectively solved.
Owner:HANGZHOU HUAWANG SYST TECH CO LTD
Device and method for creating a protective layer for interconnects and devices in packaged quantum structures
The semiconductor device comprises a first chip layer having a first chip layer front surface and a first chip layer back surface, a qubit chip layer having a qubit chip layer front surface operably coupled to the first chip layer front surface using a set of bump bonds, and a qubit chip layer back surface, a set of through silicon vias (TSVs) connected to at least one of the first chip layer back surface or the qubit chip layer back surface, and a cap wafer metal bonded to at least one of the qubit chip layer back surface or the first chip layer back surface.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION
Method and apparatus for determining data storage bit width, and method for storing index data
Owner:CALTERAH SEMICON TECH (SHANGHAI) CO LTD
Processing system, processing method, and program
To provide a processing system, a processing method, and a program for accurately adjusting a resonance frequency in a quantum bit device.SOLUTION: The processing system 1 includes a calculation means 701 that calculates a first current value, which is a current value of a current flowing through a resonance circuit, based on a value of a residual magnetic flux in the resonance circuit included in a quantum bit device.SELECTED DRAWING: Figure 9
Owner:NEC CORP
Method and apparatus for determining data storage bit width, and method for storing index data
Owner:CALTERAH SEMICON TECH (SHANGHAI) CO LTD
Optical apparatus for the generation of multiple adjusted signals
An optical apparatus for generating a plurality of adjusted optical signals is presented. The optical apparatus (305) includes at least one temporally incoherent light source (310) coupled to a plurality of amplitude adjusters (341, 342). Each amplitude adjuster is configured to attenuate or amplify an optical signal derived from the said at least one temporally incoherent light source (310) to provide a corresponding adjusted optical signal. Also presented is an optical computing system comprising the optical apparatus coupled to a processing device having a plurality of inputs for receiving the adjusted optical signals.
Owner:SALIENCE LABS LTD +1
Voltage trimming for qubit control
A quantum device includes a silicon layer in which a plurality of quantum dots 201 can be induced, a first gate of a first inductive quantum dot and a second gate of a second inductive quantum dot that control an electrical potential defining the induced quantum dots 201, and a first integrated circuit element and a second integrated circuit element 204 that control voltages of the first gate and the second gate. The integrated circuit element 204 has an adjustable non-volatile resistance value. The integrated circuit element 204 has an input voltage V in and first and second output voltages V out . The output voltages depend on the input voltage, the first non-volatile resistance value, and the second non-volatile resistance value. The integrated circuit element 204 is electrically connected to the gates such that the output voltages are applied to respective gates of the inductive quantum dots 201.
Owner:QUANTUM MOTION TECH LTD
Traveling-Wave Parametric Amplifier Device for Quantum Computers
The present disclosure relates to a TWPA device (1) for a quantum computer, which has a two-band dispersion relation and is configured to perform three-wave mixing. The TWPA device (1) comprises a chain of unit cells (φ), each comprising a non-linear inductance element (5) and a capacitor (6) connected to its ground (7). The unit cell (φ) further comprises a resonator circuit (8) and one of the periodically modulated input parameters. The two-band dispersion relation is composed of a lower frequency band and a higher frequency band, sandwiching a frequency gap. Further, the TWPA device (1) is configured to receive an amplified signal and a pump signal at the input (2). The pump signal is in the higher frequency band described above and has a frequency that is at least 2 / 3 of the cut-off frequency of the TWPA device (1) described above, or the pump signal described above is in the lower frequency band described above and its second harmonic has a frequency within the frequency gap described above.
Owner:QET SWEDEN AB
Lateral state-dependent forces for entanglement of trapped ions
The present disclosure provides embodiments for entangling two or more trapped ions. To this end, a common motional mode of two or more trapped ions is used by conditionally exciting and / or de-exciting the common motional mode depending on the internal states of the two or more trapped ions. The common motional mode is conditionally excited / de-excited by inducing, on each of the two or more trapped ions, a respective perpendicular state-dependent force (SDF) that is modulated depending on the frequency of the motional mode. More specifically, each perpendicular SDF is induced by a laser beam and acts perpendicular to the propagation direction of the laser beam inducing the perpendicular SDF. The SDF may be modulated by (i) modulating the intensity and / or amplitude of the electromagnetic field of a first laser beam, (ii) changing the position and / or direction of the first laser beam relative to the first trapped ion, and / or (iii) including light of a different frequency in the laser beam.
Owner:ALPINE QUANTUM TECH GMBH