55 results about "Code density" patented technology

A processor can achieve high code density while allowing higher performance than existing architectures, particularly for Digital Signal Processing (DSP) applications. In accordance with one aspect, the processor supports three possible instruction sizes while maintaining the simplicity of programming and allowing efficient physical implementation. Most of the application code can be encoded using two sets of narrow size instructions to achieve high code density. Adding a third (and larger, i.e. VLIW) instruction size allows the architecture to encode multiple operations per instruction for the performance critical section of the code. Further, each operation of the VLIW format instruction can optionally be a SIMD operation that operates upon vector data. A scheme for the optimal utilization (highest achievable performance for the given amount of hardware) of multiply-accumulate (MAC) hardware is also provided.

A data processing apparatus and method for performing multiply-accumulate operations is provided. The data processing apparatus includes data processing circuitry responsive to control signals to perform data processing operations on at least one input data element. Instruction decoder circuitry is responsive to a predicated multiply-accumulate instruction specifying as input operands a first input data element, a second input data element, and a predicate value, to generate control signals to control the data processing circuitry to perform a multiply-accumulate operation by: multiplying said first input data element and said second input data element to produce a multiplication data element; if the predicate value has a first value, producing a result accumulate data element by adding the multiplication data element to an initial accumulate data element; and if the predicate value has a second value, producing the result accumulate data element by subtracting the multiplication data element from the initial accumulate data element. Such an approach provides a particularly efficient mechanism for performing complex sequences of multiply-add and multiply-subtract operations, facilitating improvements in performance, energy consumption and code density when compared with known prior art techniques.

An image coding method is provided, in which the method includes the steps of: extracting edge information which represents an edge part of an original image; obtaining density information of an edge smoothed image from the original image by smoothing the edge part; obtaining coded edge information by coding the edge information according to a first coding algorithm; obtaining coded density information by coding the density information of the edge smoothed image according to a second coding algorithm; and sending the coded edge information and the coded density information as coded information to an image decoding apparatus.

The invention provides an image collecting control device and method. In practical instrument image collecting, the device drives an image collector located at the tail end of the device to change a collecting position by controlling a fixing support to move, and therefore instrument images of multiple instruments can be collected in sequence through one image collector, and the image collecting cost is lowered. A DSP is used for controlling the image collector to conduct image collecting, an ARM processor is used for achieving man-machine interaction, a servo power mechanism is controlled to adjust the moving track of the fixing support, and therefore the collecting position of the image collector is adjusted. It is clear that the control mode with the ARM and the DSP is adopted so that the image collecting control device can meet the practical requirements for the high code density, the high storage device utilization rate, the high control capability and the like.