92 results about "Code segment" patented technology

The application relates to the technical field of code retrieval, and discloses a code retrieval method based on code classification representation in a code repository scenario, which comprises the following steps: labeling semantics of each code segment as a user query corresponding to the code segment, and constructing a training set and a verification set; extracting auxiliary information and internal structure information of each code segment in the training set; respectively calculating a first correlation matrix of the auxiliary information and the user query and a second correlation matrix of the internal structure information and the user query; splicing the first correlation matrix and the second correlation matrix, and outputting a final correlation score through a neural network; and training a code retrieval model to convergence based on a sorting loss function. The application solves the problems that code information in an existing code retrieval model is single and the effect is difficult to improve, realizes all-round utilization of code information, and effectively improves the effect of code retrieval.

A system of determining a software bill-of-materials (RBOM) of an operating environment, the system comprising a processing circuitry configured to: a) access a memory space of a first process executing in the operating environment; b) for one or more threads of the first process: read contents of one or more memory location of a thread stack associated with the respective thread, determine whether a contained value of a respective memory location is a code section execution address, and responsive to the contained value of the respective memory location of the thread stack being a code section execution address: i) determine, based on the memory space of the first process and / or an executable file associated with the first process, a code section identifier associated with the code section, and ii) add the code section identifier associated with the code section to the RBOM.

A computer-implemented method for operating a code generator to create a program code for computing a neural network in a hardware environment is disclosed. The method includes (i) providing a defined neural network, (ii) identifying at least one tiling group, (iii) creating a tiling code segment for computing the layers of the at least one tiling group using tiling, (iv) creating a program code for computing the defined neural network in the hardware environment, wherein the code segment created for computing the tiling group is implemented in the program code, and (v) implementing the program code in the hardware environment.

The application discloses a defect code generation method and related device, and the method comprises the steps of: obtaining at least one code segment pair from a code library; analyzing the modification reason between the first code segment before modification and the second code segment after modification in each code segment pair through a first language model, and identifying the defect type of the first code segment in each code segment pair indicating defect repair; obtaining at least one code segment pair corresponding to each defect type as a target code segment pair, and calling a second language model to learn each target code segment pair with the generation of defect code as a learning target to obtain a learned second language model; and generating a defect code segment corresponding to the target code segment through the learned second language model. The method can realize the automatic generation of defect code, improve the generation efficiency of defect code, improve the generation quality of defect code, and enhance the comprehensiveness and authenticity of the generated defect code.

Embodiments of the present application provide a webpage file processing method and device, the method is applied to a client, and comprises the following steps: obtaining a packaging file, mapping information and customized information of a target webpage; wherein the packaging file is obtained by packaging a plurality of code files of the target webpage by a server, the mapping information comprises a mapping relationship between each code segment in the packaging file and a first path, and the customized information comprises a second path; for any code segment in the packaging file, after running the code segment, the first path of the code segment is matched with the second path in the customized information; and based on a matching result, it is determined whether to replace a running result of the code segment. Through packaging processing, the opening speed of the webpage is improved; through dynamic replacement of the running result at runtime, the directory structure is not affected by damage, the customized demand is met at the same time on the premise of improving the performance of the webpage.

The present disclosure provides a code generation method and device, electronic equipment and computer readable storage medium, relates to the field of computers, in particular to the technical field of source code. The specific implementation scheme is: obtaining a to-be-declared attribute in an attribute of an object in a code segment that meets a preset attribute condition; determining a data type of the to-be-declared attribute based on an attribute name of the to-be-declared attribute; determining first attribute declaration code corresponding to the to-be-declared attribute based on the data type of the to-be-declared attribute, the first attribute declaration code being used to define the data type of the to-be-declared attribute. Based on the present scheme, the attribute declaration code corresponding to the to-be-declared attribute can be automatically determined, which can replace the manual writing of the attribute declaration code, thereby improving the development efficiency.

This invention relates to the field of hot patching technology, specifically a kernel hot patching method based on the MIPS architecture. The method replaces a patch function in the code segment of the function being patched, and includes the following steps: Step S1: Create a hot-fix environment for the function being patched; Step S2: Based on the hot-fix environment, construct a replacement jump instruction for the function being patched under the MIPS architecture based on the patch function; Step S3: Modify the permissions of the function being patched to write permissions, so that the replacement jump instruction can be written into the function being patched; Step S4: Write the replacement jump instruction into the function being patched. This invention enables the MIPS architecture to fulfill kernel hot patching functionality even when GCC dependencies or architecture dependencies are missing, while also possessing advantages such as high reliability, fast repair speed, and traceability.

The application discloses a target code segment acquisition method and device, relates to the technical field of computers, and can reduce the time cost and false positive rate of running sequence analysis. In the application, intermediate code of an application program and dynamic data including a running track function acquired when the application program is running are acquired, functions different from the running track function in the intermediate code are removed, and a target function of the intermediate code is obtained; running sequence analysis is performed on the target function, and a first target code segment in which the running sequence of the code in the target function is different from a preset sequence is obtained. Based on the target code segment acquisition method provided in the application, the analysis range of application program running sequence analysis can be reduced, and the time cost and false positive rate can be reduced.

The invention relates to a computer-implemented method for operating a code generator for creating program code for calculating a neural network on a hardware environment (2), comprising the following steps: - Providing (S1) a defined neural network; - Identifying at least one tiling group; - Creating (S2) a tiling code segment for calculating the layers of the at least one tiling group using tiling; - Creating (S3 - S11) program code for calculating the defined neural network in the hardware environment (2), wherein the created code segment for calculating the tiling group is implemented in the program code; - Implementing (S12) the program code in the hardware environment (2).

The application discloses an intelligent code analysis method and system based on a defect hash cache, which comprises the following steps: obtaining defect details of a code, generating semantic hash values of each defect according to rule identifiers and code segments, and taking the semantic hash values of the defects as cache keys; if the cache keys exist in a cache database, directly outputting analysis results corresponding to the cache keys in the cache database; grouping all defects that do not hit the cache according to rule identifiers and file paths to form a plurality of defect groups; for each defect group, retrieving multi-layer context information from an abstract syntax tree index; combining the context information and the defect details of each defect group into batch analysis prompt words, calling a large language model to obtain LLM analysis results; if the large language model is unavailable, adopting a three-level degradation strategy to obtain degraded analysis results. Through the hash cache mechanism and the batch grouping optimization algorithm, the number of LLM calls is reduced, and the analysis speed is improved.

The application discloses a problem troubleshooting method and device, a server and a storage medium, and belongs to the Internet field. The method comprises the following steps: in response to a target event processing request, determining a target code, generating a running logic description of the target event according to the target code and a reference code, storing event related information and the running logic description in a historical experience library, in response to a problem troubleshooting request, querying the historical experience library to obtain a running logic description of a problem to be troubleshooted, and acquiring a problem determined based on the running logic description of the problem to be troubleshooted. In the event processing process, the running logic description can be generated based on the target code and the reference code. Since the natural language description in the running logic description can clearly explain the function of the code segment, when the problem troubleshooting request is responded to and the problem is troubleshooted based on the running logic description, the problem can be determined in time and quickly, the troubleshooting difficulty is reduced, the troubleshooting efficiency is improved, and the troubleshooting time is reduced.

The application discloses a code segment processing method and device, a storage medium and equipment. The method comprises the following steps: setting an interactive control associated with a code editing area in a network code editor; in response to a triggering operation on the interactive control, determining a target code segment to which a cursor belongs, and acquiring a starting line and an ending line of the target code segment in the network code editor; and based on the network code editor, visually highlighting and displaying the target code in the starting line to the ending line. By associating the interactive control with the code editing area in the network code editor and determining the target code segment in response to the triggering operation on the interactive control, the target code segment is visually highlighted and displayed, which significantly improves the convenience, accuracy, response speed and fault tolerance of the user in locating and identifying the code segment.

This invention relates to the field of software technology, providing a method, system, computer, and storage medium for processing multi-station test software. The method includes: acquiring the overall display screen test flow and several workstation test software programs; determining several common steps and several differential steps for all workstations; extracting code segments for the common steps and several differential step code segments; determining several common test parameters; extracting a set of common parameter sub-code segments; identifying the remaining sub-code segments as differential sub-code segments; associating several workstation numbers with several differential sub-code segments; and forming integrated multi-station test software based on the common step code segments, the set of common parameter sub-code segments, the several workstation numbers, and the several differential sub-code segments. By employing this method, modifying test parameters across multiple workstation test software programs is highly efficient, and errors and omissions in modification are less likely.

This invention discloses a dynamic memory scheduling method and apparatus for an industrial control terminal collaborative response system. The method includes creating a free linked list block based on the memory space status of the industrial control terminal collaborative response system; when a process requests memory space, allocating a free memory block to the process using a pre-set algorithm; when a free memory block is allocated to the requesting process, tracking ownership of the code segment, data segment, and stack segment; and when the process finishes running, releasing the memory and reclaiming ownership of the memory address space occupied by the process. This method, based on the ownership mechanism and type-safe language features of the system programming language Rust, designs a memory storage manager, achieving performance and reliability assurance for dynamic memory scheduling, and improving the overall operating performance and security of the industrial control terminal collaborative response system.

The application relates to the technical field of software performance evaluation optimization, in particular to a software performance index intelligent evaluation and optimization method and system based on a large model, which comprises the following steps: collecting target software runtime performance monitoring data and source code structure information, inputting a pre-trained general large language model, generating a performance bottleneck preliminary natural language description through pattern recognition and feature extraction, constructing a structured performance problem positioning map based on the description, automatically generating performance detection probe code, injecting the performance detection probe code into a running environment to collect fine-grained indexes, performing multidimensional correlation analysis on the fine-grained indexes and original monitoring data, correcting the map to form a quantitative problem root cause report, and generating a code optimization scheme list containing code segment positioning, optimization fragments and resource influences by the large model. The application realizes intelligent identification, root cause quantification and accurate optimization of software performance bottlenecks.

This invention relates to an automatic generation method and system for control models in PSCAD simulation, belonging to the field of electromagnetic transient simulation and intelligent modeling technology for power systems. This method aims to solve the problems of low efficiency and error-proneness in manual modeling. Its technical solution includes: acquiring a transfer function system structure image and using a pre-trained deep learning model for detection; reading the type, coordinates, and parameter information of components in the image; automatically constructing the directed signal flow network relationship of the system; automatically generating Fortran code segments and model appearance based on this; compiling the code into a dynamic link library; integrating all generated content into a configuration file conforming to PSCAD specifications; and automatically generating a Web service interface providing upload and download functions. This method achieves end-to-end automatic generation from structure diagrams to simulation models, significantly improving modeling efficiency and accuracy, ensuring model consistency and reliability, and possessing strong engineering practicality.

Provided in the present application are a time protection method and apparatus, which can reduce system overheads. The method comprises: determining a first virtual timer and a first duration; and on the basis of the first duration, performing, by means of the first virtual timer, time protection on a first code segment corresponding to a system task, wherein the system task corresponds to a plurality of code segments, and the plurality of code segments comprise the first code segment.

Embodiments of the present disclosure provide a scheme for code generation. A method includes receiving a query indicative of a code generation problem; generating, using a target machine learning model, a first code segment based on the query and a prefix code, wherein the target machine learning model is constructed based on a language model and configured to iteratively generate code segments to form computer code for the code generation problem; determining, using a trained reward model, a first reward score corresponding to the first code segment based on an updated prefix code, the first reward score indicative of correctness of the first code segment with respect to the code generation problem, wherein the first code segment is appended to the prefix code to obtain the updated prefix code; and fine-tuning the target machine learning model based on at least the first reward score through reinforcement learning.

This application provides a code parsing method and apparatus, relating to the field of computer technology. The method is applied to an electronic device and includes: the electronic device can display a code project file in response to an open operation on the code project file. The electronic device can also obtain the abstract syntax tree (AST) of each code file within the code project file, where nodes in the AST correspond to fragment information of code segments within the code files. The electronic device can parse the code of the first type of nodes in the AST of the code files, and the target code fragments corresponding to the first type of nodes in the code files can be exported. The electronic device displays the first file in response to an open operation on the first file within the code files. Thus, in scenarios with large file sizes, parsing the first type of nodes representing target code fragments not only allows for the parsing of important content within the code file but also saves significant memory usage.

The dynamic SQL statement optimization method, device, storage medium and computer device provided by the application can determine all parameter descriptors and corresponding execution conditions in the dynamic SQL statement after obtaining the dynamic SQL statement to be optimized, and determine whether each parameter descriptor satisfies a pre-compiled condition. If not, the execution condition corresponding to the parameter descriptor in the dynamic SQL statement is deleted to reduce meaningless code of the dynamic SQL statement. If yes, the code segment containing the execution condition in the dynamic SQL statement is pre-compiled according to the parameter descriptor and the corresponding execution condition to reduce the use of complex syntax, for example, when the execution condition of the dynamic SQL statement contains in or not in, complex foreach code can no longer be written. The dynamic syntax optimization method adopted by the application has simple syntax and can reduce a large amount of meaningless code, thereby improving the coding efficiency of the dynamic SQL statement.

This invention discloses a compilation method, apparatus, electronic device, and storage medium. The compilation method can be applied to any party among multiple participants in vertical federated learning. The method includes: obtaining source code for vertical federated learning; the source code includes multiple code segments for implementing vertical federated learning and an executor identifier corresponding to each code segment, the executor identifier indicating at least one participant executing the code segment; for each code segment, generating a corresponding judgment statement based on the executor identifier corresponding to the code segment, the judgment statement determining whether the first participant is an executor of the code segment, so that when the judgment statement is executed, the result of the judgment statement determines whether to execute the code segment; and generating compiled code based on each code segment and the corresponding judgment statement. This method can reduce the complexity of source code development and the difficulty of later maintenance.

Provided in the present application are a data processing method and apparatus. The method comprises: on the basis of the number of X first segments, the maximum mother code length and the length of a second segment, performing segmentation on a sequence to be coded, so as to obtain X first segments to be coded and one second segment to be coded, wherein the length of each first segment is equal to the maximum mother code length, the length of the second segment is less than the maximum mother code length, the length of the second segment is a non-mother code length, and X is an integer greater than or equal to 0; respectively performing polar coding on the X first segments to be coded and the second segment to be coded, so as to obtain X first coded segments and one second coded segment, and performing rate matching on the second coded segment, so as to obtain a second coded segment that has been subjected to rate matching; and outputting the X first coded segments and the second coded segment that has been subjected to rate matching. A rate matching manner is determined without it being necessary to take into account a code rate corresponding to a second segment, thereby facilitating a reduction in the overall complexity of a system.

This application discloses a method, system, device, and storage medium for generating project documents. The method involves acquiring code data, parsing the code data to determine its structural information, and then mapping this structural information to corresponding positions within the code data. Based on the structural information, the code data is split into several code segments. A trained large language model is used to generate corresponding first descriptive text. Based on the first descriptive text for each code segment, the project document corresponding to the code data is obtained. This application generates project documents corresponding to code data automatically, reducing manual costs. Using a large language model to extract information from the code data and obtain the first descriptive text improves the efficiency of project document generation, reduces the probability of errors, and enhances the quality and usability of the project documents. The technical solution of this application can be widely applied in the field of code processing technology.

This application discloses a code review method and a computer program product. The method includes: obtaining target code and its description information; inputting the target code and description information into a code review model, and sequentially performing multiple review processes at different levels in ascending order of review level to obtain the review result of the target code; wherein, the review process includes reviewing the input of the review process based on the review indicators of the corresponding review level, identifying faulty code segments, the input of the first level of review process is the target code and description information, and the input of the remaining review processes is the faulty code segments output by the previous level of review process; the level of review is positively correlated with the severity of the fault represented by the review indicators corresponding to the review level. This method can effectively improve review efficiency while ensuring a comprehensive review of the target code and description information.

This invention relates to a large language model-based automatic battery health status assessment system and method. The system includes: a program knowledge base for storing State of Health (SOH) estimation algorithms; a data processing module for acquiring battery data, preprocessing it, and extracting features highly sensitive to SOH changes to form a feature set; a large language model module for receiving dynamic prompts, retrieving corresponding code segments from the program knowledge base based on the prompts, and generating a new SOH estimation algorithm using the large language model or modifying a parent SOH estimation algorithm in the program knowledge base; an evaluation sandbox for receiving the feature set and calling the new or modified parent SOH estimation algorithm for SOH estimation and evaluation; and an evolutionary controller module for controlling the evolutionary cycle of the SOH estimation algorithm and generating dynamic prompts. Compared with existing technologies, this invention has advantages such as automatic algorithm iteration.

This invention relates to a software defect localization and repair recommendation method based on code semantic vectors, comprising: acquiring the source code, failure execution information, and preset failure explanation conditions of the software to be tested; the preset failure explanation conditions including vector matching thresholds and stage order relationships corresponding to the failure input entry stage, the abnormal semantic generation stage, and the failure result formation stage; dividing the source code into multiple code segments, generating code semantic vectors for each code segment, and generating failure semantic vectors based on the failure execution information; determining a candidate code segment set based on a similarity threshold; performing responsibility shrinkage processing according to a preset removal order, deleting unnecessary segments and retaining necessary segments, identifying the retained code segments as defect localization results, and generating repair recommendations based on their code semantic vectors. This invention can reduce irrelevant repairs or superficial matching repair suggestions, improve the consistency between repair recommendations and actual failure causes, and improve the efficiency of software defect repair.

The application relates to a large model-based code search method, which comprises the following steps: obtaining a target code library to be searched; performing reasoning analysis on code segments in the code library through a code understanding intelligent agent, taking extracted semantic information as IOF data; converting the IOF data into a feature vector, storing the feature vector into an initialized vector database, and constructing a mapping index of an IOF field to an original code segment; analyzing the semantics of a user query through a query understanding intelligent agent and generating initial search metadata; performing preliminary search in the vector database based on the search metadata to obtain a candidate list; constructing an iterative search loop containing an evaluation intelligent agent, the evaluation intelligent agent judging the matching degree of the current candidate list and the query, if a termination condition is not reached, re-generating search metadata and performing incremental search; when the termination condition is met, performing semantic reordering on the accumulated candidate IOF data through a reordering intelligent agent, and finally outputting recommended code segment results.

The application provides a large language model-based deep learning compiler fuzzing method and system, the method comprising: generating multiple code segments capable of calling one or more specified deep learning APIs based on a large language model to form an initial code seed set for fuzz testing; extracting parameter passing constraints according to the documents of the specified deep learning APIs to obtain API constraint files; mutating the initial code seeds based on the API constraint files to obtain test code segments; and obtaining the test results of the deep learning compiler under test by comparing the compilation results of the test code segments in the deep learning compiler under test and a reference compiler. The application can find vulnerabilities in the deep learning compiler, ensure that the semantics of the mutated deep learning model are the same as those of the original model, and thus guarantee the correctness of downstream application programs.

Methods and apparatus manage data in memories disposed in a stacked relation with respect to one or more processors. The method includes receiving at least one hint indicating future processor usage of a software component, where the future processor usage is indicative of future usage of the one or more processors when executing the software component or a code section of the software component. In some implementations, the method includes selecting a memory location in the memories for data used by the software component based on the hint.