13 results about "Critical section" patented technology

The invention discloses a spin lock optimization method and electronic equipment, and the method comprises the steps: creating and initializing a spin lock structural body which comprises a lock holder pointer; when each thread obtains the spin lock, creating a corresponding request node structure body to form a waiting queue; in the waiting queue, determining spin lock holders in the plurality of threads based on the lock holder pointers; and after the processor core corresponding to the spin lock holder executes the critical zone code of the corresponding thread, traversing the waiting queue, reading the critical zone function pointer of each waiting node, and sequentially executing the critical zone code in each request node structure body on the current processor core based on the critical zone function pointer. According to the method, the performance bottleneck of a traditional spin lock in a multi-core environment is broken through, all-around optimization of cache consistency overhead, queue delay, energy efficiency ratio and multi-core expansibility is achieved, and the performance of the spin lock in the multi-core processor environment is remarkably improved.

The invention provides a Spring Session performance optimization method based on partition cache, and relates to the technical field of session management and cache optimization in a distributed system, and the method comprises the steps: storing a mapping relation between a session ID and a final access timestamp by designing concurrent hash mapping caches C1 and C2 which are alternately used, and identifying an active cache by using a current cache label; configuring a timed task to periodically scan the cache, judging a session state according to the critical zone time, and dynamically updating or cleaning cache data; a session object obtained by a thread local variable cache Redis is introduced in Http request processing, so that repeated access is avoided; and a Spring session filter and a warehouse are rewritten to reconstruct session access logic, so that the dependence on Redis is effectively reduced, and the concurrency performance and response efficiency of the system are improved.

This invention belongs to the field of computer system software technology, specifically relating to a method for protecting high-frequency critical resources in embedded real-time operating system device management. It improves the efficiency of concurrent execution of multi-core programs in high-frequency critical sections of device management when acquiring file descriptor driver information, reduces the proportion of programs that cannot be executed concurrently in critical sections, and enhances the concurrent execution capability of multi-core programs in high-frequency critical sections of device management while ensuring the multi-core determinism of programs. This brings a significant performance improvement to operating system device management.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for implementing critical section subgraphs in a computational graph system. One of the methods includes executing a lock operation including providing, by a task server, a request to a value server to create a shared critical section object. If the task server determines that the shared critical section object was created by the value server, the task server executes one or more other operations of the critical section subgraph in serial. The task server executes an unlock operation including providing, by the task server, a request to the value server to delete the shared critical section object.

The invention provides a method for reading and writing data. The method comprises the steps of judging whether first data in a critical zone resource has an atomic mark or not based on a read instruction for the first data in the critical zone resource; if the first data in the critical zone resource has the atomic mark, copying the locked first data in the critical zone resource so as to generate second data in a non-critical zone resource aiming at the first data, and reading the second data in the non-critical zone resource; or if the first data in the critical zone resource does not have the atomic mark, reading the second data in the non-critical zone resource.

The invention discloses a power system multi-scene key section identification method and system considering flexible resource transmission limitation, and relates to the technical field of power system fault detection. Calculating power grid power flow after flexible resources respond to new energy fluctuation through an alternating current power flow method; generating a key section identification index based on a power flow expected value, a power flow overload probability and a fault influence index of a power grid power flow calculation branch; and sorting all branches according to the key section identification index, and selecting the branch with the top sorting as the key section of the power grid. The method is used for solving the problem that the key section recognition accuracy is insufficient because the uncertainty of new energy and the flexible resource effect are not considered in the existing method.

This application provides a method and system for preventing task starvation. The method includes: acquiring a set of tasks in kernel mode that hold critical section resources awaiting high-priority tasks; performing execution flow truncation on the tasks in the task set, including: dynamically counting based on the length of the critical section release instruction, determining the address of the core execution instruction for critical section release corresponding to the task, constructing the minimum kernel stack of the task, and modifying the program counter pointer and stack pointer of the task to interrupt the original execution flow of the task; and performing targeted release of critical section resources of the task after execution flow truncation based on the dynamic counting of the length of the critical section release instruction. By separating the task execution flow from the resource release operation, this application enables low-priority tasks to release critical section resources without being dependent on the advancement of their own complete business logic, thus achieving batch release of resources for multiple low-priority tasks holding different critical section resources.

The application discloses a kind of real-time performance bottleneck information acquisition method, device, terminal and storage medium, belong to real-time performance technical field, the method includes: using the kernel probe of being hung on each kernel critical section protection operation function to obtain abnormal event basic information;With resource kernel probe is hung on preset resource tracking function, event resource information is extracted using resource kernel probe;For abnormal event basic information and event resource information establish association;Using the abnormal event basic information and event resource information generates process relationship topological graph.It is convenient for developer to quickly understand the complex interactive state of system through topological graph, and locate the center point of abnormal cluster. It can comprehensively capture the related information of delay exception, and it is convenient for developer to quickly and accurately locate the real-time performance bottleneck point.

In a method for managing mutual exclusion access to a critical section in a multi-core processor, the multi-core processor includes cores. The step of managing the cores to access a critical section by the multi-core processor includes only one of the cores is allowed to access the critical section at given time and the next thread on the core that is allowed to access the critical section for accessing the critical section is designated.

The embodiment of the invention provides a data processing method and computer equipment, which can be applied to the field of data processing, and comprises the following steps: when a reader calls an interface entering a read critical zone, updating a local first variable (representing whether the reader enters the read critical zone) of the reader to a second state, the read critical zone is configured to enable the recoverer to determine an end moment of the grace period based on the first variable, and execute the read critical zone under the condition that a second variable (representing whether the recoverer is in a state waiting for all readers to leave the grace period) local to the reader is a third state. According to the method, the useless hardware memory barrier is eliminated by additionally adding two variables in each reader, and the timely recovery of the memory is realized. According to the method, the hardware memory barrier is executed only when the recoverer exists, and the read critical zone is directly executed when the recoverer does not exist, so that the execution times of the hardware memory barrier are reduced through the on-demand execution mode, and the performance overhead of the hardware memory barrier in a normal path is avoided while the correctness is ensured.

The present specification relates to the technical field of integrated circuits, and particularly relates to a multi-core system atomic instruction scheduling method, system and device, the method comprising: determining an atomic instruction near-end execution reliability index according to the number of times of successful near-end execution of the atomic instruction in a historical period; scheduling an execution position of the atomic instruction in a hierarchical cache according to the hit condition of to-be-processed data in the hierarchical cache, the data exclusive state of the to-be-processed data and the atomic instruction near-end execution reliability index, to obtain a scheduling execution result; and updating the atomic instruction near-end execution reliability index according to the scheduling execution result. The application can perceive the competition degree of access to a critical section in a multi-core scenario, dynamically adjust atomic instruction near-end execution and remote execution according to the system atomic instruction execution state, and improve the atomic instruction execution efficiency.

This invention discloses a method for selecting critical sections of a power grid based on source-load coupling, relating to the field of power grid system dispatching technology. The method includes: calculating the source-load coupling strength based on regional output and regional load; performing power flow calculations on N-1 and N-2 fault sets to obtain fault power flow values, and calculating preset section parameters and fault propagation correlation matrices; selecting preliminary sections based on preset section parameters and preset state screening rules; calculating the disconnection criticality score of the preliminary selected sections based on the source-load coupling strength, preset section parameters, and section fault propagation correlation matrix, and then selecting critical sections of the power grid. This invention addresses the problems in existing technologies that fail to consider the dynamic coupling relationship between source-load fluctuations and fault power flow, and that rely solely on a single load rate during the critical section selection and evaluation process, resulting in severely insufficient risk coverage.

The application discloses a spin lock optimization method and electronic equipment, the method comprises the following steps: creating and initializing a spin lock structure, wherein the spin lock structure comprises a lock holder pointer; when each thread acquires the spin lock, a corresponding request node structure is created to form a waiting queue; in the waiting queue, the spin lock holder in the plurality of threads is determined based on the lock holder pointer; after the spin lock holder executes the critical section code of the corresponding thread on the processor core corresponding to the spin lock holder, the waiting queue is traversed, the critical section function pointer of each waiting node is read, and the critical section code in each request node structure is executed in turn on the current processor core based on the critical section function pointer. The method of the application breaks through the performance bottleneck of the traditional spin lock in the multi-core environment, realizes all-round optimization of cache consistency overhead, queue delay, energy efficiency ratio and multi-core expansibility, and significantly improves the performance of the spin lock in the multi-core processor environment.