111 results about "Debugger" patented technology

Providing issue resolution in a cluster system by monitoring system operation to detect occurrence of a system error, and automatically generating, upon detection of the error condition, a core file for a user node. The core file captures a current memory state of a respective node, where the current memory state comprises system statistics, system information, and logs. An intelligent core debugger extracts information from a core file to generate a core file report that is sent to a vendor for a quick determination of whether sufficient information is in the report to allow the vendor to recommend a fix, or whether further information from is required, including the core file itself, if necessary. This prevents the need to send an entire core file to a vendor in every instance of a system fault.

The utility model relates to an MCU simulation debugger with high-voltage isolation protection. The MCU simulation debugger comprises a USB power supply communication circuit module, a first DC step-down circuit, a DC-DC power isolation module, a second DC step-down circuit, a main control chip minimum system, a burning code external storage FLASH control circuit, an off-line burning BURN key detection circuit, a JTAG simulation / IIC burning interface isolation module and a three-section dial switch. A dial switch state detection module; and a machine burning control interface. The JTAG simulation / IIC burning interface isolation module realizes 1500Vrms electrical isolation of a debugging board card and simulator equipment, online simulation debugging of resistance product firmware can be realized, and a software developer does not need to care about the electrical isolation condition of the debugging board card and only needs to concentrate on debugging codes; multi-interface and multi-level high-speed simulation and burning are supported, level switching of a debugging board card is rapidly achieved through a dial-up gear, and the level compatibility of the simulator is improved.

The invention discloses a chip prototype verification method and device, a medium and a product, relates to the technical field of chip design, is applied to a hardware debugger of a simulation test tool, and comprises the following steps: analyzing a capability maturity model script; the analyzed script and the execution mode switching condition are sent to a central processing unit of the field programmable gate array, so that the central processing unit determines a current execution mode according to the analyzed script and the execution mode switching condition; test case codes of different execution modes in the capability maturity model script are stored in different data areas of a preset memory pool respectively, so that a central processing unit obtains the corresponding test case codes based on the current execution mode, verification data are generated according to the test case codes and peripheral equipment of a pre-configured chip, and the verification data are stored in the preset memory pool; returning the verification data to a hardware debugger of the simulation test tool; and generating a prototype verification report based on the verification data and the expected data to complete chip prototype verification. And chip prototype verification can be realized by dynamically switching verification modes.

Some embodiments find locations of targets which are related to a symbol in a source code snippet, when the snippet is external to a project codebase. Finding a target's location allows user-directed or proactive automatic navigation from the symbol into the codebase, display of data type, signature, and other semantic information of the symbol, proactive automatic creation of an import statement for a definition of the symbol, and other utilizations of the target location in an enhanced editor or enhanced debugger or another tool. In some scenarios, the external snippet is generated by an artificial intelligence agent, using part of the codebase as context. Some embodiments find a target of an external snippet's symbol in another external snippet, allowing a tool utilization that is informed by the project codebase even when both snippets are outside the project codebase.

The invention relates to an embedded chip simulation and debugging method and system. The method comprises the following steps: expanding an instruction decoding module, a register description module and a breakpoint management module which support a C28x instruction set in a GDB debugger, and generating a special debugging front-end program; the method comprises the following steps: expanding a C28x JTAG protocol adaptation module in an OpenOCD debugging agent, and generating a debugging agent program; a C28x instruction set execution simulation unit is realized in the NEMU simulator, and a GDB Server communication module is embedded in the NEMU simulator; seamless switching between a simulation debugging mode and a hardware debugging mode is realized based on a unified configuration file through a software and hardware debugging environment rapid switching control module. The problems that a traditional debugging mode depends on a special hardware simulator, the cost is high and the simulation environment is inaccurate are solved, and through an integrated software and hardware collaborative debugging scheme, the debugging cost is greatly reduced, and the development efficiency and the comprehensiveness of system verification are improved.

Disclosed are systems and methods for debugging program code using a computing system. The disclosed method includes designating a control point in a software application subject to a debugging procedure, and then executing the program code for the software application as a guest application executing within a virtual machine. Upon detection of a virtualization event, the hardware processor transfers program control to a hypervisor which then determines whether the virtualization event corresponds to the designated control point based on an execution state of the guest application. If so, the virtualization event handler may generate a debugging event that is used by a debugger.

According to various implementations, a method for learning a state machine of a program is described, comprising: executing a state machine learning algorithm by means of a host computer system, in which the host computer system controls an embedded system via a debug interface by means of a debugger such that the embedded system executes the program multiple times, and wherein the host computer system, for each execution of the program, detects whether a program segment that has not been reached when a previous program is executed has been reached when the program is executed; and if this case is detected, determining, at least for some of these cases, an input to the program that is not provided to the program by the host computer system and causes the program to reach the program segment, by the host computer system determining, by means of a debugger, a storage area in the memory of the embedded system in which the input is written, the storage area is read out and the determined input is added to an alphabet of a state machine learning algorithm.

A power state framework executes a workload in supported computing device types and configurations during a sequence of power state transitions to simulate user experiences. Workloads can be combined, e.g., default workload plus add-on workload(s). Device states are monitored, collected, reported, and analyzed to identify faults, which are prioritized for repair, e.g., based on the projected impact of the faults on users, e.g., if the users were to experience the faults. Computing device states include states of attached peripheral devices and wireless or wired connectivity before and after power state transitions. Device state indicates device stability throughout supported device power state transitions. Devices under test can be on debuggers during execution of workload and power state transitions. Automated, accelerated simulation of the execution of end user workloads and power state transitions in actual computing devices saves time and avoids replication errors compared to manual user-driven device testing.

This invention relates to the technical field of program burning, and discloses a wireless SWD debugging and burning system and method for a collaborative arm. The wireless SWD debugging and burning method, applied to an SWD debugging and burning device, specifically includes the following steps: S101: Receiving a debugging and burning command sent by a host computer, and setting the embedded pins on the wireless debugging adapter of the ESP32 module. This invention, through a wireless gateway and software protocol simulator built around the ESP32 module, successfully upgrades the debugging and burning link, which previously relied on physical cables and dedicated hardware debuggers, to a fully wireless method. This eliminates the need for technicians to disassemble the device casing for each operation, completely avoiding mechanical wear and sealing failure caused by repeated disassembly and reassembly.

The invention relates to a software fault diagnosis method for an electronic control unit, and the method comprises the steps: monitoring the operation state of software in the electronic control unit based on a watchdog timer, and when the software does not reset the watchdog timer within a preset timeout period, starting the watchdog timer; generating a timeout event, triggering a non-maskable interrupt associated with the timeout event, and executing a corresponding interrupt service program to capture software context information at a fault moment; storing the software context information to a predetermined memory area, wherein the content of the software context information is kept after the electronic control unit is reset; and after the electronic control unit is reset, reading the software context information stored in the predetermined memory area through a communication interface. The method has the effect of automatically and reliably capturing the high-value underlying software context information at the moment of fault occurrence under the conditions that a debugger does not need to be physically connected and the fault does not need to be reproduced.

The invention provides a common debugging method and system for a source code, a byte code and a target code, and belongs to the field of computers, and the method comprises the steps that S1, the source code is converted into the byte code; acquiring a corresponding relationship between the source code and the byte code, and combining the byte code with the source code through the row and column numbers to generate a new source code file; s2, merging the line number information of the source code and the line number information of the byte code to form a new line number; adding the new line number as debugging information to the debugging instruction to obtain an adjusted debugging instruction; s3, when the adjusted debugging instruction is used for debugging the source code file, displaying source code and byte code information at the same time; and an instruction is newly added and is used for performing single-step debugging on the byte code. According to the method, by modifying the debugging information and enhancing the debugger, mixed debugging of the source code, the byte code and the target code is supported at the same time.

The embodiment of the invention discloses a code debugging method and device, equipment and a medium, and relates to the technical field of computers. According to the code debugging method, the target simulation environment and the debugger of the target compiler are integrated, and the debugger of the target compiler can be directly called in the simulation running process to conduct real-time and source code level step-by-step debugging. Moreover, developers can set the breakpoint at the specified position of the source code in the target compiler, and when the source code runs to the breakpoint, the source code is directly debugged through the debugger of the target compiler, so that the problem positioning efficiency and the problem processing efficiency are improved, and the overall development efficiency is improved.

The embedded firmware hybrid symbolic execution test system, method, device and medium provided by the embodiments of the present disclosure comprise an initial converter, a symbolic execution virtual machine and a peripheral debugger; the initial converter fuses high semantic source code and low semantic assembly code in semantics to obtain a hybrid semantic IR file; the symbolic execution virtual machine finds a plurality of behavior paths included in the hybrid semantic IR file and state information of nodes included in each behavior path through a symbolic variable, and generates a test case corresponding to each abnormal trigger node according to the abnormal trigger nodes of the plurality of behavior paths; and the peripheral debugger reproduces and analyzes a test problem according to the test case. The engineering value of test vulnerability verification is improved.

The invention provides an on-chip debugging method, an on-chip debugger, an on-chip debugging system and a storage medium, the method is applied to the on-chip debugger, debugging component resources are pre-configured in the on-chip debugger, and the debugging component resources comprise hardware debugging function components corresponding to different debugging target hardware platforms respectively. The method comprises the steps of obtaining a debugging instruction, wherein the debugging instruction comprises hardware platform attribute information of a debugging target; according to the debugging instruction, target debugging function components are determined from the debugging component resources, the target debugging function components comprise a first target debugging function component, and the first target debugging function component comprises a hardware debugging function component matched with hardware platform attribute information of the debugging target; and based on the target debugging function component, debugging the debugging target. According to the scheme, the on-chip debugging efficiency can be remarkably improved.

A software service such as a daemon monitors traffic at virtual com ports of virtual machines to facilitate debugging of virtual functions in real time as the virtual functions take turns using a hardware resource in round-robin fashion. If the daemon detects that a kernel debugger has initiated a kernel debugging session for a particular virtual function via the com port, the monitor halts world switching between virtual functions allocated to the hardware resource. The daemon makes the virtual function indicated by the kernel debugger the active partition while the kernel debugger reads one or more registers of the hardware resource allocated to the virtual function. When the kernel debugger has completed reading the register(s), the daemon signals the host to resume world switching between the virtual functions.

The invention discloses a reverse debugging increment recording method based on dynamic layering and predictive filtering, which comprises the following steps of: analyzing a binary file division region of a target program, establishing a global region mapping table among an address range, a region type and debugging attributes, executing the binary file by a reverse debugger, constructing a first mapping table for modifying a record circular queue, according to the global region mapping table, performing differentiation recording on the region to form a first record, a stack frame snapshot, a second record and a register block snapshot, and performing repeated coverage filtering to reduce the recorded data volume to form an execution state track; and performing intelligent compression on stack frame snapshots, heap memories, global variable records, register snapshots and variable values in the execution state trajectory, and finally forming a low-overhead and accurate execution state trajectory to support reverse debugging backtracking.

A power state framework executes a workload in supported computing device types and configurations during a sequence of power state transitions to simulate user experiences. Workloads can be combined, e.g., default workload plus add-on workload(s). Device states are monitored, collected, reported, and analyzed to identify faults, which are prioritized for repair, e.g., based on the projected impact of the faults on users, e.g., if the users were to experience the faults. Computing device states include states of attached peripheral devices and wireless or wired connectivity before and after power state transitions. Device state indicates device stability throughout supported device power state transitions. Devices under test can be on debuggers during execution of workload and power state transitions. Automated, accelerated simulation of the execution of end user workloads and power state transitions in actual computing devices saves time and avoids replication errors compared to manual user-driven device testing.

The present disclosure relates to the technical field of computer, and particularly relates to a trap management device, a processor, a chip and an electronic device, which comprises: at least one processing core configured to execute a thread; a processor trap management unit coupled with the at least one processing core; and an interrupt reporting unit coupled with the processor trap management unit; wherein: the processing core suspends execution of the thread and reports a trap event to the processor trap management unit in response to the thread executed therein satisfying a trap condition; and the processor trap management unit performs coordinated management and triggers the interrupt reporting unit to report an interrupt to an external debugger in response to receiving the trap event. According to the embodiment of the present disclosure, the resource utilization efficiency of the processor in a debugging or monitoring scenario can be effectively improved.

A debugging method and an electronic device relate to the technical field of computers, and dynamically call a debugging interface of a second programming language by registering the debugging interface of the second programming language in a first programming language debugger, thereby obtaining call stack information and variable information of the second programming language, setting breakpoints, modifying variables and the like. In the method, the electronic equipment displays a debugging interface of a debugger adaptive to a first programming language, and loads a service program which is subjected to mixed programming by adopting the first programming language and a second programming language to test equipment. A runtime debugging interface is configured in the runtime matched with the second programming language. During debugging, when a service process runs to a first service code segment obtained by programming of a first programming language, a debugging breakpoint is entered, and the electronic equipment calls a runtime debugging interface through a debugger registered with the runtime debugging interface; and executing debugging processing operation on a second business code segment obtained by programming in the business program loaded by the test equipment by adopting the second programming language.

1. Name of the product in this design: Circuit board debugger housing. 2. Purpose of this design: Housing for a circuit board debugger. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: 3D view 1.

The present invention provides a method for implementing a single-chip microcomputer debugger based on a CDB file and an MI interface, comprising reading a CDB file; parsing the CDB file according to various information records obtained, and storing various information required for debugging contained in the CDB file in various structures; implementing a debugger debugging command function according to emulator debugging command parameters; implementing an MI interface command in a main program of the single-chip microcomputer debugger; waiting for a user to input an MI interface debugging command; parsing the MI interface debugging command input by the user, sending the encapsulated debugging instruction to the single-chip microcomputer emulator via a TCP protocol, and receiving a debugging result returned by the single-chip microcomputer emulator; returning the encapsulated MI format data to the user via the MI interface; and continuing to wait for the user to input an MI interface debugging command, thereby forming a closed-loop debugging process. The application of the present invention can simplify the integration process of the debugger and the IDE, reduce the difficulty for the user to use the single-chip microcomputer debugger, and improve the efficiency and effect of the debugging process.

The invention discloses a control method and device of an offline burner, electronic equipment and a storage medium, and relates to the technical field of chip firmware burning. The control method comprises the steps that a mode indication instruction is obtained from the secure digital card, a current execution mode is determined based on the mode indication instruction, the current execution mode comprises a programming mode and a reading mode, and if the current execution mode is the programming mode, target programming indication information is obtained from the secure digital card, and then acquiring firmware to be burnt from the secure digital card based on target burning indication information, and burning the firmware to be burnt to a target chip connected with the control chip. Thus, the current execution mode is automatically recognized, when the current execution mode is the programming mode, the firmware to be programmed is automatically programmed to the target chip, a professional debugger does not need to be connected in the programming process, the firmware does not need to be connected to a computer end, off-line programming is achieved, and therefore the programming efficiency is improved.

A method for blocking external debugger application from analysing code of software program installed on computing device. The method including initializing software program including an application program and an internal debugger application. The software program, upon initialization thereof, instructs internal debugger application to load application program in internal debugger application. The internal debugger application is configured to utilize kernel resources of an operating system of the computing device. The method includes executing internal debugger application to set one or more break-points in code of application program to define execution path for code of application program, executing application program as per defined execution path for code thereof, stopping execution of code of application program upon reaching any of one or more break-points therein, and handing control to internal debugger application to provide an address for next instruction to be executed in defined execution path for code of application program.

This invention provides an interactive software debugging and automatic repair method based on a large language model, addressing the problems of traditional software debugging relying on manual operation and being time-consuming, as well as the low repair accuracy caused by the lack of a dynamic operating environment in existing static automatic program repair technologies. The method first triggers a program exception by executing a reproduction command and captures the original crash stack information; then, it uses a large model to extract a simplified core function call sequence; subsequently, it constructs a closed-loop debugging mechanism, controlling the large model to generate hypotheses about the root cause of the defect and executing debugger probe commands, iteratively revising the hypotheses based on the dynamic information obtained by the debugger until the defective code is accurately located; finally, it combines the debugging context with the large model to complete root cause analysis and automatically generate and verify executable repair patches. This invention alleviates the "illusion" of large model inference by continuously capturing the underlying dynamic operating state, significantly improving the automation and accuracy of defect repair.

A method for debugging an autonomous driving application includes setting a line breakpoint in a line of source code of the application; setting a trigger condition relative to simulation data of a simulator executing the application; running the application by a debugger for debugging the application; and pausing running of the application by the debugger based on the line breakpoint being reached and the trigger condition being hit.

This application relates to a data storage method, system, apparatus, debugger, medium, and product. The method includes: converting real-time program execution data conforming to a first communication protocol output by the device under test (DUT) into program execution data conforming to a second communication protocol; the first communication protocol is a protocol for testing the DUT, and the second communication protocol is a protocol adapted to a computer device; the program execution data is execution data fed back by stub programs in the test program of the DUT, and multiple stub programs are pre-set at key program locations in the test program of the DUT through stub insertion; storing the program execution data conforming to the second communication protocol in a storage module, so that a computer device can obtain the program execution data conforming to the second communication protocol stored in the storage module. This method can improve the reliability of DUT testing.

The application discloses a chip and a chip debugging system, and relates to the technical field of chip debugging. The chip comprises a controller, a reset signal generating unit, an instruction receiving unit, an interface multiplexing unit, a debugging module, a functional module and a general interface. The general interface is used for connecting with a debugger, and the instruction receiving unit is connected with the general interface. The reset signal generating unit is used for generating an effective first reset signal and a second reset signal. The release time of the first reset signal is earlier than the release time of the second reset signal. The instruction receiving unit is used for detecting whether an instruction sent by the debugger is received after the release of the first reset signal and before the release of the second reset signal. When the instruction receiving unit receives the instruction, the instruction receiving unit controls the interface multiplexing unit to select the general interface and the debugging module. When the instruction receiving unit does not receive the instruction, the controller controls the interface multiplexing unit to select the general interface and the functional module. According to the application, no additional multiplexing control pin is needed, and flexible multiplexing of a debugging interface and a functional interface is realized.

The invention discloses an ST language debugging method based on LLVM debugging information and a GDB / MI interface, and relates to the technical field of language development, and the method comprises the steps: carrying out the lexical analysis, grammatical analysis and semantic analysis of an ST source code through an ST language front-end analyzer, and generating a middle presentation layer of an LLVM; encoding the debugging metadata into a debugging information segment in a debugging information recording format, and compiling the debugging information segment and other machine codes into an executable file; the ST debugger starts the GDB through the process control interface and loads the executable file, and the debugging information segment is analyzed through the GDB; the ST debugger sends the debugging command to the GDB through the MI interface, and the GDB debugs the executable file after receiving the debugging command; and the ST debugger receives the feedback information to perform MI interface response analysis. The universal debugging method supports source-level debugging of a universal debugger on a program, improves debugging availability and expansibility, and is irrelevant to a platform and complete in function.

The application belongs to the technical field of device debugging, and relates to a general debugger of a computing device, a debugging system and a debugging method, wherein the debugging method comprises the following steps: a debugging host computer acquires input information and sends the input information to the general debugger; the general debugger performs debugging verification on the input information to determine debugging information; the general debugger selects a bus interface according to a bus type field of the debugging information; the general debugger performs register read and write on the computing device by using the bus interface, and generates debugging result data; and the general debugger acquires the debugging result data and sends the debugging result data to the debugging host computer. The application can independently debug the computing device by using the general debugger; the debugging function can be used to acquire the running condition of a connected device at an interface end of the debugging device; one set of bus interfaces can be used to simultaneously acquire all information of all on-board devices and all machine modules of the computing device, and the application is not limited by different chip address widths and different positions of the chips on the bus.

In some aspects, a method of enhancing security of a computing application. The method includes establishing, by a debugger blocking module of the computing application, a connection to a debugger port associated with the computing application to block other connections to the debugger port. The method further includes determining, by a bypass check module of the computing application, that the debugger blocking module has been modified. The method further includes, responsive to the determining that the debugger blocking module has been modified, performing, by the computing application, one or more actions to protect the computing application from debugger access.