148 results about "Circular buffer" patented technology

A low-delay multi-protocol intelligent lighting synchronization system based on a unified abstraction layer comprises the steps that an instruction from a multi-protocol bridging module is received, and network round-trip time data of terminal equipment is acquired through an active detection mechanism; based on the network round-trip time data, adopting a Kalman filtering algorithm to construct a delay prediction model so as to predict the future network delay of the terminal equipment; inputting the instruction into a third-stage buffer area for processing, and dynamically adjusting the trigger frequency of the active detection mechanism according to the load state of the third-stage annular buffer area; calculating queue delay of the buffer area according to the received load state of the buffer area, and obtaining final sending time of the instruction in combination with future network delay of the terminal equipment; and at the final sending time, sending the instruction from the sending buffer area to the corresponding terminal equipment. According to the system, low-delay and high-stability synchronization of cross-protocol equipment in the field of intelligent illumination is realized.

A smart shopping cart identifies items using cameras and sensors. The cart captures images of items within its storage area and applies machine-learning models, such as a barcode detection model, an OCR model, and an image embedding model, to generate identifier predictions. These predictions are processed using an efficient selection algorithm, which may involve majority voting, weighted voting, or linear regression, to select the most accurate identifier. The cart updates its display and user interface with the identified item. The process may be performed primarily by the CPU to enhance computational efficiency, avoiding the latency associated with GPU data transfer. Additional techniques, such as circular buffers and frame skipping, are employed to further optimize resource usage.

The embodiment of the invention discloses a multi-process-based real-time multi-path camera synchronization method and system, according to the embodiment of the invention, frames with the same time are paired according to timestamps, real-time unified processing of multi-path incoming frames is realized through a shared memory circular buffer area, each camera acquires the frames in an independent process and attaches the timestamps, and the real-time synchronization of the multi-path cameras is realized. And interacting data through a shared memory circular queue, and dynamically matching frames according to a timestamp by a synchronization process. Compared with an existing scheme, data interaction real-time performance is improved through shared memory zero copy, synchronization precision is improved through timestamp matching and dynamic error control, expansibility is enhanced through a multi-process parallel framework, the precision and real-time performance of multi-camera data synchronization are greatly improved, and the method is suitable for large-scale popularization and application. The requirement of three-dimensional reconstruction for multi-view data time consistency is met through targeted optimization, high efficiency and accuracy of subsequent three-dimensional reconstruction and data processing are ensured, and synchronization precision and real-time performance are remarkably improved.

The invention discloses a localization-adaptive track point visual rendering method based on partitioning and hierarchical caching, and the method comprises the steps: S1, inputting a track data stream, carrying out the reading according to the source type of the data stream, and carrying out the data partitioning and LOD processing of the track point data; s2, performing data analysis and rendering on the data; s3, carrying out batch processing on GPU vertexes, according to the state of the circular buffer, if the vertexes are writable, incrementally writing vertex data, and if Wrap is needed, carrying out loopback writing and updating a pointer; and S4, finally, the descriptors and the styles are updated, rendering increment drawing is carried out on the track points, and visual display is carried out. The method supports real-time rendering and playback of ten-million-level track points, has visual and instantiated rendering of window dynamic loading, space-time partitioning, hierarchical caching and WebWorker decoupling calculation, and improves the space-time data rendering capability of the domestic autonomous controllable field by ten thousand times; and the user experience is greatly improved by a non-perceptual interaction and transition smoothing algorithm.

The invention discloses a local data security storage method for a non-networked vehicle, which comprises the following steps of: setting a vehicle-mounted MP5 (Mobile Pentium 5), and storing local data through the vehicle-mounted MP5; setting a three-level storage architecture for the vehicle-mounted MP5, and storing vehicle static information into a configuration data area; storing the operation parameters into a runtime data area according to a time sequence; storing the fault event into an event data area; implementing a hierarchical encryption strategy on data, performing full disk encryption on storage equipment, performing independent file encryption on sensitive data files, and implementing additional character encryption on key fields; an encryption key is derived based on a vehicle VIN code and a user PIN, a circular buffer management mechanism is established, and a secure data export interface is provided. According to the invention, the confidentiality, integrity and availability of vehicle local data can be improved, and the safety and reliability of vehicle data storage are improved.

The invention discloses an intelligent electric meter sensor sensing control method and system based on an improved algorithm, and relates to the technical field of intelligent electric meter sensor sensing control, and the method comprises the steps: setting an MCU timer to be in an automatic heavy load mode, starting interruption, carrying out the dual-channel scanning of CT / PT, taking a mean value as static bias, and presetting a spine elimination threshold value. And correcting the fluctuation threshold in real time, adaptively switching the resolution according to the interference intensity, and synchronously collecting data and storing the data in an annular buffer area. And performing single-frame median rejection, resampling when the deviation of continuous frames exceeds the limit, and accumulating residual energy in a sliding window through median filtering and self-adaptive low-pass filtering. And dynamically adjusting the noise covariance based on residual statistics, and outputting a high-confidence current / voltage estimated value through lightweight Kalman filtering. And mapping the normalized error energy into a perception behavior of CT / PT. According to the invention, adaptive optimization can be realized under different load conditions in an environment with static resolution and bandwidth setting.

The invention provides a pre-crash log pre-freezing method of an embedded system and related equipment, and relates to the technical field of embedded systems.The method comprises the steps that running logs of the system are collected, after log content of a plurality of time slices is obtained, difference calculation and compression are conducted, and incremental compression slices are obtained; writing the incremental compression fragments into a first circular buffer area and a second circular buffer area which are circularly stored according to a preset condition; and when a crash early warning event is monitored, writing the latest incremental compression fragment in the first circular buffer area or the second circular buffer area into a pre-configured RAM (Random Access Memory) through a Zab protocol. Through combination of a double-buffering mechanism and a Zab protocol, complete storage of the running log can be completed before crash, reliability and integrity of log content are guaranteed, and through difference calculation and incremental compression, storage occupation and processing time are greatly reduced, and recovery speed and accuracy after system crash are improved.

Processor-to-processor communication is provided by using a non-cache-coherent disaggregated memory. The communication between a first processor and a second processor uses a pipe with three circular buffers (rings): a first ring at a first memory of a first computer that includes the first processor, a second ring at a second memory of a second computer that includes the second processor, and a third (shared) ring at the disaggregated memory that is shared by the first and second processors. The first processor uses the pipe to write a descriptor (containing the data and an ownership value) to the shared ring, and the second processor performs a polling process to determine if the ownership value corresponds to the second processor so that the second processor can act on (e.g., copy and modify) the data in the descriptor.

This application relates to the field of IoT smart devices and provides a method for linking a pet collar and a feeder. The method includes: controlling the pet collar as a Bluetooth beacon to broadcast data packets with a preset transmission power and preset period; controlling the feeder to initiate Bluetooth passive scanning, listening to the broadcast channel according to preset scanning parameters, and performing format filtering and signal strength value threshold filtering after receiving data packets; storing the media access control address, signal strength value, and timestamp of the corresponding pet collar into a local fixed-capacity circular buffer queue after the format filtering and threshold filtering are passed; controlling the feeder to perform verification at a preset period, clearing historical data exceeding a preset valid duration in the circular buffer queue; when all data corresponding to the pet collar in the circular buffer queue is cleared, determining that the pet has left the area, reporting a record containing the corresponding media access control address, current UTC, and cumulative presence time, and triggering a preset linkage action.

The invention discloses an abnormal information dump method of an embedded multi-core operating system, which comprises the following steps of: in an initialization process of an abnormal dump module, creating an abnormal information annular buffer area, and configuring an abnormal information dump mode at the same time; on the premise that the system log information with the abnormal information is output to the abnormal information annular buffer area, the printk interface is re-hooked and defined; when a system is abnormal, an abnormal event is converted into an abnormal vector, an abnormal processing function is called, the output content of the abnormal processing function is transmitted through a printk interface, the abnormal information annular buffer area is output to a specified address or file according to a configured abnormal information unloading mode, and one-time abnormal information annular buffer area emptying operation is achieved. The problem that the system debugging information is difficult to obtain under the condition that no serial port exists in an actual application environment is solved.

The invention discloses a long-time filtering control method and device for analog quantity signals, and relates to the technical field of signal processing, and the method comprises the steps: constructing a circular buffer structure with the length of N as a historical data queue, and storing sampling values according to a PLC scanning period; based on the queue, calculating a filtering output value by adopting a weighted recursive average filtering algorithm; calculating a mean value and a standard deviation of the queue data in real time; comparing the current sampling value with a dynamic threshold range determined based on the mean value and the standard deviation, and if the current sampling value exceeds the dynamic threshold range, determining an abnormal value; when an abnormal value occurs, the value is discarded, the queue is not updated, and a filtering value of the last period is output as a current result, the defect that a traditional PLC filtering method is difficult to process long-time signal abnormity is effectively overcome through the circular queue with the adjustable time window and by fusing dynamic weighted filtering and a self-adaptive abnormity cleaning mechanism, and the filtering accuracy is improved. And the anti-interference capability and the reliability of the industrial control system are obviously improved.

The application provides a multi-sensor image and position attitude information synchronous transmission method, and belongs to the technical field of embedded systems. A system control unit acquires time from an upper computer through a network time protocol, and performs time synchronization with each sensor through a second pulse signal. The system control unit sends an external trigger signal to control sensor imaging, and records current time, position attitude and angle data to a circular buffer queue. When the sensor is imaging, the exposure time is superimposed on the image. An image processing unit parses the exposure time from the image and compresses the image, and then sends the image and the exposure time to the system control unit. The system control unit searches for corresponding position attitude and angle information from the circular buffer queue according to the nearest neighbor method, and then sends the information to the upper computer together with the image data. The application ensures the synchronization of the images of each sensor and the position attitude information at the time of imaging through the corresponding time information, and eliminates the influence caused by image processing and transmission delay.

The invention provides a firmware upgrading method and device. The method comprises the steps that an upgrade package is obtained, and the upgrade package comprises an upgrade file of firmware to be upgraded and further comprises a version list file used for recording the dependency relationship between the firmware to be upgraded; constructing an upgrading task queue according to a dependency relationship recorded by the version list file, wherein the upgrading task queue comprises file information of upgrading files of all the to-be-upgraded firmware which are sequentially arranged according to priorities; for each priority in the upgrade task queue, distributing a working unit for the upgrade file of the current priority, and calling a decompression module and a burning module in parallel by the working unit to decompress and burn the upgrade file; and after all the priorities of the upgrade task queue are processed, restarting the to-be-upgraded equipment to enable the new firmware to take effect. According to the method, a dynamic double-buffer mechanism is introduced, so that the decompression module and the burning module work in parallel through the annular buffer area, the memory occupation is reduced, and the upgrading efficiency is remarkably improved.

Reduced numbers of encoded bits obtained by encoding input bits by a polar code are incrementally output, for transmission for example. The polar code comprises bit indices for placing bit values before encoding. The bit indices include a first set of bit indices for placing values of the input bits and a second set of bit indices for placing a predetermined bit value. A first reduced number of the encoded bits start from a first starting position, and a second reduced number of the encoded bits start from a second starting position different from the first starting position. The second reduced number of the encoded bits include one or more of the encoded bits not included in the first reduced number of the encoded bits. The reduced numbers of encoded bits may be output from continuous positions, in a circular buffer for example, or may include repeated bits.

This invention provides a streaming compression upgrade method for onboard equipment firmware for commercial aerospace, relating to the field of spacecraft on-orbit maintenance technology. The ground-based system uses the DEFLATE algorithm to compress the firmware, extracting an identifier header including the magic number and original size, and segmenting the compressed stream into independent data packets according to link capacity. The onboard system receives data using a pre-set input circular buffer and a circular history buffer, driving an interruptible and recoverable decompression state machine for streaming decoding. Decoded bytes are synchronously written to non-volatile memory and the circular history buffer. When input is exhausted, the entire running state is saved and paused; it is precisely restored upon the arrival of new data. The advantages of this invention are: total RAM usage is less than 40KB, enabling simultaneous reception, decompression, and writing, significantly shortening narrowband link transmission time, and effectively solving the upgrade challenges of limited memory, short transit windows, and easy link interruptions for commercial low-Earth orbit small satellites.

This invention relates to a method and apparatus for implementing an EtherCAT master system without an operating system. The method includes: adapting the SOEM protocol stack to the hardware abstraction layer of the EtherCAT master by using byte order processing based on bitmasks and a phased shift strategy, and EtherCAT frame transmission and reception control based on circular buffer index management; adapting the SOEM protocol stack to the operating system abstraction layer of the EtherCAT master by using non-real-time task priority scheduling based on hardware timers, a single-threaded event-driven main loop, and a blocking communication synchronization mechanism combined with timer timeout monitoring; and adapting the EtherCAT master application layer through network scanning and communication parameter configuration, a memory management mechanism based on CoE standard mapping, and the periodic position mode of slave stations. This invention achieves an operating system-free EtherCAT master system and microsecond-level communication jitter by optimizing and adapting the SOEM protocol stack.

The invention discloses a real-time video stream playback method and device based on GOP cyclic cache and a medium. The method comprises the following steps: analyzing a packaging structure of a real-time video stream and extracting GOP units of the video stream and audio frames of an audio stream; storing the GOP units in a circular cache region according to a receiving sequence, and covering the earliest cached GOP unit with the newly input GOP unit when the circular cache region is full; starting to read the GOP unit sequence in a reverse order from the latest cached GOP unit in the circular cache region in response to a reverse playing trigger instruction, and decoding each GOP unit to generate a reverse order video frame sequence; based on a display timestamp PTS of the inverted-sequence video frame sequence, performing inverted-sequence alignment on audio frames in the audio stream data, and rearranging the aligned audio frames according to a time inverted sequence to generate an inverted-sequence audio frame sequence; and after decoding and playing of each GOP unit are completed, automatically detecting the state of the played GOP unit, and releasing the memory resources occupied by the played GOP unit from the circular cache region.

The invention discloses a fine-grained real-time intrusion detection method and system based on a diffusion model, and the method comprises the steps: carrying out the data collection of thread-level fine-grained data through an eBPF, carrying out the preprocessing of the collected data, and converting an irregular system log into regular integer data, so as to adapt to a kernel space; constructing a fine-grained real-time intrusion detection model and training in a user space, wherein the model is formed by introducing a diffusion model on the basis of a ResNet model; for system logs collected in a user space, a shared memory is adopted to transmit data to a kernel space model for detection, a shared memory area is a lock-free circular buffer area with atomic index updating, and a log collector writes preprocessed log entries in the shared memory area for direct access of an intrusion detection engine; and after the model is retrained by using new data in a user space, transmitting updated parameters to a kernel space by using an eBPF pin map. According to the invention, attack detection is carried out while data is collected in real time.

The invention discloses a loopback test module data flow monitoring method and system, and belongs to the technical field of computers. The method comprises the following steps: intercepting an original data stream at a loopback sending end bypass, generating a sending end characteristic fingerprint with a fixed length, associating the sending end characteristic fingerprint with a sending clock label, and writing the sending end characteristic fingerprint into an asynchronous ring buffer area in sequence; intercepting a return data stream in a loop-back receiving end bypass, generating a receiving end feature fingerprint by adopting the same algorithm, and capturing a receiving clock label; the matching engine determines a sliding window range based on a receiving clock label and a preset time delay parameter, reads a plurality of sending end feature fingerprints in a window in parallel, and compares the sending end feature fingerprints with receiving end feature fingerprints after effective screening according to time deviation; and if yes, judging that the operation is normal, otherwise, starting an exception handling process. According to the method, through feature fingerprint compression storage and an asynchronous ring buffer and sliding window parallel matching mechanism, low-resource-overhead, non-intrusive and high-real-time data flow monitoring is achieved, and the method effectively adapts to a high-speed loopback test scene.

A digital filtering device includes at least one processor, a sample buffer configured to store samples, the sample buffer being a circular buffer, and a coefficient array for storing coefficients of a digital filter. The coefficient array includes a set of digital filter coefficients and a copy of the set of coefficients. For each of a plurality of input samples, the at least one processor can obtain a sample and store the sample as a value in a sample buffer at a position indicated by a buffer pointer, calculate an output sample comprising to perform a multiply-accumulate (MAC) operation with values currently stored in the sample buffer and a subset of the coefficients stored in a coefficient array, wherein a position of the subset of coefficients in the coefficient array is indicated by a coefficient pointer; and update the buffer pointer and the coefficient pointer.

The invention discloses a pickup acquisition and playing implementation method and system, and intelligent equipment. The method comprises the following steps: acquiring first audio data and second audio data; the second audio data and the first audio data after reverberation reduction processing enter an annular buffer queue in sequence according to a time sequence; synchronously performing audio preprocessing operation on the first audio data and the second audio data; performing sound mixing processing to obtain target audio data; obtaining target audio data after noise reduction; and playing the target audio data in the playing buffer area according to the audio sampling rate. According to the invention, the audio data in each audio data processing step is allocated, and timing processing of the data is carried out through sound card acquisition, so that the audio data can be acquired and output according to a stable time interval; and finally, storing the target audio data into a playing buffer area to ensure that the playing speed of the plurality of sound cards can be stably maintained.

The reduced number of encoded bits obtained by encoding the input bits by the polar code is incrementally output, for example for transmission. The polar code includes a bit index for placing bit values prior to encoding. The bit indices include a first set of bit indices for placing values of the input bits; a second set of bit indices for placing predetermined bit values. A first reduced number of the coded bits begins from a first starting position and a second reduced number of the coded bits begins from a second starting position different from the first starting position. The second reduced number of coded bits includes one or more of the coded bits not included in the first reduced number of coded bits. For example, the reduced number of encoded bits may be output from consecutive locations in a circular buffer, or may include duplicated bits.

The application discloses a real-time collection and intelligent processing method of communication data, which comprises the following steps: immediately storing the data received by a bottom interrupt service program into a bottom temporary data buffer area in a first-in first-out order; setting a double circular buffer area in an application layer, and adopting a read-write pointer separation mechanism to avoid resource competition; reading the bottom data by the application layer through a periodic task, and storing the data into a first circular buffer area after frame boundary detection and integrity check; carrying out packet sticking segmentation, packet recombination and secondary check on the data in the first circular buffer area, and storing the effective data into a second circular buffer area for use by an upper layer. The system corresponds to a bottom interrupt module, a bottom temporary data buffer area and an application layer module comprising a double circular buffer area and a data processing unit. The application eliminates the processing delay of a traditional method, avoids resource competition during multi-task access, significantly improves the real-time performance and reliability of data reception, has good universality and expansibility, and is easy to realize in an embedded system.

Provided in the embodiments of the present application are an information transmission method and apparatus. The method comprises: on the basis of the length N of a first bit sequence and a rate matching mode, determining a circular buffer, wherein the length of the circular buffer is M, and both N and M are integers greater than or equal to 1; on the basis of a redundancy version, determining a sending starting point of a second bit sequence; and on the basis of the circular buffer, a sending length E of the second bit sequence and the sending starting point, sending the second bit sequence, wherein E is an integer greater than or equal to 1. By means of the embodiments of the present application, the complexity of information re-transmission can be reduced.

The invention discloses a low-interference taint path restoration system and method based on static instrumentation, and mainly solves the problems of stiff analysis strategy, high operation overhead and result semantic deficiency faced by existing vulnerability mining and security assessment. The system comprises a target data acquisition end and an analysis engine which run independently and are connected through a shared memory channel; lightweight static instrumentation is performed on a source code in a target program compiling stage, and a shared memory channel with an analysis engine is established; by constructing a "producer-consumer" asynchronous decoupling architecture, time-consuming taint rule management and path restoration logic are stripped from a service main thread; a lockless annular buffer area is utilized to efficiently capture a runtime data stream, and a source code level taint propagation path is restored in an independent analysis engine in combination with debugging information and a call stack Hash algorithm. According to the method, a high-precision source code level analysis result can be obtained while low performance loss is kept, and the efficiency and flexibility of vulnerability mining are greatly improved.

This invention discloses a method for fixed-delay playback and seamless switching of live streams based on absolute time stamps, comprising the following steps: S1: Receive an HTTP-FLV data stream, append an absolute time stamp (absolute_time) to each Tag object, and store the Tag objects in a circular buffer queue; S2: Determine the playback time and locate the Tag object to be sent based on the absolute time stamp (absolute_time); S3: Rewrite the timestamp of the Tag object to be sent, encapsulate it, and send it to the player client; S4: Upon receiving a switching command to switch the current playback stream to the target playback stream, seamlessly switch to the target playback stream for playback. This invention's method for fixed-delay playback and seamless switching of live streams based on absolute time stamps can achieve precise fixed-delay playback of live streams and seamless switching between multiple live sources without full-stream transcoding.

The invention provides a method for detecting the utilization rate of a software baseband buffer area, which comprises the following steps of: applying for a shared memory by using an associated handle while applying for a buffer area memory, storing important information related to the buffer area by the shared memory, and updating in real time during the running of a software baseband program; starting another program to use a related handle to open the shared memory, reading data in the shared memory, and checking the use condition of the memory buffer area and whether the buffer area overflows in real time, the use condition of the circular buffer area can be checked according to the handle in the configuration file, the use method is more flexible, and the use efficiency is improved. And the buffer area utilization rate observation tool does not influence the running software baseband thread, the main program of the tool runs in another process, and the use condition and important data of the software baseband buffer area can be analyzed and checked in real time under the condition that the real-time processing speed of the software baseband is not influenced.

An improved data access method for direct memory access (DMA), comprising: allocating m DMA hardware descriptors, and n data buffer units from a data buffer to the controller; constructing software descriptors of the buffer into a two-dimensional array with each row directing to one buffer unit, wherein the value of a first subscript of each array item ranges between 0 and n−1, and the value of a second subscript ranges between 0 and 1; respectively storing a virtual and physical address of the same buffer unit in a column of the two-dimensional array of the corresponding software descriptor; creating an index to establish a directional relationship between the buffer units and the software descriptors, the index comprising an idle index and a scheduling index; and implementing the hardware and software descriptors access by the CPU and DMA to a memory in a data transfer process of the high-speed interface.

This application relates to the field of terminal technology, and more particularly to a log storage method and an electronic device. The method enables the storage of the top N log blocks (those whose write times are closest to the time of the fault occurrence) from a plurality of log blocks stored in a circular buffer of a random access memory before the electronic device restarts due to a fault, in a non-volatile memory, where N is an integer greater than 1. The method includes: in response to a fault in the electronic device, obtaining a first offset for each of the plurality of log blocks stored in the circular buffer; determining a target log block from the plurality of log blocks based on the first offset; the first offset indicating the starting storage location of the log block when the plurality of log blocks are written to memory sequentially according to their write times.

Methods, systems, and devices for circular buffer partitions are described. A memory device may include one or more sets of memory cells configured to operate as circular buffers. In some cases, upon receiving w rite command, the memory device (e.g., a controller of the memory device) may write data to the circular buffer based on a location of a cursor (e.g., a header pointer). After a write operation, the cursor may be incremented such that, upon receiving a subsequent write command, data may be written to the circular buffer beginning at the location of the cursor. In some examples, the circular buffer may be associated with one or more partitions (e.g., snapshot partitions) such that, upon the occurrence of a triggering event, a subset of data stored to the circular buffer may be stored to the partition (e.g., to a different portion of the memory device).