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740 results about "Low-density parity-check code" patented technology

In information theory, a low-density parity-check (LDPC) code is a linear error correcting code, a method of transmitting a message over a noisy transmission channel. An LDPC is constructed using a sparse bipartite graph. LDPC codes are capacity-approaching codes, which means that practical constructions exist that allow the noise threshold to be set very close (or even arbitrarily close on the binary erasure channel) to the theoretical maximum (the Shannon limit) for a symmetric memoryless channel. The noise threshold defines an upper bound for the channel noise, up to which the probability of lost information can be made as small as desired. Using iterative belief propagation techniques, LDPC codes can be decoded in time linear to their block length.

Method and device for encoding low-density parity check code

The invention provides a method and device for encoding a low-density parity check code. The method comprises the following steps of: comparing a mother code rate and a transmission code rate which are supported by a uniform basic matrix; determining the length K'of an input information grouping bit according to a comparison result; determining an encoding matrix of the low-density parity check (LDPC) code according to the uniform basic matrix and an expansion factor; determining an information bit to be encoded according to the received information grouping bit with the length of K'; and performing LDPC encoding on the information bit to be encoded by using the encoding matrix, and processing a mother code word bit obtained through encoding to acquire a code word bit to be transmitted. By the method and device for encoding the LDPC code, the basic matrix and the expansion factor are determined; the input information grouping length is determined or the encoding matrix is processed according to the received transmission code rate, so the code word which is in accordance with the transmission code rate can be acquired; on the basis of the optimal performance, the changeability of the code rate is realized; furthermore, the hardware design complexity is reduced and the cost is lower.
Owner:ZTE CORP
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