172results about "Checking code calculations" patented technology

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 3 / 4, a second parity check matrix corresponding to a first exponent matrix comprising 576 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 5 / 6, a second parity check matrix corresponding to a first exponent matrix comprising 384 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 2 / 3, a second parity check matrix corresponding to a first exponent matrix comprising 768 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 1 / 2, a second parity check matrix corresponding to a first exponent matrix comprising 1152 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

In an aspect, digital communication coding methods (or simply coding methods) are provided, said methods comprising providing families of quasi-cyclic low-density parity check, LDPC, codes each represented by a single equation. Said single equation is derived from a geometry whose nature implies good error correcting properties for each of the LDPC codes and allows quasi-cyclic parity check matrices to be constructed for geometric LDPC codes of exceedingly long length, up to and exceeding four hundred thousand bits. The construction of such check matrices is not possible by any other known method. The LDPC codes have different lengths and different rates and the families of LDPC codes are provided with a guarantee of minimum distance. The geometric and quasi-cyclic properties of the LDPC codes allow low complexity decoding with very low frame error rates. Systems, computing systems and computer programs suitable to perform such coding methods are also provided.

Certain aspects of the present disclosure generally relate to techniques for compactly describing lifted low-density parity-check (LDPC) codes. A method by a transmitting device generally includes selecting a first lifting size value and a first set of lifting values; generating a first lifted LDPC code by applying the first set of lifting values to interconnect edges in copies of a parity check matrix (PCM) having a first number of variable nodes and a second number of check nodes; determining a second set of lifting values for generating a second lifted LDPC code for a second lifting size value based on the first lifted PCM and the first set of lifting values; encoding a set of information bits based the first lifted LDPC code or the second lifted LDPC code to produce a code word; and transmitting the code word.

A non-transitory computer-readable medium, method and system, the system including processing circuitry. The processing circuitry is to generate a first matrix, perform an incident cycle optimization process using the first matrix to generate a modified first matrix, and perform an encoder gate optimization process using the modified first matrix to generate a further modified first matrix. Processing circuitry is then to generate a second matrix including the further modified first matrix as a submatrix of the second matrix, perform the incident cycle optimization process using the second matrix to generate a modified second matrix, and perform the encoder gate optimization process using the further modified first matrix and the modified second matrix to generate a further modified second matrix. Processing circuitry then configures a transmitting device that receives and encodes transmission data the using the further modified first matrix and further modified second matrix, and transmits the encoded transmission data.

The invention discloses a coding method, a decoding method and a device, which are used for supporting an IEEE (Institute of Electrical and Electronic Engineers) 802.11 ax next generation Wi-Fi (Wireless Fidelity) protocol (such as 802.11 be, Wi-Fi7 or EHT), or an IEEE 802.11 be next generation Wi-Fi protocol (such as 802.11 bn, Wi-Fi 8 or UHR), or Wi-Fi AI (Wireless Fidelity), or MMW (Millimeter Wave), or UWB (Ultra Wideband) or perception and the like. The method comprises the following steps: a first communication device obtains an information bit sequence, performs LDPC coding on the information bit sequence based on a check matrix, obtains a coded sequence, and outputs the sequence. The length of the sequence is N1, N1 is n times of 1944, and n is an integer greater than or equal to 2. And after obtaining the to-be-decoded information, the second communication device performs LDPC decoding in combination with the check matrix to obtain an information bit sequence. The method can improve the decoding performance.

The embodiment of the invention discloses a data mapping method and a related device, which can obtain higher coding gain while keeping good compatibility, and can ensure the resistance to channel burst errors at the same time. Specifically, a first data stream encoded by an outer code is obtained. Afterwards, the first data stream is subjected to inner code coding to obtain a second data stream, the second data stream comprises L code words subjected to second FEC coding, L is an integral multiple of 8, each code word comprises n bits, and n is an odd number larger than 1. Furthermore, the L code words are interleaved and mapped to obtain n * L / 8 DP-16QAM symbols, any one of an X polarization direction I-path component, an X polarization direction Q-path component, a Y polarization direction I-path component and a Y polarization direction Q-path component of each DP-16QAM symbol is obtained by mapping two bits in the L code words, and each DP-16QAM symbol is obtained by mapping eight bits from eight code words.

This application provides example concatenated code encoding and decoding methods. In one example method, polar code encoding is performed on a to-be-encoded message bit sequence based on a frozen bit set and a message bit set that are of a first polar code, to obtain a first encoded code word whose length is N_o. The first encoded code word is interleaved to obtain a second encoded code word, and optimized low-density parity-check (LDPC) code encoding is performed on the second encoded code word to obtain a concatenated code word. Interleaving includes both outer interleaving and inner interleaving. The concatenated code word is then outputted.

The method includes: A transmitter obtains a first bit sequence, and then performs LDPC encoding on the first bit sequence based on a check matrix, to obtain a second bit sequence. Correspondingly, a receiver receives the second bit sequence, and then performs LDPC decoding on the second bit sequence based on the check matrix, to obtain K information bits. The first bit sequence includes the K information bits, the second bit sequence includes M check bits, and both K and M are positive integers. The check matrix is obtained based on a first base matrix, the first base matrix corresponds to a second base matrix, the second base matrix includes the following elements: 0, 1, and 2.

An integrated circuit (IC) device is disclosed. The IC device includes an error encoder to receive a word of k bits and to encode the word using a G-matrix to generate an encoded word of n bits. The n bits include the k bits and n-k check bits. The G matrix is based on a parity check matrix defining a single error correct, double error detect, and burst error detect (SECDEDBED) code. An error decoder receives the encoded word and applies the parity check matrix to the encoded word. The parity check matrix is configured to generate a syndrome from the encoded word. The syndrome being used to detect a random double bit error, a random single bit error, and a burst error of between two and m bits within m adjacent bits of an m-bit subset of the data word starting from an m-bit boundary of the word of k bits, and where m<n-k.

Certain aspects of this disclosure generally relate to techniques for enhanced puncturing and low-density parity-check (LDPC) code structures. A method for wireless communication by a transmitting device is provided. This method generally includes: encoding a set of information bits based on an LDPC code to generate a codeword, the LDPC code being defined by a basic matrix having a first number of variable nodes and a second number of parity nodes; puncturing the codeword according to a puncturing pattern designed to puncture bits corresponding to at least two of the variable nodes to generate a punctured codeword; adding at least one additional parity bit to the punctured at least two variable nodes; and transmitting the punctured codeword.

A coding method and apparatus are provided to provide a uniform coding method for ultra short codes. The method is as follows: obtaining, by a transmit end, to-be-coded information bits; performing, by the transmit end, PC-polar coding on the to-be-coded information bits based on first constructor parameters, to obtain a coded bit sequence; and sending the coded bit sequence, where a check equation of the first constructor parameters include a first element representing a check-required information bit position and a second element representing a check bit position, the first element corresponds to a first vector in a generator matrix for PC-polar codes, the second element corresponds to a second vector in the generator matrix, and if a first Hamming weight of the first vector is the same as a second Hamming weight of the second vector, a third Hamming weight of an addition modulo 2 vector is greater than the first Hamming weight and greater than the second Hamming weight, or if the first Hamming weight is different from the second Hamming weight, the third Hamming weight is greater than a smaller one of the first Hamming weight and the second Hamming weight.

To secure favorable communication quality in data transmission using an LDPC code.SOLUTION: In group-wise interleaving, the LDPC code with a code length N of 69120 bits is interleaved in units of 360-bit bit groups. In group-wise deinterleaving, a sequence of the LDPC code after group-wise interleaving is returned to an original sequence. The present technology can be applied, for example, to a case of performing LDPC code-based data transmission and the like.SELECTED DRAWING: Figure 185

A method for constructing a permutation matrix or a check matrix, a processing device, a storage medium and a coding method. The method for constructing the permutation matrix comprises: obtaining a base matrix for the permutation matrix; and performing lifting on the base matrix to obtain the permutation matrix. The lifting on the base matrix to obtain the permutation matrix comprises: obtaining a modulus graph of the base matrix, obtaining each macro ring in the modulus graph, and for each macro ring in the modulus graph, determining the size of a short ring corresponding to the macro ring in a Tanner graph of a check matrix corresponding to the permutation matrix from an equivalent cycle value ECS of the macro ring, and determining whether at least one cycle value in the macro ring needs to be set according to the size of the short ring. The method can more efficiently obtain a required permutation matrix.

To secure favorable communication quality in data transmission using an LDPC code.SOLUTION: In group-wise interleaving, the LDPC code with a code length N of 69120 bits is interleaved in units of 360-bit bit groups. In group-wise deinterleaving, a sequence of the LDPC code after group-wise interleaving is returned to an original sequence. The present technology can be applied, for example, to a case of performing LDPC code-based data transmission and the like.SELECTED DRAWING: Figure 172

There are provided a channel coding method, a processing device, a communication method and a device. The channel coding method includes: using a generating matrix or a check matrix of QC-LDPC codes to channel-encode or channel-decode a code stream, wherein a code rate of the generating matrix or the check matrix is 1 / 6, 1 / 4 or 1 / 3. The method can be used in a transmission environment with a low signal-noise ratio and a long distance.

An encoding method, a decoding method, and an apparatus, which are applied to support IEEE 802.11ax next-generation WiFi protocols (for example, 802.11be, WiFi 7 or EHT), or IEEE 802.11be next-generation WiFi protocols (for example, 802.11bn, WiFi 8 or UHR), or WiFi AI, or millimeter wave (MMW), or ultra-wideband (UWB), or sensing, etc. The encoding and decoding methods comprise: a first communication apparatus acquiring an information bit sequence, and on the basis of a check matrix, performing LDPC encoding on the information bit sequence, so as to obtain an encoded sequence, and outputting the sequence, wherein the length of the sequence is N1, N1 is n times 1944, and n is an integer greater than or equal to 2; and a second communication apparatus performing LDPC decoding on the basis of the check matrix after obtaining information to be decoded, so as to obtain the information bit sequence. The methods can improve the decoding performance.

An LDPC encoder is described with memory for storing a parity check matrix and a calculation unit to encode information bits into a codeword with reference to the parity check matrix. The parity check matrix includes an information part matrix and a parity part matrix. In the parity part matrix, Z*Z sub-matrices are sub-matrices, other than a zero matrix, and are arranged in each of the m rows and m columns. A sub-matrix is a scaled cyclic matrix obtained by shifting elements of an identity matrix by one to the left and multiplying the shifted elements by a scaling element. Except for the scaled cyclic matrix, the remaining sub-matrices are a zero matrix or an identity matrix, and the scaling element is an element allowing the parity part matrix to satisfy a full rank condition on a Galois field.

The present invention discloses an iterative detection decoding method based on tree search, comprising: initializing a K-Best detector; obtaining a priori message L through a FastSOL decoder; A1 (s i ); perform the K-Best detector with the prior message L A1 (s i ) to obtain a symbol estimate sequence; the symbol estimate sequence is converted into a bit estimate sequence, which is output to the FastSOL decoder for FastSOL decoding to obtain a decoded result sequence; a determination is made as to whether the maximum number of iterations has been reached. If not, the decoded result sequence is output to the K-Best detector as a priori information; otherwise, detection and decoding are completed, and the corresponding FER performance data is output. This invention utilizes soft information exchange between the detection and decoding modules to achieve better reliability than separate detection and decoding (SDD). This solution is optimized to meet the requirements of error rate performance and complexity, achieving better error rate performance and lower complexity by adjusting the layer width and message exchange.

In some implementations, an apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, according to a code rate of 3 / 4 and a code block size of 3888 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code. The first binary parity check matrix may correspond to a first exponent matrix having 144 values. The one or more processors may be configured to encode data using the first binary parity check matrix. The one or more processors may be configured to transmit the encoded data.

The present disclosure provides methods, components, devices, and systems for low density parity check (LDPC) coding. Some aspects are more particularly directed to expanding an LDPC codeword to produce a longer codeword. In some examples, a first wireless device may generate a baseline LDPC code by performing a first boost on a basis matrix, which may produce an LDPC code for a current Wi-Fi implementation. The first wireless device may then perform a second boost or re-boost (such as a cyclic boost, a product boost, an exchange boost, or a combination thereof) to generate an extended boosted code. The extended lifted code may be an extension of the first LDPC code such that the first LDPC code may be held as part of the extended code. The first wireless device may then transmit the expanded LDPC code as an expanded or boosted codeword.

Techniques pertaining to low-density parity-check (LDPC) encoding enhancement for next-generation wireless local area network (WLAN) systems in wireless communications are described. An apparatus (e.g., a station (STA) ) encodes a plurality of bits with an enlarged codeword length. The apparatus then communicates with the encoded plurality of bits in a wireless communication system.

To secure favorable communication quality in data transmission using an LDPC code.SOLUTION: In group-wise interleaving, the LDPC code with a code length N of 69120 bits is interleaved in units of 360-bit bit groups. In group-wise deinterleaving, a sequence of the LDPC code after group-wise interleaving is returned to an original sequence. The present technology can be applied, for example, to a case of performing LDPC code-based data transmission and the like.SELECTED DRAWING: Figure 143

An apparatus may include a transmitter (120) and one or more processors (2010). The one or more processors (2010) may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check, QC-LDPC, code according to a code rate of 1 / 2, a second parity check matrix corresponding to a first exponent matrix comprising 1152 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors (2010) may encode data using the second parity check matrix. The transmitter (120) may be configured to transmit the encoded data.

Methods, systems, and devices for wireless communications are described. An encoder of a wireless device may receive a number of information bits and a block size for transmission. If the block size is not a power of two, the encoder may round the block size up to the nearest power of 2, generate a larger codeword, and puncture the excess bits. The punctured bits may affect a rate of polarization when generating a polar code, and sub-blocks with a high number of punctured bits may produce too few sufficiently polarized channels. The encoder may implement a capacity backoff when polar coding to identify a greater number of polarized channels. The encoder may assign information bits to sufficiently polarized channels of the greater number of polarized channels.

In some examples, a system groups a multitude of blocks of coded data into first segments, where each first segment comprises several blocks from the multitude of blocks, and the coded data is based on the application of a deletion correction coding to input data. The system stores the first segments in corresponding error domains of a first set of error domains in a first deletion correction configuration, where the first deletion correction configuration allows error recovery in response to lost coded data in a specified number of error domains. The system transitions from the first deletion correction configuration to a second deletion correction configuration by reorganizing the first segments into second segments, where each second segment comprises a different number of blocks of coded data than a first segment.

In some implementations, an apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, according to a code rate of 3 / 4 and a code block size of 3888 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code. The first binary parity check matrix may correspond to a first exponent matrix having 144 values. The one or more processors may be configured to encode data using the first binary parity check matrix. The one or more processors may be configured to transmit the encoded data.

This invention provides an encoding and decoding method and apparatus for Structured Low-Density Parity-Check (LDPC) codes. The encoding method includes: determining a base matrix for encoding, the base matrix comprising one or more submatrices, the submatrices including a top-left submatrix Hb1 and a top-left submatrix Hb2, wherein the number of rows and columns of the top-left submatrix Hb1 and Hb2 are both less than the number of rows and columns of the base matrix Hb, and the top-left submatrix Hb1 is the top-left submatrix of the top-left submatrix Hb2; performing LDPC encoding operations on the source information bit sequence based on the base matrix and the corresponding extension factor Z to obtain a codeword sequence, where Z is a positive integer greater than or equal to 1. The above technical solution provided by this invention solves the problems of insufficient flexibility and inability to support incremental redundancy HARQ in related technologies for LDPC encoders and decoders.