902 results about "Code word" patented technology

Apparatuses, systems, and methods for shared codeword in two-pass access operations. The memory may use a read read modify write write (RRMWW) cycle to write data and metadata to the array. Metadata and a data codeword are read out as part of two read access passes and combined into a shared codeword. Error correction is performed on the shared codeword, and then the corrected shared codeword is modified with write data and metadata. Updated parity is generated based on the modified shared codeword and the modified data and updated parity and the metadata are written as two write access passes.

This invention presents an optimized approach for training and operating Large Language Models (LLMs) using codewords. By converting traditional token-based LLMs to codeword-based systems, the method achieves significant efficiency gains. The process involves tokenizing training data and assigning codewords to tokens. LLMs are then trained and operated using these compact codewords instead of conventional tokens. During operation, prompts are converted to codewords, processed by the LLM, and the outputs are converted back to text. This approach reduces the overall cost of training and operating LLMs by approximately, offering a more efficient solution for large-scale language processing tasks.

The invention provides an LDPC code parallel GPU decoding method and system, and relates to the technical field of communication, and the method comprises the steps: reading an LDPC code through a CPU; distributing the check matrix parameters to a constant memory space of the GPU, and initializing the constant memory space; allocating a global memory space for the channel information, the decoding hard decision result and the C2V through the GPU; quantizing the channel information into signed character type data; setting a GPU thread block based on the sub-block dimension of the check matrix; performing layered updating on the LDPC code through floating point operation by using intra-frame parallelism; storing the layered information into a shared memory space of the GPU, and initializing the layered information through channel information; iteratively updating the initialized hierarchical information to generate a decoding result of the to-be-transmitted data; transmitting a decoding result to a host memory space of the CPU; and after code word decoding is completed, resource release is carried out.

A system and methods for integrated data processing and protocol adaptation using dyadic distribution-based compression. The system transforms input data into a dyadic distribution, enabling efficient compression through either variational autoencoders or Huffman encoding. A novel protocol appendix generator creates transformation rules for adapting the compressed data to various network protocols. The system interleaves transformation information with the compressed data, enhancing security and ensuring comprehensive data transmission. An enhanced codeword decoder, employing a hybrid neural network architecture, decodes the data and adapts it to target protocols. The system features a protocol handler using meta-learning techniques for adapting to unfamiliar protocols. Continuous learning mechanisms optimize performance over time. This integrated approach offers significant advantages in data efficiency, security, and protocol flexibility, making it particularly suitable for complex, heterogeneous data environments such as IoT networks, cloud computing, and big data analytics.

According to one aspect of the present disclosure, a memory device is provided. The memory device may include an array of memory cells, including a plurality of memory cells. A preset number of memory cells form a code word. The memory device may include peripheral circuit coupled to the array of memory cells. The peripheral circuit may be configured to obtain the first result corresponding to the code word at the target read voltage. The peripheral circuit may be configured to adjust the target read voltage in accordance with the first result corresponding to the code words at the target read voltage. The peripheral circuit may be configured to obtain the first result corresponding to the code words at the adjusted read voltage. The peripheral circuit may be configured to determine a valley voltage in accordance with a plurality of the first results.

A system and method for a federated deep learning platform utilizing homomorphically-compressed and encrypted data. The system comprises multiple client devices, each with a local dataset, and a central server hosting a deep learning core. Client devices convert local data into codewords, which are also homomorphically encrypted. The central server processes these encrypted codewords without decryption, preserving data privacy. The platform supports at least two architectural variants: a conventional Transformer trained on codewords, and a Latent Transformer operating on latent space vectors. Both variants eliminate the need for embedding and positional encoding layers. The system aggregates encrypted model updates from clients, enabling collaborative learning while maintaining data confidentiality. Additional features comprise differential privacy implementation and adaptive federated optimization techniques. This innovative approach allows for efficient, privacy-preserving distributed learning across diverse datasets, addressing key challenges in federated learning such as data heterogeneity, non-IID distributions, and communication efficiency.

A bank of a memory device is divided into column planes. Each column plane is associated with column selects. A portion of a column plane associated with one column select used to store metadata associated with data of the remaining column selects. Both the metadata and the data are provided to an error correction code circuit as a combined code word that provides error correction for both the data and the metadata.

The embodiment of the invention provides a data retransmission method, device and system. According to the embodiment of the invention, retransmission is carried out on a physical layer based on a data slice, the data slice comprises a code block carried by at least one FEC code word, and a corresponding serial number is allocated to each data slice in data. A sending device can store sent data slices and corresponding serial numbers in a buffer area while sending data. And after receiving the data, the receiving equipment distributes a corresponding serial number for each data slice according to the same way as the sending equipment. And furthermore, the receiving equipment sends a retransmission request carrying the serial number corresponding to the data slice after finding the uncorrectable error, and the sending equipment extracts the corresponding data slice from the buffer area according to the retransmission request and starts retransmission. It can be seen that the number of code blocks borne by the data slices is small, and compared with message-based retransmission, retransmission based on the data slices is more beneficial to reducing the transmission delay of retransmission and reducing the space of a buffer area.

A memory system and a method for decoding of one or more codewords. The system has a storage medium having therein a first decode, a first processor associated with the storage medium and configured to XOR results obtained from the first decoder when the one or more codewords in the storage medium are decoded, and a memory controller having therein a second decoder and a buffer, the memory controller configured to XOR results obtained from the second decoder. The second decoder decodes the one or more codewords after failure of the first decoder to decode the one or more codewords.

A system and methods for adaptive bandwidth-efficient data encoding comprising: a sequence analyzer configured to analyze a received sequence dataset, maintain a count of unique characters, and identify positions where the unique character count increases by a power of two; an adaptive sourceblock optimizer that determines and dynamically adjusts optimal sourceblock sizes based on dataset characteristics; and a data deconstruction engine that deconstructs the dataset into sourceblocks and creates codewords for storage or transmission. The system analyzes sequence complexity, alphabet size, and character frequency distribution to optimize sourceblock sizes, and uses machine learning to improve decision-making over time. This adaptive approach enhances compression efficiency across varied genomic data types, including genome graphs, while maintaining data integrity and security. The system efficiently encodes, stores, and transmits complex genomic and bioinformatic datasets, addressing the growing challenges in data storage and bandwidth limitations.

The invention discloses an LDPC (Low Density Parity Check) coding and decoding system and method for high-density tape storage, and the system comprises a main controller which is used for scheduling coding and decoding mode switching and module cooperative control; the storage and calculation integrated array is used for executing zero-carrying storage calculation; the ping-pong buffer framework is composed of an input buffer module Buffer A and an output buffer module Buffer B; the dynamic code length extension module is used for reconstructing a cascade link; the preprocessing module is used for converting the noisy code word into a log likelihood ratio (LLR) value; the hard decision module is used for converting the VN message into user data; the main controller is connected with all the modules through a control bus, and the dynamic code length extension module controls the power state and interconnection topology of the sub-arrays. According to the LDPC coding and decoding system and method based on the storage and calculation integrated array, zero-carrying calculation is achieved, iterative decoding is accelerated through a ping-pong buffer architecture, and the code length is flexibly configured through the dynamic code length extension module, the coding and decoding efficiency of high-density tape storage is improved, delay and energy consumption are reduced, meanwhile, multi-code-length self-adaption is supported, and high performance and flexibility are considered.

The invention discloses a 4HPU-based natural language character and numerical value general solution system and method and application thereof, and aims to solve the technical problem of realizing unification, universality and reasonability of natural language character and numerical value codes. A main coding path for realizing coding generation and structure nesting is arranged; the method comprises the following steps of: constructing a basic coding unit, judging the types and codes of numerical values, letters, Chinese characters or symbols; compared with the prior art, the method has the advantages that natural numbers, letters, Chinese characters and symbols are subjected to structured coding in a right-to-left nesting mode, complete coded word strings are obtained, structural expression and path reasoning are clear, dynamic expansion and compression can be achieved, and the coding efficiency is improved. And a more excellent basic coding method is provided for application scenes of data recovery and reverse recognition, natural language processing, intelligent communication and low-power-consumption equipment.

This application relates to a method for determining a length of an low-density parity-check (LDPC) code word in a ultra-wideband (UWB) system and a related apparatus. The method includes a communication apparatus that determines a length of an LDPC code based on a length of a to-be-encoded information bit. When the length of the information bit ranges from 0 to 324, a 648-bit LDPC code is selected. When the length of the information bit ranges from 325 to 648 or from 973 to 1296, a 1296-bit LDPC code is selected. When the length of the information bit ranges from 649 to 972, a 1944-bit LDPC code is selected. According to embodiments of this application, higher performance gain can be achieved.

A method for determining a relationship between a Phase Tracking Reference Signal (PTRS) port and a Demodulation Reference Signal (DMRS) port includes: in case a target layer mapping scheme corresponding to n code words (CWs) is used, determining an association relationship between an uplink PTRS port and an uplink DMRS port on the basis of downlink control information (DCI), in which, a maximum number of uplink DMRS ports being 8, a value of n being 1 or 2, and the target layer mapping scheme being a layer mapping scheme of type 1 or a layer mapping scheme of type 2.

The invention provides a polarization code optimization method for a TLC flash memory, which belongs to the technical field of polarization code optimization of an NAND flash memory, and comprises the following steps of: firstly, constructing a polarization code based on a Monte Carlo method: randomly generating code words in each simulation, coding after setting frozen bits, transmitting and reading data through a flash memory channel, counting and accumulating sub-channel error times by using SC decoding, and calculating an error probability; the information bit determination process is optimized according to P / E cycle times for flash memory characteristics; data to be stored in a flash memory are coded based on PC-CASCL, an original binary bit sequence is averagely segmented, PC codes of all sub-segments are added with check bits, after the sub-segments are combined, CRC coding is carried out through a preset polynomial, polar code coding is carried out on a result, and the result is stored in the flash memory. After the coded data is read from the flash memory, decoding is carried out through PC-CASCL, a decoder is initialized, the maximum path number is set, a path list is created, whether the bits are odd-even check bits or not is judged and checked bit by bit, and after all the bits are decoded, an optimal path is selected as output through CRC code check.

The invention provides a dynamic target beam tracking method based on a coverage error range and an adaptive codebook. The method comprises the following steps: constructing a beam tracking scene for a dynamic target; the base station calculates the maximum error range of the dynamic target trajectory in the current time period; the base station adaptively adjusts the beam width and calculates the optimal beam width and the optimal beam orientation; the base station obtains the optimal code word; and the base station obtains a beam tracking result of the dynamic target. According to the invention, the base station calculates the beam orientation by using the trajectory prediction information, the influence of the trajectory prediction error on the beam tracking precision is considered, the generated beam width covers the error range, the influence on the tracking precision due to the increase of the training frequency is avoided, and since the base station adaptively adjusts the beam with the purpose of minimizing the beam switching overhead, the tracking precision is improved. The beam switching frequency is reduced, the problems of high system overhead and long time delay in the prior art are solved, and the real-time performance of beam tracking is further improved.

The invention provides a Turbo product code-oriented decoding method and system, and relates to the technical field of communication, and the method comprises the steps: initializing a Turbo product code decoder; obtaining channel information to be decoded; quantizing the channel information into signed character type data; transmitting the quantized channel information to a GPU (Graphics Processing Unit) in an asynchronous transmission mode; respectively updating the channel information according to rows and columns through a Chase algorithm by utilizing an intra-frame parallelism degree consistent with the size of a GPU thread block until the maximum number of iterations is reached, and finishing the updating of the soft output information; performing hard decision according to the channel information and the updated soft output information; transmitting the hard decision result to a host memory of the CPU in an asynchronous transmission mode; and after decoding of all code words is completed, resource release is carried out. According to the invention, the decoding process with low delay, high throughput rate and high reliability can be realized, and the resource utilization rate and the decoding efficiency are improved.

The invention provides a data processing method, device and system, and relates to the technical field of computers. According to the data processing method, an access logic address of a user in the storage system is converted into a first physical address and a second physical address, an error correction code is read or written according to the first physical address and the second physical address, and the first physical address and the second physical address correspond to different address spaces of different storage particles in a memory. Under the condition that the storage medium fault area has aggregation characteristics and the fault areas of different storage particles are the same or similar, code words of error correction codes are written or read in different address spaces, namely different bit fault rate areas, in different storage particles, so that the code words of the error correction codes are dispersed in the address spaces of the different bit fault rate areas; the maximum error bit number of the code word of the error correction code can be reduced, the error bit number difference of accessing different address spaces is reduced, the waste of error correction code resources is reduced, and the reliability of a memory is improved while the utilization rate of the error correction code resources is improved.

The invention belongs to the technical field of image communication, and particularly relates to a salt tide real-time monitoring method and system based on satellite remote sensing, and the method comprises the steps: collecting a remote sensing image of a monitoring region in real time; allocating code words for pixel values in each channel of the remote sensing image by using a variable-length coding algorithm; dividing the code word of each pixel value into a plurality of layers according to the loss threshold value of each layer to obtain a sub-code word of each layer of each pixel value; and performing layered coding on each channel of the remote sensing image by using the sub-code words of each layer of each pixel value, and transmitting coding results of different layers to a monitoring terminal in sequence for salt moisture real-time monitoring. Layered compression transmission is performed on the remote sensing image, and the real-time performance of salt tide monitoring is improved.

The embodiment of the invention discloses a data processing method and a related device, which are used for realizing inner code coding with higher gain, improving the performance of cascade coding and being beneficial to being applied to a 1.6 T ZR scene. Specifically, a coded data frame subjected to outer code coding is obtained, the coded data frame comprises v bits, and v is an integer greater than 1. Afterwards, a first bit set is obtained according to the coded data frame and the added dpad filling bits, the number of bits in the first bit set is v + dpad, and dpad is an integer greater than or equal to 1; next, performing convolutional interleaving on the first bit set to obtain a second bit set; and further, performing inner code coding on the second bit set to obtain a third bit set. The third bit set comprises R code words coded by the second FEC, each code word comprises N bits including K information bits and N-K check bits, R, N and K are all integers greater than 1, v + dpad = R * K, and dpad cannot be exactly divided by K.

A method for indicating layer mapping of a code word (CW), performed by a terminal, includes: determining and enabling a target layer mapping scheme, wherein the target layer mapping scheme comprises a Type-1 layer mapping scheme or a Type-2 layer mapping scheme; wherein a maximum value of difference between numbers of layers corresponding to two CWs after layer mapping based on the Type-1 layer mapping scheme is different from a maximum value of difference between numbers of layers corresponding to the two CWs after layer mapping based on the Type-2 layer mapping scheme.

The invention provides a decoder, a decoding method, a memory system, an operation method of the memory system and a controller. The decoder comprises a first processing circuit, a second processing circuit, a processor and a bit flipping circuit, the first processing circuit is configured to obtain a check formula and a check formula weight based on a to-be-decoded code word and a check matrix in a current iteration; the second processing circuit is configured to obtain the energy of the to-be-decoded codeword in the current iteration based on the check matrix, the check formula and the overturning state of the to-be-decoded codeword in the current iteration; the processor is configured to: determine a flipping threshold in a current iteration based on a change state of the checkout weight; and the bit flipping circuit is configured to output the to-be-decoded code word in the next round of iteration based on a comparison result of the energy of the to-be-decoded code word in the current iteration and the flipping threshold value in the current iteration determined by the processor.

Examples of the present application disclose a memory device. The memory device includes: a memory cell array comprising memory cells that store a plurality of memory bits, the plurality of memory bits corresponding to a plurality of orders of read voltages, and a preset number of the memory cells forming a code word; and a peripheral circuit coupled with the memory cell array and configured to: acquire a first result of at least one code word corresponding to a target read voltage of a target order; acquire a predicted valley bottom voltage of the target order according to the first result of the at least one code word corresponding to the target read voltage of the target order and a level in which the target order is located; and determine a target valley bottom voltage of the target order based on the predicted valley bottom voltage of the target order.

The application provides a polar code soft input soft output decoding method, a decoding device and a communication device; the decoding method comprises the following steps: (S1) performing fast serial cancellation list decoding under dynamic frozen bit constraint for all special nodes constituting a polar code; the types of the special nodes comprise rate zero, rate one, repetition and single parity check; (S2) calculating the approximation of the sum of the posterior probabilities of the legal code words not accessed under each special node after decoding; (S3) using the approximation of the code book probability obtained in the step (S2) to calculate the bit level soft information of the output polar code. The low-latency polar code soft input soft output decoding method provided by the application improves the parallelism by realizing fast soft output decoding based on the Rate0, Rate1, REP and SPC nodes, and significantly reduces the decoding latency without losing the soft output precision compared with the SO-SCL decoding algorithm.

Examples of the present application disclose a memory device and operating method thereof, a memory system and operating method thereof, wherein the memory device includes: an array of memory cells; peripheral circuit coupled to the array of memory cells and configured to: obtain the first state corresponding to at least one code word formed by a preset number of memory cells at the target read voltage; perform multiple adjustments to the target read voltage, and obtain a first state corresponding to the at least one of the code words at the read voltage after each of the adjustments respectively; determine a valley voltage in accordance with a variation trend of the relationship of size between the number of flipped bits and the first preset value indicated by a plurality of the obtained first states.

An interface device distributes data from a plurality of input data streams to a smaller number first data streams, and periodically inserts a set of alignment markers (AMs) into the first data streams. After using the AMs, the interface device removes the AMs and reinserts the AMs at particular positions. A forward error correction (FEC) encoder encodes data corresponding to the first data stream to generate FEC codewords and distributes data from the FEC codewords to multiple outputs streams. Within the output streams, the AMs are located at FEC codeword boundaries and bits of a first AM, among the set of AMs, are spread across multiple outputs stream. A single output data stream is generated based on the multiple output streams of the FEC encoder.

Length-adapter input parameters for length-adaptive encoding include a data word length and a length-adapted codeword length, which are positive integers. Length-adapter output parameters include a primary data word length, a secondary data word length, a primary codeword length, and a secondary codeword length. A received data word is split according to splitter parameters into a primary data word based on the primary data word length and a secondary data word based on the secondary data word length. The primary data word is encoded in accordance with primary encoder parameters to generate a primary codeword from a primary code. The secondary data word is encoded in accordance with secondary encoder parameters to generate a secondary codeword from a secondary code. The primary and secondary codewords are combined in accordance with combiner parameters to generate a length-adapted codeword transmitted via a channel to a decoder.

The aspects described herein may enable an apparatus to jointly encode two or more payloads using a single polar encoder device, while providing unequal error protection for the payloads. The apparatus causes a polar encoder to polar encode a first payload and a second payload to generate a polar encoded codeword. The polar encoder is configured to encode one or more bits of the first payload at a first reliability level and encode one or more bits of the second payload at a second reliability level, where the one or more bits of the first payload are associated with a first priority level and the one or more bits of the second payload are associated with a second priority level. The apparatus transmits the polar encoded codeword.

A data processing method comprises: separately performing inner-code encoding on n first data streams to obtain n second data streams, where the n second data streams include n inner-code codewords from the n second data streams, the n inner-code codewords include n / m codeword sets, each of the codeword sets includes m inner-code codewords, and each of the inner-code codewords includes N bits; separately performing bit interleaving on the n / m codeword sets to obtain n / m target bit sets; and separately mapping m×N bits in each of the target bit sets to obtain m×N / L modulation symbols, to obtain n×N / L modulation symbols, where every L bits are mapped to one modulation symbol, and the L bits in the modulation symbol are from L inner-code codewords, wherein the L bits in the modulation symbol are from information bits in the inner-code codewords.

This wireless device is provided with: a control unit that determines a codeword on the basis of a geometric relationship between the wireless device and an area covered by the wireless device and generates a beam that covers the area by applying the codeword; and a communication unit that outputs a signal by using the beam.