7281results about "Redundant data error correction" patented technology

The ECS circuit includes an ECS control module, a command generation module, an address counting module, and an error tracking and recording module. The ECS control module is configured to: receive a mode control signal, and generate an ECS command signal based on the mode control signal. The command generation module is configured to generate an internal command signal based on the ECS command signal. The internal command signal is configured to perform a corresponding ECS operation. The address counting module is configured to: perform address counting based on the internal command signal, and generate a counting end signal when counting is completed for a target address. The error tracking and recording module is configured to: receive an error signal, and generate an error tracking signal based on the counting end signal and the error signal. The error tracking signal is configured to record error information of the ECS operation.

A nonvolatile memory device includes a plurality of latch groups, an address controller, an encoder, and a buffer. The address controller controls an input address and an output address to indicate one of the plurality of latch groups. The encoder receives sector data from a latch group corresponding to the output address among the plurality of latch groups and also compresses the received sector data. The buffer stores the compressed sector data. Among the plurality of latch groups, the compressed sector data stored in the buffer is overwritten in a latch group corresponding to the input address.

A codeword read from memory includes data blocks including data and supplemental blocks including error correction code (ECC) symbols for detecting and correcting data errors. Metadata can be stored in the supplemental blocks to increase memory utilization but using bits of the supplemental blocks for metadata leaves too few bits remaining for the ECC symbols. To maintain error protection, the supplemental blocks include ECC symbols to protect a first data portion of the codeword and parity bits configured to protect a second data portion of the codeword. Errors in the first data portion can be located and corrected using the ECC symbols. Errors in the second data portion can be detected by the parity. For example, the first data portion is encoded based on the second data portion, so locations of parity errors correspond to locations of symbol errors, and parity errors can be corrected.

Apparatuses, systems, and methods for alternate memory die metadata storage. A memory module includes a number of memory devices. A controller writes data and metadata to the module. The data is stored in the memory devices, while the metadata is stored in a selected portion of the memory devices. The selected portion of the memory devices may use separate write enable signals to protect bit lines which the metadata is not being written to.

Apparatuses, systems, and methods for shared codeword in two-pass access operations. The memory may use a read read modify write write (RRMWW) cycle to write data and metadata to the array. Metadata and a data codeword are read out as part of two read access passes and combined into a shared codeword. Error correction is performed on the shared codeword, and then the corrected shared codeword is modified with write data and metadata. Updated parity is generated based on the modified shared codeword and the modified data and updated parity and the metadata are written as two write access passes.

Apparatuses, systems, and methods for scalable 1-pass error correction code operations. A memory device includes an error correction code (ECC) circuit which generates a number of parity bits based on a plurality of data bits during a write operation. The number of parity bits may be selected based on a setting in a mode register. The data and parity are written to the memory array as part of a single access pass. The data may be written to a selected portion of the data column planes, while the parity is written to one or more column planes of the extra column plane or a non-selected portion of the data column planes.

Apparatuses, systems, and methods for read / modify / write single-pass metadata access operations. During a write a memory receives data bits and at least one metadata bit and a column address which includes column select bits and column sub-select bits. A column decoder selects a set of bit lines in an extra column plane based on the column select bits and a set of bits is read out. A subset of that set of bits is selected based on the column sub-select bits and overwritten with the at least one metadata bit. The modified set of bits is written back to the extra column plane.

The invention relates to the technical field of big data, in particular to a cloud computing-based tumor early screening data sharing platform construction method and system. The sharing platform construction method comprises the following steps: carrying out association modeling on multi-dimensional early screening data by adopting a knowledge graph technology; encrypting the sensitive field of the metadata index database, and synchronously generating an irreversible anonymous identifier to replace the original identifier; partitioning and arranging the metadata index database in a distributed storage system corresponding to a cloud platform according to tumor types, and performing cross-region redundant backup by adopting an erasure code technology; and constructing an access control smart contract based on a block chain technology, verifying the qualification of a requester through a digital identity authentication module, and after verifying the validity of a digital certificate of the requester, dynamically decrypting and transmitting a data copy conforming to an authority level. Through organic fusion of the knowledge graph, the encryption technology, distributed storage and the block chain, a safe, efficient and reliable tumor early screening data sharing platform is constructed.

The invention relates to the field of data backup, in particular to an intelligent data backup method and system based on an AI large model. The method comprises the following steps: acquiring an enterprise global data list, performing intelligent data structure deconstruction and dynamic attribute mapping modeling, and constructing a holographic data semantic perception model; performing real-time transient risk mutation detection on the holographic data semantic perception model, and constructing an intelligent backup triggering mechanism; carrying out storage resource demand prediction based on an intelligent backup trigger mechanism, carrying out multi-storage cloud environment resource dynamic scheduling, and constructing an elastic backup storage resource pool; carrying out incremental backup analysis and self-adaptive compression coding to obtain an incremental backup coding packet; and performing dynamic backup sequence adjustment and intelligent incremental backup decision on the incremental backup coding packet based on the elastic backup storage resource pool, and constructing an intelligent incremental backup execution engine. According to the method, the reliability, the accuracy and the traceability of a backup result are improved through self-adaptive intelligent incremental backup.

The invention relates to the technical field of hard disk testing and verification, in particular to a multi-thread-based solid state disk reliability automatic testing method and system.The method comprises the steps that firstly, SMART information is deeply analyzed through microsecond-level high-granularity continuous performance monitoring, and multi-thread parallel processing is assisted; according to the method, fine performance fluctuation of the solid state disk under the concurrent load can be quickly captured, a fault mode can be identified, then early warning is realized by utilizing the extracted multi-dimensional features and a machine learning model, and a detailed fault diagnosis report is generated; and through dynamic error correction code strength verification and data integrity verification under pressure, an internal error correction mechanism of the solid state disk is actively detected and optimized. And finally, in combination with prediction reliability modeling, the system can estimate the remaining service life and predict faults, and provides product optimization suggestions for design, manufacturing and firmware optimization of the solid state disk, so that automation, intelligence and full life cycle management of the fault detection reliability of the solid state disk are realized.

The invention discloses a cost optimization method for resource scheduling management of a cloud data center, and relates to the technical field of cloud computing, and the method comprises the following steps: S1, collecting and modeling a multi-dimensional resource state of the cloud data center, and generating a resource change trend based on a sliding time window and a prediction model; and S2, constructing a multi-target game scheduling model taking calculation, storage, bandwidth and energy consumption as participants, outputting a scheduling game solution in combination with task modal adaptability parameters, and forming task-resource optimal matching. According to the method, through multi-dimensional resource state collection, a sliding time window and an advanced prediction model, resource dynamic changes and future trends can be captured more accurately, more reliable input is provided for scheduling decisions, resource waste or performance bottlenecks caused by information lag are avoided, calculation, storage, bandwidth and energy consumption are modeled as multi-party game participants, and the game efficiency is improved. Nash equilibrium is solved in combination with task modal adaptability parameters, and an optimal scheduling scheme giving consideration to resource utilization rate, performance and cost can be found.

The invention discloses a food safety sampling inspection data verification method and system and a computer storage medium thereof, particularly relates to the technical field of food safety supervision informatization, and is used for solving the problem of false consistency caused by silent failure when an external data source fails in an existing verification system. Field-level binding is realized by establishing a dependency mapping table of a sampling inspection system and an external data source; constructing a service response causal graph model, and dynamically marking a failure data source based on the deviation between the anti-fact response and the actual response; analyzing the verification field set and positioning a key verification field; degrading the weight of the key field to be below a threshold value and activating a manual auditing flag bit; scanning a preset coupling relationship between fields, freezing associated fields which do not trigger rules, verifying and constructing a conflict topology; when the check engine is executed, dynamically skipping the weight reduction field, suspending the freezing field, and generating a to-be-rechecked report in combination with the artificial flag bit and the topological graph; error data transmission is blocked from the source, and the food safety risk missed judgment rate is remarkably reduced.

Apparatuses, systems, and methods for bounded fault compliant metadata storage. Memory devices include a first data terminal and a second data terminal. As part of an access operation a first set of data and a first set of metadata may be sent / received across the first terminal and a second set of data and a second set of metadata may be sent / received across the second terminal. The first set of metadata may be stored in a first location and the second set of metadata may be stored in a second location in the memory array, such as a first and second column plane. The two locations may be remote from each other.

The invention discloses a data reconstruction method and device, a storage medium and a program product, and relates to the technical field of data storage, and the method comprises the following steps: reconstructing an initial redundant array of independent disks according to a hard disk state of the initial redundant array of independent disks to obtain a target redundant array of independent disks; after the reconstruction of the initial redundant array of independent disks is completed, establishing a mapping relation between the initial redundant array of independent disks and the target redundant array of independent disks, and storing the mapping relation based on metadata to obtain corresponding target metadata, and recovering the target redundant array of independent disks to the initial redundant array of independent disks according to the target metadata. When the disk fails or restores to normal for data reconstruction, the corresponding data can be directly written back according to the mapping condition between the blocks, additional check block calculation is not needed, and the data recovery speed is increased.

The invention belongs to the technical field of vehicle-mounted upgrading control, and particularly relates to a vehicle-mounted entertainment system upgrading method and system based on Flash CAN, the method comprises the steps of hardware preparation, firmware updating file obtaining and upgrading, the upgrading process comprises the steps that current vehicle-mounted entertainment system firmware is backed up, the downloaded firmware updating file is verified, the next step is continued if verification succeeds, and the next step is continued if verification succeeds; and if the verification fails, the firmware update file is downloaded again, a specified Flash storage area is erased, the upgrade management module requests and transmits a data packet of the firmware update file to the embedded control unit, and if the request or the transmission fails, the upgrade management module rolls back to an original system, and the steps of data receiving and verification, restarting and verification are carried out, and verifying whether the functions of the vehicle-mounted entertainment system are normal. According to the invention, the risk of upgrade failure is reduced, the upgrade efficiency is improved, the security of the system is enhanced, and the system abnormity caused by improper upgrade is effectively avoided.

The invention discloses a computer memory bank fault prediction method and system based on deep learning, and relates to the technical field of computer hardware fault diagnosis, and the system comprises a multi-source time sequence data collection module which is used for obtaining memory bank operation state data in real time; the dynamic feature enhancement module is based on a composite architecture of a generative adversarial network and transfer learning, comprises a fault mode generator, and generates synthetic data consistent with real fault distribution by using an LSTM network; aligning feature spaces of different hardware platforms through a maximum mean difference loss function; the multi-modal fusion deep learning model comprises a space-time convolutional network, a graph attention network and an adaptive weight adjustment mechanism; and the fault early warning analysis module is used for analyzing a fault probability predicted value, an interpretable thermodynamic diagram and a maintenance suggestion. According to the invention, passive maintenance is changed into active prevention and control, and preposition and precision of fault management are realized through dual mechanisms of long-term trend prediction and short-term risk early warning.

The present application discloses a data management method, apparatus and system for a distributed storage system, and an electronic device. The method comprises: traversing all storage paths in a target distributed storage cluster, and acquiring file storage information of the storage paths during traversal; on the basis of the file storage information, calculating a redundancy policy score of each storage path, and on the basis of the redundancy policy score and a first redundancy policy score threshold, determining a storage policy adapted to the storage path; when it is determined that the storage policy adapted to the storage path is an erasure code storage policy, determining a data recovery mode of the storage path on the basis of the architecture information of the storage path; and when it is determined that the storage policy adapted to the storage path is a multi-copy storage policy, determining the number of copies of the storage path on the basis of a service importance degree of the storage path and the redundancy policy score.

Apparatuses, systems, and methods for an enhanced ECC mode. The memory array includes a number of data column planes and an extra column plane. When the memory device is set in an Enhanced ECC mode, data is stored in a subset of the data column planes, and an error correction code circuit (ECC) stores corresponding parity data in one of a column plane other than one of the subset of data column planes or the extra column plane. In this manner, memory may be capable of performing single error correction or single error correction with double error detection (SECDED) depending on the mode selected.

The invention discloses a data dynamic migration and storage method, device and equipment and a medium, and relates to the technical field of computers. The method comprises the steps that environment parameters of a current mechanical hard disk in a distributed cluster are collected; wherein the environment parameters comprise a vibration parameter, a temperature parameter and a noise parameter; quantifying the input and output delay performance of the current mechanical hard disk by using the environmental parameters of the current mechanical hard disk; if the input and output delay performance of the current mechanical hard disk is greater than a preset threshold value, searching a target mechanical hard disk combination in the distributed cluster; and migrating and storing the target data block of the current mechanical hard disk into the target mechanical hard disk combination based on an erasure code and a multi-copy mechanism. Through the scheme, the reliability of storing the data in the mechanical hard disk in the distributed cluster is remarkably improved.

Methods and apparatus for application aware memory patrol scrubbing techniques. The method may be performed on a computing system including one or more memory devices and running multiple applications with associated processes. The computer system may be implemented in a multi-tenant environment, where virtual instances of physical resources provided by the system are allocated to separate tenants, such as through virtualization schemes employing virtual machines or containers. Quality of Service (QoS) scrubbing logic and novel interfaces are provided to enable memory scrubbing QoS policies to be applied at the tenant, application, and / or process level. This QoS policies may include memory ranges for which specific policies are applied, as well as bandwidth allocations for performing scrubbing operations. A pattern generator is also provided for generating scrubbing patterns based on observed or predicted memory access patterns and / or predefined patterns.

The invention discloses a full-stack NPU system supporting a multistage fault mitigation mechanism, and the system comprises a plurality of NPU functional blocks which are used for executing a neural network calculation task; the plurality of hardware protection modules are used for providing error detection and correction capabilities for at least one NPU functional block in the NPU or a data path in the NPU; and a control mechanism for coordinating operation of the plurality of hardware protection modules. By means of the scheme, NPU functional block calculation errors or data path transmission errors caused by hardware faults and the like can be detected and corrected in time, wrong calculation results are prevented from being continuously used or output, and the accuracy of final results is guaranteed. Meanwhile, even if part of hardware breaks down, an error correction mechanism can also cover errors to a large extent, normal operation of the system is maintained, the overall availability and task success rate of the system are improved, and therefore the reliability and robustness of the NPU are remarkably improved.

The invention discloses a large model generation content traceability technology based on model copyright ID watermark embedding, which comprises the following steps that: firstly, a large model content generator compiles a dynamic watermark embedding process into an arithmetic circuit, and generates a watermark text and a proof by using a zero-knowledge proof algorithm; then the large model content generator publishes the text with the watermark and the proof together, and hides the copyright ID and the secret key; a large model content user verifies the proof and the watermarked text through a smart contract by adopting a zero-knowledge verification algorithm; after verification is passed, an adversarial sample corresponding to the text with the watermark is generated, an adversarial training method is used for optimizing the text with the watermark, and parameters of the Viterbi balance algorithm are dynamically adjusted and improved. According to the method, the concealment and the generation quality are balanced, high-capacity watermark embedding is realized, the tamper resistance and the accurate traceability of multi-model copyright disputes are improved, and the privacy protection intensity is improved.

Apparatuses, systems, and methods for enhanced metadata information. The memory array includes a number of column planes and an extra column plane. A memory device is set in an x4 single-pass operational mode. In this mode, the memory may store a data codeword in a selected ones of the column planes, and metadata may be stored in a non-selected ones of the column planes and in the extra column plane. An error correction code circuit (ECC) may store parity bits associated with the data and metadata in the non-selected ones of the column planes. In this manner, the data, metadata, and parity may be accessed as part of a single access of the memory array.

The invention provides a remote intelligent operation monitoring method and system for an intelligent substation, relates to the technical field of intelligent operation and maintenance of substations, and relates to multi-source heterogeneous sensing, depth feature modeling, fault prediction evaluation and model self-optimization. According to the method, electrical, environmental and meteorological data are collected through heterogeneous sensors, a structured original data set is constructed, time sequence prediction is carried out in combination with a convolution-LSTM model, a Transform fusion network is utilized to output a fault probability and a confidence interval, online early warning and response control are realized, and the method has a federated learning driven adaptive updating capability.

The present invention discloses an SSD solid state drive data storage method, which relates to the technical field of solid state drives, and comprises the following steps: a data receiving and classification step: receiving data to be stored from a host system, classifying the data based on a predefined data feature library through a data identification module, and dividing the data into system key data, application data and user common data, wherein the predefined data feature library contains typical file formats, data header information and access frequency feature information of each type of data; a storage area planning step: dividing the SSD solid state drive into a plurality of storage areas according to its internal architecture, including at least one high-speed and high-reliability core storage area for storing system key data, a plurality of medium-performance storage areas for storing application data and a large-capacity storage area for storing user common data; achieving significant beneficial effects such as efficient use of storage resources and safe and reliable data.

The invention discloses a power grid material sampling inspection management method for realizing whole-course tracing based on intelligent sample sealing, and relates to the technical field of electric power material management and intelligent perception, and the method comprises the following steps: S1, an initialization stage: executing a sample sealing coding segmentation pre-configuration process, distributing independent numbered segments to each sample sealing terminal, and the central control module synchronizes the use state of the terminal code to realize distributed isolation of code generation. According to the invention, coding uniqueness is realized through segmented pre-configuration and global duplicate checking, identity information security is guaranteed by adopting chip one-time write protection and tamper-proof technologies, and sample packet switching and data counterfeiting are effectively prevented by combining automatic acquisition and multi-round consistency comparison. Abnormal recognition and closed-loop processing ensure that abnormal events are frozen in time and responsibility is traced, and irregular samples are prevented from flowing into subsequent links. The whole-process auditing and dynamic optimization enable the management process to be self-perfected, and the intelligence, standardization and reliability of sampling inspection of the power grid materials are remarkably improved.

Apparatuses, systems, and methods for per row error correct and scrub (pRECS) information. There may be pRECS information associated with each row, and it may reflect a number of codewords stored along that row which were determined to include an error during error correct and scrub (ECS) operations. The memory may store the pRECS information in the memory array, for example, each row may store the pRECS information associated with that row.

A memory subsystem includes memory devices with space dynamically allocated for improvement of reliability, availability, and serviceability (RAS) in the system. Error checking and correction (ECC) logic detects an error in all or a portion of a memory device. In response to error detection, the system can dynamically perform one or more of: allocate active memory device space for sparing to spare a failed memory segment; write a poison pattern into a failed cacheline to mark it as failed; perform permanent fault detection (PFD) and adjust application of ECC based on PFD detection; or, spare only a portion of a device and leave another portion active, including adjusting ECC based on the spared portion. The error detection can be based on bits of an ECC device, and error correction based on those bits and additional bits stored on the data devices.

The invention relates to the technical field of edge computing, and discloses an intelligent edge computing co-processing system based on an integrated circuit, which comprises a heterogeneous computing cluster module, a hardware computing unit set, a multi-core control processor based on RISC-V, a programmable pulse tensor computing array and a reconfigurable engine oriented to streaming processing, according to the intelligent edge computing cooperative processing system based on the integrated circuit, zero-delay data exchange is realized through silicon intermediate layer integration of the heterogeneous computing cluster module and a snakelike data channel, and traditional bus arbitration delay is eliminated through real-time operation code analysis and optimal optical communication path mapping of the hardware task routing matrix (TRF) module; the priority path distribution of the task scheduling subsystem is synchronously coordinated with the time-sensitive task, so that the collaborative efficiency of the computing unit is improved in multiple dimensions, the non-blocking transmission of the high-priority task is ensured, and the effect of enhancing the overall processing capability and response speed of the intelligent edge computing is achieved.

An information transfer system may include: a master controller (XMC) configured to issue a command in the form of a memory protocol data packet, and wherein the master controller is configured to generate routing information indicating whether the memory protocol data packet is to be processed according to a first protocol or according to a second protocol different from the first protocol. The information transfer system may also include a slave controller (XSC) configured to receive the memory protocol data packet from the master controller, wherein the slave controller is configured to use the routing information to selectively cause the memory protocol data packet to be processed according to the first protocol or according to the second protocol.