17results about "Error correction/detection using block codes" patented technology

An integrated circuit includes data terminals 0 to 11; an ECC encoder circuit configured to operate an H matrix on transmission data to be transmitted to the data terminals 0 to 11 to generate a transmission parity code, the transmission parity code corresponding to the transmission data; and an ECC decoder circuit configured to operate the H matrix on reception data and a reception parity code received through the data terminals 0 to 11 to detect and correct an error in the reception data. A data portion of the H matrix is divided into 24 groups, each of the 24 groups includes a group matrix portion and a non-group matrix portion, the group matrix portion is used by k group matrices that circulate in the 24 groups, and each time the k group matrices circulate one round, positions of the k group matrices inserted in groups is shifted.

An encoding method, applied to the field of encoding technologies, may be used for reducing the delay and reducing the decoding memory, and includes: obtaining a data signal including a plurality of information bits; and performing encoding process on the data signal to obtain an encoded signal. An encoding block in the encoded signal includes a first encoding sub-block and at least one second encoding sub-block. The first encoding sub-block includes first component codewords and second component codewords, and all information bits constitute an information bit matrix. Each second encoding sub-block includes a first check matrix, which includes first check bit sets each determined based on bits of a first bit matrix with same side lengths, and the first check bit set and the bits of the first bit matrix constitute a third component codeword.

A communication device may include: a processor configured to perform a procedure comprising: receiving a first consensus check code from a first communication device; receiving a second consensus check code from a second communication device; generating a combination code by network encoding the first consensus check code and the second consensus check code; and instructing the transmission of the combination code to the first communication device and to the second communication device.

A method for improving the forward error correction in serial coding in a data transmission in a vehicle allowing the physical behavior on a transmission channel to always be deterministically controlled despite a reduction in the resource requirements. Tit errors are minimal and a transmission error can be corrected efficiently. In addition, encoders used are designed with a minimum number of gates and an interleaving is implicit in the proposed method, which is based on the fact that burst errors can be corrected particularly advantageously. This interleaving makes it possible to dispense with conventional buffer memory required for explicit interleaving. In addition, user data together with correcting metadata can be encoded advantageously. It can be ensured that not only the user data is line-coded or line-encoded, but also the correction data. Also provided is a system for implementing the method.

A coding method and apparatus are provided. The method includes: coding an information bit by using a preset generator matrix of a systematic (U|U+V)-code to obtain a codeword of a systematic code. The preset generator matrix of the systematic (U|U+V)-code includes a first identity sub-matrix of a U code and a second identity sub-matrix of a V code. A plurality of elements in a same column as the first identity sub-matrix are all 0. A plurality of elements in a same column as the second identity sub-matrix are all 0.

The invention relates to a method for generating an efficiently transmittable bit sequence with a limited degree of discrepancy and a limited run length. The proposed method allows a particularly efficient transmission of data over a transmission channel. Compared with the prior art, one of the advantages of the invention is that the physical behavior on the transmission channel can be certainly controlled all the time although the resource demand is reduced. Thus, according to the proposed method, bit errors are few, and transmit errors can be corrected efficiently (i.e., with little technical effort). Furthermore, the encoder used is designed to have a minimum number of gates, and interlacing is implied in the proposed method, which ensures that so-called burst errors can be particularly advantageously corrected.

An error correction apparatus (20) that performs two-bit error correction decoding using a block error correcting code includes: a syndrome generation unit (1) that generates a syndrome pattern from a reception sequence; a number-of-errors determination unit (2) that determines a number of bit errors in the reception sequence based on the syndrome pattern; and a two-bit error candidate error correction unit (5) that calculates a first parameter based on the syndrome pattern in a case where the number-of-errors determination unit (2) determines that there is a two-bit error and that there is a possibility of correction of the two-bit error, excepts the first parameter, from the first parameter to be used, based on which the number-of-errors determination unit determines that the two-bit error is uncorrectable, and obtains a normalized root for the two-bit error by using a second parameter obtained by degeneracy of the first parameter by one bit, the first parameter being a constant term of a normalized polynomial and being a normalized parameter, the normalized polynomial being obtained by normalization of a quadratic error locator polynomial.

A decoding method implemented at a decoder. The method includes determining a current channel realized reliability metric for each symbol in a received sequence of symbols. The current channel realized reliability metrics of the symbols are then sorted to identify a predetermined number of most reliable independent bits in the sequence. A set of one or more bit-flip patterns are then enumerated based on the current channel realized reliability metrics of the predetermined number of the most reliable independent bits in the sequence. The set of bit-flip patterns or a subset thereof are then applied to a received vector corresponding to the sequence of symbols to decode a codeword.

Technologies for storing burst error information in a buffer structure and signaling to prevent overflow and over-writing the buffer structure are described. One controller device includes error detection logic, a buffer, and buffer control logic. The error detection logic detects an error in a read operation associated with a memory device coupled to the controller device. The buffer stores error information associated with the error. The buffer control logic generates and outputs a first signal responsive to the buffer being full.

Apparatuses, systems, and methods for an enhanced ECC mode. The memory array includes a number of data column planes and an extra column plane. When the memory device is set in an Enhanced ECC mode, data is stored in a subset of the data column planes, and an error correction code circuit (ECC) stores corresponding parity data in one of a column plane other than one of the subset of data column planes or the extra column plane. In this manner, memory may be capable of performing single error correction or single error correction with double error detection (SECDED) depending on the mode selected.

Provided are a communication method, a communication device, and a storage medium. The communication method applied to the first communication device includes performing, based on code type indication information, FEC decoding on part or all of associated downstream slots using an FEC code type corresponding to the code type indication information (S110), where the code type indication information is received from a second communication device and is used to indicate an FEC code type used in at least one of the associated downstream slots.

The present invention relates to a method for improving forward error correction in serial coding during data transmission in a vehicle and, compared to the prior art, it offers, among other things, the advantage that the physical behaviour on a transmission channel can always be deterministically controlled despite a reduction in resource requirements. Thus, according to the proposed method, bit errors are minimal and a transmission error can be corrected efficiently, i.e. with minimal technical effort. Furthermore, the encoders used are designed with a minimal number of gates, and the proposed method implicitly includes a form of nesting that allows so-called burst errors to be corrected particularly advantageously. This implicit nesting makes it possible to eliminate the need for the conventional buffer memories required by explicit nesting. In addition, the invention ensures that user data, together with corrective metadata, can be encoded in a manner that is advantageous for transmission. According to the invention, it can be ensured that not only the user data is line-coded or channel-coded, but also the correction data. The present invention also relates to a similarly designed system arrangement for carrying out the method, and to a computer program product comprising control commands which execute the method.

The present invention relates to a method for improving forward error correction in serial coding in data transmission in a vehicle and, compared to the prior art, the invention produces, inter alia, the advantage that physical behavior on the transmission channel can always be deterministically controlled despite reduced resource requirements. Thus, according to the proposed method, bit errors are few, and transmit errors can be corrected efficiently (i.e., with little technical effort). Furthermore, the encoder used is designed to have a minimum number of gates, and interleaving is implied in the proposed method based on the fact that so-called burst errors can be particularly advantageously corrected. This implicit interleaving makes it possible to dispense with the conventional buffer memory required for explicit interleaving. In addition, the present invention ensures that user data together with correction metadata can be advantageously encoded with respect to transmission. According to the invention, not only user data can be ensured, but also correction data can be ensured to be line-coded or line-coded. The invention also relates to a similarly designed system arrangement for carrying out the method, and to a computer program product having control commands for carrying out the method.

Provided are an encoding method, a decoding method, a communication node, and a storage medium. The encoding method includes the following: An uncoded physical frame is acquired, where the uncoded physical frame includes a first data block and a second data block, and the first data block includes a type of a flexible forward error correction, FEC, code. The second data block is encoded according to the type of the flexible FEC code.

The present invention relates to a method for generating a bit sequence that can be transmitted efficiently and has a limited disparity and a limited run length. The proposed method allows data to be able to be transmitted particularly efficiently on a transmission channel. Compared to the prior art, the invention offers, among other things, the advantage that the physical behaviour on a transmission channel can always be deterministically controlled despite a reduction in resource requirements. Thus, according to the proposed method, bit errors are minimal and a transmission error can be corrected efficiently, i.e. with minimal technical effort. Furthermore, the encoders used are designed with a minimal number of gates, and the proposed method implicitly includes an form of nesting that allows so-called burst errors to be corrected particularly advantageously.

A device includes one or more processors configured to obtain first bits representing first encoded time-series data and to obtain a first indicator of reliability of the first bits. The one or more processors are also configured to process an input using one or more trained models to generate decoded output. The input is based at least in part on the first bits and the first indicator, and the decoded output represents decoded time-series data.

A method for improving forward error correction in serial coding during data transmission in a vehicle offers an advantage that the physical behavior on a transmission channel can be deterministically controlled despite a reduction in resource requirements. A number of gates in the forward error correction encoders is reduced by using preliminary calculations of the forward error correction on individual subwords to minimize exponential growth in a number of gates required. Bit errors are minimal and a transmission error can be corrected efficiently. Encoders used are designed with a minimal number of gates, and the proposed method implicitly includes nesting that allows so-called burst errors to be corrected advantageously. This nesting makes it possible to eliminate conventional buffer memory required by explicit nesting. The method further ensures that user data and corrective metadata, can be encoded for advantageous transmission. Also provided is a system for implementing the method.