This disclosure provides a
data access method, a
memory controller, an electronic device, and a medium, relating to the field of
chip technology. It includes: determining a first storage region in a
memory cell of a
dynamic random access memory (
DRAM), the first storage region being used to store
error detection and correction (ECC) data; responding to write command information corresponding to an access request, determining first ECC data corresponding to the write command information, the first ECC data being used to verify the write data corresponding to the write command information; storing the write data corresponding to the write command information and the first ECC data in the same first
memory cell, the first ECC data being stored in the first storage region within the first
memory cell. The method proposed in this disclosure, while ensuring
data integrity, significantly reduces space overhead, row activation latency, and bandwidth usage, improving the effective bandwidth and access efficiency of
DRAM.