1705 results about "Cyclic redundancy check" patented technology

Iterative decoder employing multiple external code error checks to lower the error floor and/or improve decoding performance. Data block redundancy, sometimes via a cyclic redundancy check (CRC) or Reed Solomon (RS) code, enables enhanced iterative decoding performance. Improved decoding performance is achieved during interim iterations before the final iteration. A correctly decoded CRC block, indicating a decoded segment is correct with a high degree of certainty, assigns a very high confidence level to the bits in this segment and is fed back to inner and/or outer decoders (with interleaving, when appropriate) for improved iterative decoding. High confidence bits may be scattered throughout inner decoded frames to influence other bit decisions in subsequent iterations. Turbo decoders typically operate relatively well at regions where the BER is high; the invention improves iterative decoder operation at lower BERs, lowering the ‘BER floor’ that is sometimes problematic with conventional turbo decoders.

The invention discloses a hybrid automatic repeat request transmission method based on a polarization code. The hybrid automatic repeat request transmission method based on the polarization code comprises the following steps: after a coding bit sequence obtained after polarization coding is carried out to a sent information bit sequence is punched via a sending end, sending into a channel to be transmitted; decoding a received signal by a receiving end for CRC (cyclic redundancy check); if the received signal passes the check, feeding back an ACK (acknowledgement character) signal to the sending end, and otherwise, sending a NACK (negative acknowledgement) signal; if the sending end receives the NACK signal, sending one part of uncoded information bits to a receiving end again; according to the coding bit received for the first time and a newly-received information bit, decoding again by the receiving end; if a decoding result still does not pass the CRC, sending the other part of uncoded information bits to the receiving end again by the sending end; according to the coding bit received for the first time, the information bit received in the previous time and the newly-received information bit, decoding again by the receiving end; continuously executing the process; and finishing one whole transmission process until the sending end receives the ACK signal or the number of sending times reaches a preset maximum value.

A system and method for detecting malware on a mobile platform in a mobile network. The system and method verifies that an executable is malware-free by computing the checksum of the executable and comparing that checksum with a checksum obtained from a malware-free copy of the executable. The checksum is a sum of all 32-bit values in a code section and an import section of said executable, a byte sequence at an entry point in said executable, a size descriptor of an import table, a size descriptor of said import section, a cyclic redundancy check of said executable, or a combination thereof.

A method for detecting control information in a wireless communication system is provided. The method includes checking a cyclic redundancy check (CRC) error by monitoring control channels, determining whether a value of an error check field is equal to a specific value, and, if the value of the error check field is equal to the specific value, detecting the control information on the control channel.

A method of controlling a transmit power of an uplink channel is provided. Downlink control information of which Cyclic Redundancy Check (CRC) parity bits are masked with a TPC identifier is received on a downlink control channel. The transmit power of the uplink channel is adjusted based on a TPC command in the downlink control information.

A portable device, such as a mobile terminal or user equipment, for encoding uplink acknowledgments to downlink transmissions. The portable device includes a receiver configured to receive a plurality of data blocks, such that each of the data blocks include an associated cyclic redundancy check (CRC), and a processor configured to determine received status for each of the data blocks by checking the CRC of each of the data blocks. The portable device further includes a transmitter for transmitting a response sequence which indicates the received status of all of the data blocks.

A wireless communications adapts its mode of operation between spatial multiplexing and non-spatial multiplexing in response to transmission-specific variables. An embodiment of a wireless communications system for transmitting information between a base transceiver station and a subscriber unit includes mode determination logic. The mode determination logic is in communication with the base transceiver station and the subscriber unit. The mode determination logic determines, in response to a received signal, if a subscriber datastream should be transmitted between the base transceiver station and the subscriber unit utilizing spatial multiplexing or non-spatial multiplexing. In an embodiment, the mode determination logic has an input for receiving a measure of a transmission characteristic related to the received signal. In an embodiment, the mode determination logic includes logic for comparing the measured transmission characteristic to a transmission characteristic threshold and for selecting one of spatial multiplexing and non-spatial multiplexing in response to the comparison of the measured transmission characteristic to the transmission characteristic threshold. In an embodiment, the transmission characteristic includes at least one of delay spread, post-processing signal-to-noise ratio, cyclical redundancy check (CRC) failure, residual inter-symbol interference, mean square error, coherence time, and path loss. By adapting the mode of operation in response to transmission-specific variables, the use of spatial multiplexing can be discontinued in unfavorable conditions. Additionally, because the wireless communications system can adapt its mode of operation between spatial multiplexing and non-spatial multiplexing, the communications system is compatible with both subscriber units that support spatial multiplexing and subscriber units that do not support spatial multiplexing.

The invention relates to a polarization code decoding method for cyclic redundancy check assistance. When a polarization code is decoded, in all the routes with cyclic redundancy check values of corresponding bit estimation sequences of being zero from a root node to leaf nodes on a code tree corresponding to the polarization code, one route with maximum reliability metric value is searched by taking a list or stack as assistance for route search, and the bit estimation sequence corresponding to the route is output as a decoding result. The method comprises the following operation steps of: determining parameters according to a search assistance method, constructing an auxiliary structure of the decoding method, searching a candidate bit estimation sequence and executing cyclic redundancy check. By adopting the method disclosed by the invention, error correcting capability of a communication system which adopts the polarization code as channel coding is greatly improved, operation steps are simpler, and operation complexity is equivalent to or even lower than that of a Turbo code coding and decoding method used in a WCDMA (wideband code division multiple access) system, thus the method disclosed by the invention has a good practical prospect.

A method and apparatus of multi-Cyclic Redundancy Checking (CRC) are provided for section detection and reliability information acquisition in a Digital Video Broadcasting-Handheld (DVB-H) system. A Packet Identifier (PID) filtering process is performed for a packet received through a radio network. A transport stream packet including section data is detected. A CRC process is performed for a payload of an associated section using header information of the section data and frame buffering is processed. The method and apparatus can perform CRC in a parallel fashion using multiple CRC checkers without interference between adjacent sections and can perform section detection and reliability verification.

A computer random access memory is divided into first and second partitions. Each partition has its own operating system (OS). The first partition has a conventional OS and is designated for non-Internet use. The second partition is designated for secure Internet access, and has an OS specific for Internet usage. Software in the second partition cannot write or copy files in the second partition. The size of the second partition is fixed and unchangeable while said second partition is open. Each software application in the second partition is allocated a memory region that cannot be changed, thereby preventing memory overflow attacks. A secure memory is designated for temporary storage of software used in the second partition. Cyclic redundancy check (CRC) values are calculated for all files in the secure memory. To detect unauthorized file changes, CRC values are calculated for all files used in the second partition, and checked against values stored in the secure memory. The second partition can write only to a secure memory using a security arrangement such as password protection or a download memory separate from the first partition to allow files stored in the download memory to be examined by scanning and testing from the first partition prior to being stored elsewhere in the computer.

An improved method and system for generating a frame check sequence. A multiple-bit data string, M, is received in which M is of the form:M is thereafter parsed into multiple subframes of the form:andThe subframes are padded with zeros resulting in subframes of the form:andA partial check sum is then generated for each of the multiple subframes. Finally, each of the partial check sums are added together such that a frame check sequence for M is obtained.

A dynamic-content web crawler is disclosed. These New Crawlers (NCs) are located at points between the server and user, and monitor content from said points, for example by proxying the web traffic or sniffing the traffic as it goes by. Web page content is recursively parsed into subcomponents. Sub-components are fingerpinted with a cyclic redundancy check code or other loss-full compression in order to be able to detect recurrence of the sub-component in subsequent pages. Those sub-components which persist in the web traffic, as measured by the frequency NCs (6) are defined as having substantive content of interest to data-mining applications. Where a substantive content sub-component is added to or removed from a web page, then this change is significant and is sent to a duplication filter (11) so that if multiple NCs (6) detect a change in a web page only one announcement of the changed URL will be broadcast to data-mining applications (8). The NC (6) identifies substantive content sub-components which repeatably are part of a page pointed to by a URL. Provision is also made for limiting monitoring to pages having a flag authorizing discovery of the page by a monitor.

The embodiment of the invention discloses a data transmission method, which comprises the following steps: dividing a transmission block into at least one group, wherein each group comprises at least one coding block; adding cyclic redundancy check CRC bits to each group; and sending the group after addition of the CRC bits. Meanwhile, the embodiment of the invention discloses a data transmission device and a communication system based on grouping concept; and groups corresponding to check errors are retransmitted, so that data retransmission is greatly reduced and simultaneously large throughput gain is acquired.

Error detection circuitry is provided on a programmable logic resource. Programmable logic resource configuration data is loaded into a cyclic redundancy check (CRC) module where a checksum calculation may be performed. In one embodiment, the checksum may be compared to an expected value, which is a precomputed checksum on data prior to being programmed into or while data is being programmed into a programmable logic resource. In another embodiment, the expected value may be included in the checksum calculation. An output indicating whether an error is detected may be generated depending on the relationship between the checksum and the expected value, or on the value of the checksum. This output may be sent to an output pin that is accessible by user logic.

A system and method for using a cyclic redundancy check (CRC) to evaluate error corrections. A set of data and initial CRC values associated therewith may be received. The set of data by changing a sub-set of the data may be corrected. Intermediate CRC values may be computed for the entire uncorrected set of data in parallel with said correcting. Supplemental CRC values may be computed for only the sub-set of changed data after said correcting. The intermediate and supplemental CRC values may be combined to generate CRC values for the entire corrected set of data. The validity of the corrected set of data may be evaluated by comparing the combined CRC values with the initial CRC values.

A memory system provides data error detection and correction and address error detection. A Single-byte Error-Correcting/Double-byte Error-Detecting (SbEC/DbED) code with the byte being a 4-bit nibble is used to detect up to 8-bit errors and correct data errors of 4 bits or less. Rather than generating address parity, which is poor at detecting even numbers of errors, a cyclical-redundancy-check (CRC) code generates address check bits. A 32-bit address is compressed to just 4 address check bits using the CRC code. The 4 address check bits are merged (XOR'ed) with two 4-bit nibbles of the data SbEC/DbED code to generate a merged ECC codeword that is stored in memory. An address error causes a 2-nibble mis-match due to the redundant merging of the 4 address check bits with 2 nibbles of data correction code. The CRC code is ideal for detecting even numbers of errors common with multiplexed-address DRAMs.

A method of mobile communication including a transmitter having multiple transmitters and a receiver having multiple receivers. The method includes adding a cyclic redundancy check (CRC) code to a data block to be transmitted and spatially segmenting the data block according to a modulation scheme and a coding rate of each respective transmit antenna of the multiple antennas.

The invention discloses a polarization decoding method based on subsection CRC and belongs to the technical field of wireless communication channel coding. The subsection CRC (cyclic redundancy check) is utilized to improve an existing list successive elimination polarization decoding algorithm, and subsection polarization code CRC is carried out on an original information sequence at a coding end; and at a decoding end, the whole list successive elimination and decoding process is enabled to be divided into a plurality of subsections, CRC is carried out in each subsection, and unsuccessful decoding is judged according to the CRC check result or screening of ineffective paths is carried out. The subsection CRC and the list successive elimination polarization decoding algorithm are combined, so that time complexity of polarization decoding can be effectively reduced, and especially in the low SNR (signal to noise ratio) region, the time complexity of decoding is reduced obviously.

An automatic retransmission request control system in OFDM-MIMO communication system. In this system, an ACK/NACK output part (320) of a receiver transmits, to a transmitter, a feedback information of positive or negative response based on the result of a cyclic redundancy check. An error data stream decision part (310) of the transmitter determines, based on the feedback information, a data stream that need be retransmitted, and a retransmission mode selection part (312) selects a retransmission mode from among (a) a mode in which to transmit the data, which are to be retransmitted, via the same antenna as in the previous transmission, while transmitting, at the same time, new data by use of an antenna via which no data retransmission is requested; (b) a mode in which to transmit the data, which are to be retransmitted, via an antenna via which no retransmission is requested, while transmitting new data via another antenna at the same time; (c) a mode in which to use STBC to retransmit the data via an antenna via which no retransmission is requested; and (d) a mode in which to use STBC to retransmit the data via all the available antennas.

Methods, systems and devices for remotely updating software installed on a digital signal processor (DSP) without setting the mode select pins on the DSP control card. Firmware configured to suspend operations upon receiving a programming signal is installed on the processor. A controlling computing device send the programming signal, causing the processor to halt execution, erase portions of the firmware, set an update firmware flag, and send control signals to the controlling computing device. The remote computing device sends updated firmware and an application program cyclic redundancy check to the processor. The processor compares a cyclic redundancy check of an on-chip flash memory with the received application program cyclic redundancy check. If the two match, the processor installs the received firmware, unsets the update firmware flag, and restarts itself.

A method for detecting an error in data stored in configuration SRAM and user assignable SRAM in a FPGA comprises the steps of providing a serial data stream into the FPGA from an external source, loading data from the serial data stream into the configuration SRAM in response to address signals generated by row column counters, loading data from the serial data stream into the user assignable SRAM in response to address signals generated by row and column counters, loading a seed and signature from the serial data stream into a cyclic redundancy checking circuit, cycling data out of the configuration SRAM and the user assignable SRAM by the row and column counters; performing error checking on the data that has been cycled out of the configuration SRAM and out of the user assignable SRAM by the cyclic redundancy checking circuit, and generating an error signal when an error is detected by the error checking circuit.