151results about "Error correction/detection using convolutional codes" patented technology

The invention discloses a system convolutional code parameter blind identification method and device and a storage medium, and belongs to the technical field of digital communication. The method comprises the following steps: S1, acquiring binary code stream data and constraint length of a system convolutional code; s2, constructing a coefficient matrix according to the initial constraint length and the initial code length, performing Walsh transformation and counting the number of peak values; s3, traversing the code length and the constraint length of the convolutional code of the system; s4, obtaining a correct code length and a correct constraint length from the binary code stream data; s5, selecting an initial position according to the correct code length and the correct constraint length; s6, traversing the initial position, and performing Gaussian transformation on the system matrix; and S7, according to the matrix after Gaussian transformation of the system convolutional code, obtaining a correct initial position and a check matrix so as to obtain parameter information of the system convolutional code. The method has the advantages of being high in recognition speed, small in required data size, high in fault tolerance, capable of meeting the recognition requirement of a high code rate and the like.

A data processing method and apparatus are disclosed, which may be applied to communication systems such as 5G systems and 6G systems. The method includes: obtaining an extended first codebook based on a second codebook by increasing a quantity of codewords or lengths of codewords, and performing first network coding or decoding based on the first codebook. Linear independence between codewords in the extended first codebook may be ensured as much as possible, so as to generate more valid redundant packets or check packets, thereby improving system reliability. Alternatively, flexible block lengths are supported, so as to perform efficient network coding or decoding on more original data packets, thereby improving system spectral efficiency. This application may be applied to an extended reality (XR) service or a low-delay service.

A wireless device may receive a first code block of one or more code blocks associated with a transport block for the wireless device. The wireless device may output, using a neural network model associated with the wireless device, a set of low-density parity-check (LDPC) quantization values for a set of iterations of an LDPC decoding procedure for the first code block. In some examples, the set of LDPC quantization values may include respective LDPC quantization values for respective iterations of the set of iterations. The wireless device may perform one or more iterations of the LDPC decoding procedure for the first code block in accordance with one or more LDPC quantization values of the set of LDPC quantization values output using the neural network model.

Methods and devices are provided in which a channel encoded with a polarization-adjusted convolutional (PAC) code is received. A decoded codeword is generated based at least in part on simplified successive cancellation list (SSCL) decoding performed on the channel via a decoding tree. The decoding tree includes a node that generates candidate codeword output based on predefined processing using convolutional code (CC) state input and channel vector input. A sub-tree of the node remains unprocessed.

Methods, systems, and devices for a memory device with an error correction memory device with fast data access are described. For example, during a read operation, a memory device may be configured to output the data indicated by the read operation concurrent with performing an error correction operation. If the memory device detects an error, the memory device may indicate the error to a host device and, in some cases, output the corrected data to the host device. During a write operation, the memory device may store error detection or correction information associated with data to be stored at the memory device. The memory device may, in some cases, store error detection or correction information generated by the host device.

This communication device may apply convolution precoding to a bit sequence, polar-encode the convolution-precoded bit sequence, and transmit same. When the size of a polar coder for convolution precoding is 2N, pre-determined values are mapped to last m bit indexes from among first N bit indexes in a bit sequence having the length of 2N, which is an input for the convolution precoding, and bit values of an information block are mapped to K bit indexes from among remaining (2N-m) bit indexes.

The present application provides a method and communication device for rate matching of a convolutional code, wherein a puncture pattern of a second codeword at a second code rate is obtained based on a puncture pattern of a first codeword at a first code rate, wherein a second puncture position set of the second codeword is a subset of the first puncture position set of the first codeword. When a transmitting end device reduces the code rate from the first code rate to the second code rate, redundant bits are transmitted at positions in the second puncture position set that are the complement of the first puncture position set. Compared to the first puncture position set, the second puncture position set can obtain more incremental redundant bits, thereby reducing the channel coding rate and improving the decoding performance of the convolutional code.

The invention discloses a PAC code fast decoding method and system based on a neural network, and relates to the technical field of communication channel coding and decoding, and the method comprises the steps: obtaining a plurality of code words to be decoded and LLR values thereof; classifying according to the LLR value of each code word to be decoded, and determining an optimal decoding algorithm corresponding to each code word to be decoded; based on the LLR value of each code word to be decoded and the optimal decoding algorithm, training a neural network model to obtain a trained neural network model; obtaining a target to-be-decoded codeword and an LLR value thereof, inputting the LLR value of the target to-be-decoded codeword into the trained neural network model, and determining an optimal decoding algorithm corresponding to the target to-be-decoded codeword; and decoding the target to-be-decoded codeword by using the optimal decoding algorithm corresponding to the target to-be-decoded codeword to obtain a decoding result. According to the invention, the decoding complexity of the PAC code can be greatly reduced while the high error correction performance of the PAC code is ensured.

The invention discloses a storage and calculation integrated architecture-based convolutional code parallel pipeline decoding acceleration system and method, and the system comprises a global data scheduling module which is used for slicing convolutional code data from magnetic tape storage equipment according to a set rule and carrying out the scheduling through a multi-stage cache mechanism; the storage and calculation integrated unit array is used for storing data tiles and intermediate results output by the global data scheduling module and executing convolution operation, path metric calculation and survival path selection through a reconfigurable calculation unit; the parallel pipeline controller is used for dynamically distributing decoding tasks and controlling the pipeline rhythm of the storage and calculation integrated unit array; the self-adaptive resource configuration module is used for monitoring system load in real time and dynamically adjusting a data distribution strategy and computing resource scheduling; the verification and error correction unit is used for performing verification and error correction on the decoding result output by the storage and calculation integrated unit array and then outputting the decoding result; according to the decoding acceleration system and method, high-efficiency and low-delay convolutional code decoding is realized.

This disclosure provides methods, components, devices and systems for generating and processing codeword transmissions with reduced code rates. According to one aspect, a method for wireless communications at a first wireless node generally includes obtaining a set of data bits; encoding the data bits, based on at least a first nominal code rate, to generate one or more codewords associated with a reduced nominal code rate that is lower than the first nominal code rate; and outputting the one or more codewords.

A data processing method and apparatus are disclosed, which may be applied to communication systems such as 5G and 6G. The method includes: obtaining an extended first codebook based on a second codebook by increasing a quantity of codewords or lengths of codewords, and performing first network coding or decoding based on the first codebook. Linear independence between codewords in the extended first codebook may be ensured as much as possible, so as to generate more valid redundant packets or check packets, thereby improving system reliability. Alternatively, flexible block lengths are supported, so as to perform efficient network coding or decoding on more original data packets, thereby improving system spectral efficiency. This application may be applied to an extended reality XR service or another low-delay service.

Leveraging stochastic physical characteristics of resistive switching devices to generate data having very low cross correlation among bits of that data is disclosed. Data generated from stochastic physical characteristics can also be referred to as physical unclonable feature—or function—(PUF) data. Additionally, error correction functions for PUF data generated from resistive switching memory cells are provided. The error correction functions facilitate additional redundancy and longevity of PUF data, among other benefits. Different embodiments include addressing arrangements to incorporate ECC parity bits among generated PUF data bits, even for differential PUF bits respectively defined by multiple memory cells in different portions of a resistive memory array.

A receiver (115) receives pulse trains (r0, r1) encoding a plurality of bits (b) using a convolutional code {3, 2, 5} whose systematic bit g0 and parity bit g1 are mapped into two binary trains (21, 22) depending respectively on g0^g1 and g1. Noting that the convolutional coding and the mapping lead to modulation (bz-1^b^b.z+1, bz-1^b.z+1, bz-1^b.z+1), a demodulator demodulates the pairs of received pulse trains (r0, r1) into respective pairs of LLR values ​​(b0, b1) and a Viterbi decoder built on a convolutional code {3, 7, 5} decodes each pair of LLR values ​​into a decoded bit (d). Optimal decoding is thus achieved, notably offering a gain estimated at 1.8 dB (in error rate) without additional complexity. See Figure 3 for the abbreviated version.

The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond 4G communication systems such as Long Term Evolution (LTE). A method performed by a transmitting node in a wireless communication system may include encoding a plurality of information bits using a plurality of cyclic redundancy check (CRC) bits, interleaving the plurality of information bits and the plurality of CRC bits using an interleaving pattern, generating a codeword by convolutional encoding and polarization encoding the interleaved plurality of information bits and the interleaved plurality of CRC bits, and transmitting the codeword to a receiving node. The interleaving pattern may correspond to a matrix generated based on a size of the plurality of information bits and a size of the plurality of CRC bits.

The embodiment of the present application discloses a data processing method and a data processing device. The method in the embodiment of the present application includes the following steps: separately performing convolutional interleaving on n lane data streams to obtain n first data streams, where n>1, and a first FEC encoding is performed on all of the n lane data streams. All a codewords obtained by the first FEC encoding are distributed into b lane data streams, where a≦b≦n and a≧1. Each z consecutive symbols of the first data stream are from z different codewords, where z>1. Then, all K first data streams of the n first data streams are multiplexed to obtain one second data stream, and a total of m second data streams are obtained. The n first data streams include G first data stream subsets, and the symbols in different first data stream subsets are from different codewords, where m=n / K, K>1, and G>1. The y consecutive symbols in each second data stream are from y different codewords, where y>z.

The invention relates to a telecommunications system comprising: an encoder for encoding input data; and a puncturer (POIN) for puncturing the data according to at least two protection levels after encoding. The puncturer comprises an elementary structure comprising a 1st puncturing matrix (Pi) of which the output feeds a demultiplexer (Mi) having a 1st and a 2nd output, the 2nd output feeding a 2nd puncturing matrix (Pi+1) in order to define the at least two different levels of protection obtained respectively with the 1st output (Si) of the demultiplexer and the output (Si+1) of the 2nd puncturing matrix.

The present disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate than a 4G communication system such as LTE. An encoding method performed by a transmission device of a communication system according to an embodiment of the present disclosure may comprise the steps of: identifying at least one parameter related to a convolutional code associated with a polarization-adjusted convolutional (PAC) code; on the basis of the at least one parameter, identifying a parity check matrix for an input binary vector of a polar code associated with the PAC code; on the basis of the parity check matrix, encoding a polar code concatenated with an outer code; and transmitting a codeword vector generated on the basis of the encoding.

Methods, systems, and devices for wireless communications are described. A first device may transmit, to a second device, a bit sequence encoded with a convolutional encoder associated with a constraint length of four, five, six, or seven, and associated with a subset of polynomials of a polynomial set, wherein the polynomial set is selected from a group of polynomial sets, expressed with octal values, consisting of polynomial sets described herein. Additional aspects of the present disclosure are directed to techniques and methodologies used to search for polynomial sets that are usable for convolutional encoder-based wireless communications.

A method for encoding data, a method for decoding data, an encoder, and a decoder are disclosed. The decoder is designed to determine a convolutional coded message from two or more symbol sequences, each symbol sequence being associated with a different bit sequence according to an association rule and the convolutional coded message corresponding to a bit sequence associated with all symbol sequences according to a common association rule, and to decode the convolutional coded message.

Methods, systems, and devices for a memory device with an error correction memory device with fast data access are described. For example, during a read operation, a memory device may be configured to output the data indicated by the read operation concurrent with performing an error correction operation. If the memory device detects an error, the memory device may indicate the error to a host device and, in some cases, output the corrected data to the host device. During a write operation, the memory device may store error detection or correction information associated with data to be stored at the memory device. The memory device may, in some cases, store error detection or correction information generated by the host device.

The application discloses a convolution code parallel pipeline decoding acceleration system and method based on a memory-compute integrated architecture, comprising: a global data scheduling module, which is used for slicing convolution code data from a magnetic tape storage device according to a set rule and scheduling the data through a multi-level cache mechanism; a memory-compute integrated unit array, which is used for storing data tiles and intermediate results output from the global data scheduling module and performing convolution operation, path metric calculation and surviving path selection through a reconfigurable computing unit; a parallel pipeline controller, which is used for dynamically allocating decoding tasks and controlling the pipeline beat of the memory-compute integrated unit array; an adaptive resource configuration module, which is used for monitoring the system load in real time and dynamically adjusting data distribution strategies and computing resource scheduling; and a check and error correction unit, which is used for checking and correcting the decoding results output from the memory-compute integrated unit array and then outputting the results; the decoding acceleration system and method realize efficient and low-delay convolution code decoding.

Communication systems and methods are disclosed involving the transmission and reception of short block-length messages. In many embodiments, transmitters are utilized that encode messages by combing: at least a first partial codeword generated using a first encoder based upon a first convolutional code and a first expurgating linear function; and a second partial codeword generated by a second encoder based upon a second convolutional code and a second expurgating linear function. In a number of embodiments, receivers are utilized that decode received messages using a full decoder that reconstructs the transmitted message bits based upon: at least a first set of partial codewords produced by a first partial decoder based upon the first convolutional code and the first expurgating linear function; and a second set of partial codewords generated by a second partial decoder based upon the second convolutional code and the second expurgating linear function.

Methods, systems, and devices for wireless communications are described. A transmitting device may support shaping of bits in block encoding schemes and a probabilistic shaping framework to generate shaped bits that include both information bits and shaping bits, without conveying extra information (e.g., in addition to the shaped bits) to a receiving device. The transmitter may use a decoder such as a polar decoder (e.g., a modem configured for both coding and decoding) to determine a set of shaping bits based on the information bits. The transmitting deice may also map information bits to frozen bit locations of the polar code, and the shaping bits to information bit locations of the polar, such that the encoded (e. g., shaped) bits from the polar encoder satisfy a target probability distribution.

Communication systems that utilize receivers for decoding short block length messages are disclosed. In many embodiments, the receiver includes an antenna for receiving encoded data, via RF signals, a demodulator for obtaining symbols from the RF signal, a demapper for generating symbol metrics, and a parallel list decoder. In several embodiments, the parallel list decoder processes multiple trellis stages simultaneously, enabling efficient decoding of the symbol metrics to obtain received, bits. In certain embodiments, the parallel list decoder divides the decoding trellis into segments, processes these segments independently, and combines them pairwise to form new segments. This parallel processing approach can allow for reduced decoding latency and improved efficiency in handling short block length messages. making it particularly suitable for applications requiring rapid data exchange and low-latency communication.

The present invention belongs to the technical field of space communication and satellite communication, and particularly relates to a maximum a posteriori probability decoding method and system for high code rate convolutional codes. The method includes: converting the soft information of the received high code rate convolutional codeword into log-likelihood ratio information; updating the forward information on the Trellis diagram; updating the backward information on the Trellis diagram; calculating the edge information of all Trellis branches according to the updated forward information and backward information; obtaining the log-likelihood a posteriori probability information of each input bit according to the edge information of each branch; and obtaining the final decoding output through the decision of the log-likelihood a posteriori probability information of each input bit. By adopting the method of the present invention, the bit error rate of the CCSDS high code rate convolutional code can be reduced.

An embodiment of the present application provides a component decoding method for a TURBO code, a decoding method for a TURBO code, and related equipment, including: receiving and demodulating data to be decoded according to a scheduling configuration to obtain decoding input data; and calculating the code rate and modulation order of the decoding input data; calculating an adjustment value for the decoding input data and a bit width shift value of a decoder internal posterior probability branch metric parameter according to the modulation order and code rate of the decoding input data; adjusting the numerical value of the decoding input data by the adjustment value to obtain first decoding input data; component decoding the first decoding input data to obtain a calculation result of the decoder internal posterior probability branch metric; and shifting the calculation result of the decoder internal posterior probability branch metric by the bit width shift value to obtain a component decoding output value. The method has the beneficial effect of improving decoding performance and is applicable to the technical field of TURBO code decoding.