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1267 results about "PHY" patented technology

A PHY, an abbreviation for "physical layer", is an electronic circuit, usually implemented as a chip, required to implement physical layer functions of the OSI model. A PHY connects a link layer device (often called MAC as an acronym for medium access control) to a physical medium such as an optical fiber or copper cable. A PHY device typically includes both Physical Coding Sublayer (PCS) and Physical Medium Dependent (PMD) layer functionality.

System and Method for Multipath Transmission in Multi-Mode Cellular Networks with Adaptive PHY-Layer Link and Topology Control

A wireless communication method and system enabling dynamic multi-path data transmission and reception across heterogeneous radio access networks. The method includes selecting between sequential, concurrent, or redundant multipath transmission strategies based on real-time measurements of link quality parameters, including signal-to-interference-plus-noise ratio (SINR), reference signal received power (RSRP), delay, and spectrum availability. The system further enables adaptive transmission power control, modulation scheme selection, and carrier configuration based on physical layer feedback, minimizing interference and optimizing spectral efficiency. Peer-to-peer communication between terminals is supported without base station mediation, reducing RAN load. Multi-base station connectivity is enabled, allowing terminals to simultaneously transmit through multiple nodes and aggregate at the core network. The architecture supports real-time topology control, dynamic link adaptation, and transmission parameter adjustment based on physical-layer constraints.
Owner:CHINA ENTROPY CO LTD (AIOT ENTROPY CO LTD)

Lossless and lossy automatic hardware compression in graphics-to-graphics network links

An apparatus to facilitate lossless and lossy automatic hardware compression in graphics-to-graphics network links is disclosed. The apparatus includes compressor / decompressor circuitry (CDC) integrated with physical layer (PHY) intellectual property (IP) hardware circuitry for a graphics processor unit (GPU)-to-GPU communication link communicably coupling a first GPU to one or more other GPUs, the CDC to: receive a data message from the first GPU, wherein the data message is in an uncompressed format; determine that a compression process is to be applied to the data message; apply the compression process to the data message to generate a compressed data message; and cause a GPU link IP hardware circuitry that comprises the PHY IP hardware circuitry to transmit the compressed data message over the GPU-to-GPU communication link.
Owner:INTEL CORP

Ehnhancement of resource selection for sidelink discontinuous reception (DRX) receiver user equipment (UE)

A user equipment (UE), including a vehicle to everything (V2X) device, a pedestrian UE, or other UE, a baseband processor or other network device can operate to receive an indication of a sidelink (SL) discontinuous reception (DRX) parameter (e.g., an SL DRX active time) of a receiver UE for SL communication (e.g., Mode-2 SL communication). A resource selection procedure can be performed of a set of candidate resources within a resource selection window (RSW) based on the SL DRX parameter of the receiver UE so that at least a subset of candidate resources of the set of candidate resources satisfies a threshold to be within the SL DRX parameter of the receiver UE. A report of the set of candidate resources can then be transmitted from the physical (PHY) layer to a higher layer to enable the SL communication. The SL communication, for example, can include an autonomous determination of SL resources for a Mode-2 sidelink communication.
Owner:APPLE INC

Dynamic adaptation of spatial elements

An embodiment of aspect 1 provides an user device, UE, for a wireless communication system, wherein the UE or a its transceiver is configured toreceive from a network node, e.g., gNB, at leasta channel state information, CSI, report configuration via a higher layer, e.g., radio resource control, RRC, layer,a configuration or indication via a PHY-layer, e.g., physical downlink control channel, PDCCH, signalling, and / or a higher layer signalling,perform measurement(s) on said at least one CSI-RS resource,compute one or more parameters related to a channel state information, CSI, and / or DL transmission rate and / or reliability associated with at least one of the P subsets of a CSI-RS resource, andtransmit a report to the network node via the PHY-layer or a higher layer.
Owner:FRAUNHOFER GESELLSCHAFT ZUR FORDERUNG DER ANGEWANDTEN FORSCHUNG EV

Prototype verification method and device of DDR4 controller, equipment, medium and product

The invention discloses a prototype verification method of a DDR4 controller in the technical field of chip verification, the method is applied to a prototype verification platform, a DDR controller and a PHY module in a chip to be verified are matched on the prototype verification platform, and the PHY module integrates a DFI to phy only interface module and a standalone PHY only block module through a python script; the prototype verification method comprises the steps that in response to a verification instruction received by a DDR controller, the DDR controller generates a control instruction according to the verification instruction and sends the control instruction to a DFI to phy only interface module; in response to the control instruction received by the DFI to phy only interface module, the DFI to phy only interface module converts the control instruction from a DFI protocol to a target control instruction of a PHY protocol, and sends the target control instruction to the standalone PHY only block module; in response to the control instruction received by the standalone PHY only block module, the standalone PHY only block module sends a target control instruction to a DDR particle externally connected with the prototype verification platform, so that read-write and verification with the DDR particle are realized; according to the method, the DDR memory interface IP prototype verification code coverage rate can be improved.
Owner:SUZHOU R&D CENT OF NO 214 RES INST OF CHINA NORTH IND GRP

PCIe Switch bifurcation characteristic verification system and method

The invention provides a system and a method for verifying bifurcation characteristics of PCIe Switch, and relates to the technical field of PCIe. The forking characteristic verification system of the PCIe Switch comprises a DUT module, a first EP verification agent component, a second EP verification agent component, a first RC verification agent component, a second RC verification agent component, a first PHY verification agent component, a second PHY verification agent component and a configuration module. A configuration module, a first protocol comparator and a second protocol comparator, wherein the configuration module is used for configuring the bifurcation form of the uplink port and the downlink port and the behavior of each verification agent component; the first protocol comparator is used for verifying the bifurcation characteristic of the uplink port, and the second protocol comparator is used for synchronously verifying the bifurcation characteristic of the downlink port. The method has the advantages that the verification convergence speed is increased, and the verification rate is increased.
Owner:成都星拓微电子科技股份有限公司

Physical layer (PHY) security for passive internet of things (IOT) devices

This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for physical layer security for passive Internet of Things (IoT) devices. In some aspects, a source device and a reader device may communicate via a passive wireless device, such as an IoT tag, which may reflect or backscatter signaling from the source device to the reader device. The source device, the reader device, and the passive wireless device may secure communication in a physical layer (PHY) in accordance with one or more PHY security keys. As such, the source device may transmit a first message to the passive wireless device in accordance with a first PHY security key and the passive wireless device may transmit a second message to the reader device in accordance with a second PHY security key to secure communication to and from the passive wireless device.
Owner:QUALCOMM INC

ECC verification single-bit error correction system in DDR

The invention relates to memory error correction, in particular to an ECC check single-bit error correction system in a DDR (Double Data Rate), which comprises a DRAM (Dynamic Random Access Memory) scanner, periodically performs address read traversal operation on a DDR particle DRAM, timely finds a single-bit error of data in the DDR particle DRAM by inquiring an ECC check state in a DDR controller DDRC, and performs correction processing on the single-bit error, so that the error correction efficiency is improved. The error is prevented from being evolved into an uncorrectable multi-bit error; the DDR controller DDRC is used for converting the AXI interface signal into a corresponding DFI interface signal, outputting the DFI interface signal to a DDR physical layer DDR PHY, carrying out ECC verification on read-write data, and storing an ECC verification result to a register, so that a DRAM scanner inquires an ECC verification state; according to the technical scheme, the defects that in the prior art, the processing speed is low, data errors are not found in time, and more CPU resources are occupied can be effectively overcome.
Owner:XINSIYUAN MICROELECTRONICS CO LTD

Distributed tone mapping for power spectral density (PSD) limits

This disclosure provides systems, methods, and apparatuses for wireless communication. An example apparatus selects a resource unit (RU) for a physical (PHY) layer convergence protocol (PLCP) protocol data unit (PPDU). The selected RU includes a set of contiguous tones spanning a bandwidth. The apparatus maps the set of contiguous tones to a set of non-contiguous tones distributed across the frequency spectrum, and transmits the PPDU over the set of non-contiguous tones. Another example apparatus selects an RU of a group of RUs that collectively span a frequency spectrum, and formats a PPDU based on a first frequency bandwidth wider than the selected RU's bandwidth. The apparatus parses the contiguous tones of the selected RU to a set of non-contiguous tones spanning a unique segment of a second frequency bandwidth wider than the first frequency bandwidth, and schedules a transmission of the PPDU over the set of non-contiguous tones.
Owner:QUALCOMM INC

Virtual access point assignment to multiple basic service set identifier sets based on physical mode

Systems and techniques for dynamically assigning virtual access points (VAPs) to multiple basic service set identifier (MBSSID) sets are described. An example technique includes generating a set of VAPs, where each VAP of the set of VAPs has a non-configured state. A first VAP configuration is received and includes an indication of a physical (PHY) mode associated with the first VAP configuration. A first VAP of the set of VAPs is assigned to a first MBSSID set, based at least in part on the PHY mode. The first VAP is configured according to the first VAP configuration.
Owner:CISCO TECHNOLOGY INC

Non-primary channel access operation

This disclosure describes systems, methods, and devices related to enhanced channel access. A device may send a Multi-User Request to Send (MU-RTS) frame on a basic service set (BSS) primary channel to an overlapping basic service set (OBSS). The device may receive a Clear to Send (CTS) frame in response to the MU-RTS frame on the BSS primary channel. The device may initiate a switch to a non-primary channel access (NPCA) primary channel upon detection of a physical (PHY) preamble. The device may maintain NPCA operation on the NPCA primary channel until a network allocation vector (NAV) expires. The device may announce a location and bandwidth of the NPCA primary channel to associated stations (STAs).
Owner:INTEL CORP

Dynamic high-precision PTP (Precision Time Protocol) time synchronization system realized based on FPGA (Field Programmable Gate Array)

PendingCN120891721ASynchronous motors for clocksElectromechanical unknown time interval measurementTime markPhase difference
The invention provides a dynamic high-precision PTP (Precision Time Protocol) time synchronization system realized based on an FPGA (Field Programmable Gate Array), which comprises a master device and a slave device, and the master device and the slave device are connected through a PHY (Physical Layer) to carry out PTP time synchronization; the master device and the slave device have the same structure and comprise an FPGA and a voltage-controlled crystal oscillator; in the master device, the FPGA obtains the frequency difference and the phase difference between the master device and an externally input reference source, further adjusts the frequency of a voltage-controlled crystal oscillator, corrects a local time mark, and sends a PTP message to the slave device; and in the slave equipment, the FPGA obtains the frequency difference and the phase difference between the slave equipment and the master equipment based on the received PTP message, so that the frequency of the voltage-controlled crystal oscillator is adjusted, and the local time scale is corrected. According to the invention, low-cost and high-precision PTP time synchronization is realized.
Owner:WUHAN ZHONGYUAN HUADIAN SOFTWARE

Systems and methods for large phase correction in R-PHY network architectures

Systems and methods for regaining phase synchronization between a CMTS core and an RPD, where the phase synchronization is regained over repeated temporal periods preferably divided between a first interval having a frequency adjustment of a first magnitude and a second interval having a frequency adjustment of a second magnitude.
Owner:ARRIS ENTERPRISES LLC

Physical layer signature for wake-up signals

Methods, systems, and devices for wireless communications are described. A user equipment (UE) and network entity may determine a physical layer (PHY) signature for the network entity to include in one or more wake-up signals (WUSs) transmitted to the UE. The UE may use the determined PHY signature to validate a WUS received during a monitoring occasion. For example, the UE may compare a PHY signature of the received WUS to the determined PHY signature. If the PHY signature of the received WUS matches the determined PHY signature, the UE may wake up in accordance with the WUS. If the PHY signature of the received WUS does not match the determined PHY signature, the UE may remain in a sleep mode. The UE may transmit an indication of an adversarial attack based on the received WUS not including the determined PHY signature or including a different PHY signature.
Owner:QUALCOMM INC

Communication method and communication device

The invention provides a communication method, the communication method is applied to a terminal device, and the communication method comprises the following steps: receiving measurement configuration information from a network device, the measurement configuration information comprising an event triggering condition; the physical PHY layer measures a reference signal to be measured, determines that an event triggering condition is satisfied and sends first indication information to a medium access control (MAC) layer; and the MAC layer sends a measurement result to the network equipment through MAC layer signaling according to the first indication information. In the application, the PHY layer can measure the reference signal to be measured to determine the measurement result; the MAC layer can send the measurement result through MAC layer signaling (such as MAC CE), so that the network equipment can perform mobility management such as scheduling strategy updating or cell switching, beam switching and the like based on the measurement result. According to the method, the uplink resource occupation of the terminal equipment can be reduced while the measurement result is reported quickly and timely.
Owner:HUAWEI TECH CO LTD

Financial audit system based on artificial intelligence

The invention discloses a financial auditing system based on artificial intelligence, which belongs to the technical field of artificial intelligence and comprises a heterogeneous data dynamic adaptation device, a trusted data pipeline system and a central auditing processing unit. The heterogeneous data dynamic adaptation device comprises a multi-protocol PHY chip set, an FPGA programmable logic array, a protocol sensing antenna array and an AI coprocessor. The protocol sensing antenna array is annularly arranged on the inner wall of the device shell and comprises at least 12 miniature receiving and transmitting modules with adjustable directions; a protocol reverse learning model is arranged in the AI coprocessor, and a protocol analysis scheme is dynamically generated by analyzing electromagnetic radiation characteristics of an interface. According to the financial auditing system based on artificial intelligence, real-time dynamic data adaptation and credible traceability of a cross-heterogeneous financial system can be achieved, the problems of format conflict, semantic ambiguity and transmission delay of multi-source heterogeneous data in the auditing process are solved, and meanwhile verifiability and non-tampering performance of the data extraction process are ensured.
Owner:GUOYI TIANCHENG CONSTR ENG TECH CO LTD

Network equipment and communication method

The invention discloses network equipment and a communication method. The network equipment comprises an advanced physical layer APL port physical layer PHY and a hybrid interface circuit, the APL PHY is connected with the hybrid interface; the mixed interface is used for connecting instrument equipment; the hybrid interface circuit is connected with the hybrid interface; the hybrid interface circuit is compatible with a single-pair power over Ethernet (PoDL) mode, an analog input (AI) mode and an analog output (AO) mode; in the PoDL mode, the power supply supplies power to the instrument equipment; in the AI mode, the power supply supplies power to the hybrid interface; and in the AO mode, the voltage is converted into current corresponding to the control signal of the instrument equipment. According to the technical scheme, an interface of traditional instrument equipment can be compatible on the basis of APL communication.
Owner:HUAWEI TECH CO LTD

Signaling designs for unequal modulation and modulation and coding scheme (MCS) indication

This disclosure provides methods, components, devices and systems for signaling designs for unequal modulation and modulation and coding scheme (MCS) indication. Some aspects more specifically relate to user info field designs to support such an unequal modulation indication and / or an MCS indication, including designs for user info fields of multi-user (MU) physical layer (PHY) protocol data units (PPDUs) and of Trigger frames. In some examples, an access point (AP) may configure a user info field to include at least five bits for MCS signaling, which may enable the AP to uniquely identify an MCS from a set of greater than 16 MCSs. Additionally, or alternatively, the AP may configure a user info field to include a subfield indicative of a pattern of modulation schemes (such as an equal modulation or an unequal modulation) across a set of spatial streams allocated for communication between the AP and a station (STA).
Owner:QUALCOMM INC

HBM base die with 2.5d and 3D PHY interface

Systems and methods are provided for using a 2.5D PHY and a 3D PHY for communications between a memory device and a host device. The memory device includes a 2.5D PHY for communications with the host device through a predefined communication interface and a 3D PHY for communications with the host device through a customized communication interface. The 2.5D PHY of the memory device is used for communications through the predefined communication interface when the customized communication interface is not available or undesired (e.g., during testing of the memory device).
Owner:MICRON TECHNOLOGY INC

Vehicle-mounted Ethernet gateway dynamic configuration method and system and vehicle

The invention relates to the technical field of Ethernet gateways, in particular to a vehicle-mounted Ethernet gateway dynamic configuration method and system and a vehicle, and the method comprises the steps: building a secure communication session between an Ethernet gateway of a vehicle-mounted end and a cloud end; reading the state information of an MCU register in the Ethernet gateway, and monitoring the physical layer state of each PHY port of the Ethernet gateway in real time; modifying configuration parameters of a target PHY port, wherein the target PHY port is a PHY port connected with the target ECU; controlling the target PHY port to execute a soft reset operation, and initializing the target PHY port based on the modified configuration parameters; and storing the modified configuration parameters, and automatically loading the modified configuration parameters when the system is powered on. The configuration complexity can be reduced, the debugging period can be shortened, and hardware dependence can be reduced.
Owner:DEEPAL AUTOMOBILE NANJING RESEARCH INSTITUTE CO LTD

Die-to-die interconnect

A port is to couple to another die over a die-to-die (D2D) link and includes physical layer (PHY) circuitry including a first number of sideband lanes to carry data for use in training and management of the D2D link, and a second number of mainband lanes to implement a main data path of the D2D link. The mainband lanes include a forwarded clock lane, a valid lane, and a plurality of data lanes. A logical PHY coordinates functions of the sideband lanes and the mainband lanes.
Owner:INTEL CORP

Method for configuring preamble in wireless communication system

One example according to the present specification relates to a technique related to configuration of a preamble in a wireless LAN (WLAN) system. According to various embodiments, a receiving STA may receive an NDP frame. The NDP frame may comprise a first signal field and a second signal field. The first signal field may comprise first information about a PHY version. The second signal field may comprise second information about transmission of a PPDU, set on the basis of the first information. The receiving STA may perform channel sounding on the basis of the NDP frame.
Owner:LG ELECTRONICS INC

Universal serial bus (USB) 2.0 host speed reduction bridge based on bidirectional protocol handshake and prototype verification or hardware simulation acceleration platform

The invention provides a universal serial bus (USB) 2.0 host speed reduction bridge based on bidirectional protocol handshake and a prototype verification or hardware simulation acceleration platform, which are characterized in that a slow-speed side module runs at a slow clock frequency, is responsible for realizing a protocol layer of a USB protocol and a physical link layer function of the USB protocol, and communicates with a USB2.0 host controller in a chip design (DUT) to be tested; the original speed side module works under the original clock frequency, logic of a protocol layer of a USB protocol and a physical link layer of the USB protocol is achieved, communication with an external real USB2.0 slave end device is achieved through a USB2.0 PHY, data caching and synchronization are achieved through a data caching RAM, and the bridge control module overall plans the whole situation and accurately regulates and controls independent handshake of the USB2.0 protocol layers on the two sides under the original clock frequency. Through bidirectional protocol handshake on the two sides of the speed reduction bridge, data communication between a low-speed to-be-tested chip design (DUT) in a chip prototype verification platform and external standard-speed real USB slave equipment is achieved through the speed reduction bridge.
Owner:CORIGINE (SHANGHAI) INC

Dynamic control of link speeds in phy

A physical link comprising a set of lanes is configured according to a first lane configuration. In the first lane configuration, a first portion of the set of lanes is disabled and a second portion of the set of lanes serves traffic at a first link speed. A processing device, operatively coupled to the physical link, detects a change to bandwidth utilization of the physical link. In response to detecting the change to bandwidth utilization of the physical link, the processing device configures the set of lanes according to a second lane configuration. In configuring the set of lanes, the processing device configures the first portion of the set of lanes to serve traffic at a second link speed and disables the second portion of the set of lanes.
Owner:MICRON TECHNOLOGY INC

Enhanced wi-fi ultra-low latency operations

This disclosure describes systems, methods, and devices related to performing Wi-Fi low-latency operations. A multi-link device (MLD) may generate a first physical layer (PHY) protocol data unit (PPDU); transmit, using a first station device of the MLD, the first PPDU during a transmission opportunity (TXOP) for the first station device of the MLD and a second station device of a second MLD; identify a frame received by the first station device after transmission of the first PPDU indicating a request for the second station device or a third station device to transmit time-sensitive data to the first station device; identify time-sensitive data received by the first station device after transmission of the first PPDU; transmit, using the first station device, an acknowledgement indicative of receipt of the time-sensitive data by the first station device; generate the second PPDU; and transmit, using the first station device, the second PPDU.
Owner:INTEL CORP

Access point station, non-access point station, and wireless communication method

A wireless communication method includes: transmitting, by a AP STA or a non-AP STA, an ultra-high reliability (UHR) capabilities element, where the UHR capabilities element includes a UHR physical layer (PHY) capabilities information field and a supported UHR-modulation and coding scheme (UHR-MCS) and number of spatial streams (NSS) set field.
Owner:GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP LTD

Radio frequency interference common mode injection in a c-PHY receiver

An input buffer includes a pair of input transistors and associated injection circuits. A first input transistor has a source coupled to a first voltage rail through a first current source and a gate coupled to a first wire of a multi-wire serial bus. Three or more resistors in a first injection circuit couple the wires of the serial bus to a first common node, which is coupled to the source of the first input transistor by a first capacitor. A second input transistor has a source coupled to the first voltage rail through a second current source and a gate coupled to a second wire of the serial bus. Three or more resistors in a second injection circuit couple the wires of the multi-wire serial bus to a second common node, which is coupled to the source of the second input transistor by a second capacitor.
Owner:QUALCOMM INC

Data processing method and device

The invention discloses a data processing method and device and belongs to the technical field of communication. The method is applied to the flexible Ethernet (FlexE), and the method is applied to the flexible Ethernet (FlexE). The method comprises: receiving an initial data stream sent by a FlexE instance, periodically inserting a filling sequence in the initial data stream to obtain a first data stream, the first data stream comprising the periodically appearing filling sequence, the filling sequence comprising continuous n filling code blocks, and n being an integer greater than or equal to 4. The invention provides a FlexE (FlexE)-oriented method capable of inserting more filling code blocks into a data stream, which can be suitable for PHY (Physical Layer) interfaces with higher rate, such as a 800 gigabit Ethernet (GE) PHY interface, a 1.6 TE PHY interface and the like, and can adapt to the evolution of the Ethernet standard.
Owner:HUAWEI TECH CO LTD

Communication device, communication method thereof, information processing device, control method thereof, and computer-readable storage medium

A communication device communicates a radio frame including a preamble and a data field of a physical layer (PHY). The preamble includes an L-STF (Legacy Short Training Field), an L-LTF (Legacy Long Training Field), an L-SIG (Legacy Signal Field), an EHT-SIG-A (Extremely High Throughput Signal A Field), an EHT-STF (EHT Short Training Field), and an EHT-LTF (EHT Long Training Field), and the EHT-SIG-A includes a subfield indicating whether data are concurrently transmitted from a plurality of communication devices to a common partner device.
Owner:CANON KK

Dynamic selection of lower-layer radio link parameters

Various aspects of the present disclosure generally relate to wireless communication. Some aspects more specifically relate to configuration of downlink and / or uplink quality of service (QoS) based radio link monitoring and prediction and related signaling and procedures. In some aspects, a network node may configure a user equipment (UE) with set(s) of physical (PHY) and / or medium access control (MAC) parameters for QoS radio link monitoring and reporting. Once configured with the parameter sets, the UE may receive a signal from the network node to use a particular set, or may autonomously select a set using traffic requirements. The network node may schedule the UE to send a QoS report in accordance with one or more downlink or uplink measurement and / or prediction results. For example, when the monitored results exceed one or more configured threshold(s), the UE may transmit a report to the network node.
Owner:QUALCOMM INC