A
gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated
system that both
decodes multiple network protocols
byte-streaming manner concurrently and processes packet data in
one pass, thereby reducing
system memory and form factor requirements, while also eliminating
software CPU overhead. A preferred embodiment of the invention comprises a plurality of protocol state machines that decode network protocols such as TCP, IP,
User Datagram Protocol (UDP), PPP,
Raw Socket, RARP, ICMP, IGMP,
iSCSI, RDMA, and FCIP concurrently as each
byte is received. Each protocol handler parses, interprets, and strips header information immediately from the packet, requiring no intermediate memory. The invention provides an internet
tuner core, peripherals, and external interfaces. A network stack processes, generates and receives network packets. An internal programmable processor controls the network stack and handles any other types of ICMP packets, IGMP packets, or packets corresponding to other protocols not supported directly by dedicated hardware. A
virtual memory manager is implemented in optimized, hardwired logic. The
virtual memory manager allows the use of a virtual number of network connections which is limited only by the amount of internal and external memory available.