25092 results about "Input/output" patented technology

Computer display privacy and security for computer systems. In one aspect, the invention provides a computer-controlled system for regulating the interaction between a computer and a user of the computer based on the environment of the computer and the user. For example, the computer-controlled system provided by the invention comprises an input-output device including an image sensor configured to collect facial recognition data proximate to the computer. The system also includes a user security parameter database encoding security parameters associated with the user; the database is also configured to communicate with the security processor. The security processor is configured to receive the facial recognition data and the security parameters associated with the user, and is further configured to at least partially control the operation of the data input device and the data output device in response to the facial recognition data and the security parameters associated with the user.

An RFID token apparatus has a connection module for interfacing with an appliance capable of communicating and interacting with remote servers and networks, a translation module for moving signals between a USB interface and a smart card interface, a processor module which may be capable of operating as a dual-interface (DI) chip; and an input/output module having at least one RF antenna and a modulator. An RFID-contactless interface according to ISO 14443 & ISO 15693 and/or NFC. A wireless interface according to Zigbee, Bluetooth, WLAN 802.11, UWB, USB wireless and/or any similar interface. An RFID reader apparatus has a housing; a slot for a contact or contactless fob; and a USB stick alternately protruding from the housing and retracted within the housing.

Systems, methods, and devices for providing and managing electronic event tickets are provided. For example, a device for managing an electronic event ticket may include a processor configured to run an electronic ticket management application, a memory device configured to store data associated with the electronic ticket management application, an electronic display configured to display at least a portion of the data associated with the electronic ticket management application, and an input/output interface configured to receive an electronic ticket and the data associated with the electronic ticket for management by the electronic ticket management application. The electronic ticket management application may be configured to enable the electronic device to gain entry to an event and to obtain at least one other event-related benefit after the electronic ticket is received by the input/output interface.

Mechanisms and techniques provide a data acquisition basic input output system between a central controller and a set of modules networked to the central controller. The central controller obtains at least one command to be sent to at least one module of the set of modules networked to the central controller and composing a request message containing the command. The request message has an associated timing pattern selected from a plurality of available timing patterns, such as a fixed timing pattern or a variable timing pattern. The central controller transmits the request message to the module(s) according to the associated timing pattern and receives, according to the associated timing pattern, a response message from the module(s). The data acquisition basic input output system communications do not require reliance on transport layer protocols or collision avoidance techniques.

An input/output processor for speeding the input/output and memory access operations for a processor is presented. The key idea of an input/output processor is to functionally divide input/output and memory access operations tasks into a compute intensive part that is handled by the processor and an I/O or memory intensive part that is then handled by the input/output processor. An input/output processor is designed by analyzing common input/output and memory access patterns and implementing methods tailored to efficiently handle those commonly occurring patterns. One technique that an input/output processor may use is to divide memory tasks into high frequency or high-availability components and low frequency or low-availability components. After dividing a memory task in such a manner, the input/output processor then uses high-speed memory (such as SRAM) to store the high frequency and high-availability components and a slower-speed memory (such as commodity DRAM) to store the low frequency and low-availability components. Another technique used by the input/output processor is to allocate memory in such a manner that all memory bank conflicts are eliminated. By eliminating any possible memory bank conflicts, the maximum random access performance of DRAM memory technology can be achieved.

Methods for operating a network as a clustered file system is disclosed. The methods involve client load rebalancing, distributed Input and Output (I/O) and resource load rebalancing. Client load rebalancing refers to the ability of a client enabled with processes in accordance with the current invention to remap a path through a plurality of nodes to a resource. Distributed I/O refers to the methods on the network which provide concurrent input/output through a plurality of nodes to resources. Resource rebalancing includes remapping of pathways between nodes, e.g. servers, and resources, e.g. volumes/file systems. The network includes client nodes, server nodes and resources. Each of the resources couples to at least two of the server nodes. The method for operating comprising the acts of: redirecting an I/O request for a resource from a first server node coupled to the resource to a second server node coupled to the resource; and splitting the I/O request at the second server node into an access portion and a data transfer portion and passing the access portion to a corresponding administrative server node for the resource, and completing at the second server nodes subsequent to receipt of an access grant from the corresponding administrative server node a data transfer for the resource. In an alternate embodiment of the invention the methods may additionally include the acts of: detecting a change in an availability of the server nodes; and rebalancing the network by applying a load balancing function to the network to re-assign each of the available resources to a corresponding available administrative server node responsive to the detecting act.

The invention relates to a game set which comprises communicating elements, in the form of pieces, figurines, cards or dice, each having a radio-frequency tag provided with an individual identification code. A game board comprises a digital processing circuit which is connected to a plurality of antennas, arranged such as to form a sensor matrix, for detecting the presence, type and position of the communicating elements. Radio-frequency readers are respectively connected to m corresponding input/output terminals of the digital processing circuit. Each radio-frequency reader is connected to an associated group of antennas, preferably by means of a corresponding multiplexer. The game board may consist of a removable assembly of basic boards, each comprising a basic digital processing circuit which is connected to the antennas of the corresponding basic board.

The invention is a portable gait analyzer comprising of at least one independent rear foot motion collection unit, at least one independent lower shank motion collection unit, plantar pressure collection unit, at least one processing and display unit, and a soft casing unit. A plurality of accelerometers, rate sensors, force sensor resistors, and pressure sensors provide for the acquisition of acceleration signals, angular velocity signals, foot force signals, and foot pressure signals to be processed. At least one central processing unit, a plurality of memory components, input/output components and ports, telemetry components, calibration components, liquid crystal displays components for the processing and outputting of three dimensional acceleration, angular velocity, tilt, and position. The rearfoot motion collection unit and lower shank motion collection unit interact with the processing and display unit to calculate rear foot kinematic data crucial to identify the motions of pronation and supination. The plantar pressure collection unit interacts with the processing and display unit to calculate plantar pressure data crucial to identify the center of pressure line and excessive and abnormal loads on the sole of the foot. These factors of rear-foot kinematics and plantar pressure lead to gait style identification.

A system and a method that uses a software application operable under a current firmware/operating system configuration to install a new firmware version without “compromising” the operating system are presented. The software application may configure a computer system to install a plurality of software fixes configured to enhance functionality under a new firmware/operating system environment after the firmware has been successfully upgraded. Such functionality enhancements may be associated with external peripherals, as well as, input/output circuit cards, processors, and the like. In addition, the software application may configure the computing device to “boot” under the new firmware/operating system environment upon subsequent system initializations. Furthermore, the software application permits the distribution of firmware upgrades via a network. The capability to install firmware remotely permits a system administrator to “push” the new firmware to a plurality of network coupled computing devices, thus avoiding manual intervention at each device.

A circuit and method are provided for controlling the gate voltage of a transistor acting between local and global input/output lines of a memory device, the circuit including a local input/output line, a local from/to global input/output multiplexer in signal communication with the local input/output line, a global input/output line in signal communication with the local from/to global input/output multiplexer, and a local from/to global input/output controller having an input node and an output node, the input node disposed for receiving a signal indicative of an input or output operation, and the output node in signal communication with a gate of the local from/to global input/output multiplexer for providing a gate signal of a first or second level in the presence of the output operation, and a gate signal of a third level in the presence of the input operation.

An integrated circuit device may include a pair of first and second input/output lines on a substrate and a precharge circuit connected to the first and second input/output lines. More particularly, portions of the first and second input/output lines may extend in a parallel direction along first lengths thereof, portions of the first and second input/output lines may cross one another in a twist region so that portions of the first and second input/output lines in the twist region extend in directions different than the parallel direction, and portions of the first and second input/output lines may extend in the parallel direction along second lengths. Accordingly, relative positions of the first and second input/output lines may be reversed in the first and second lengths thereof. In addition, the precharge circuit may be connected to portions of the first and second input/output lines in the twist region extending in the directions different than the parallel direction, and the precharge circuit may be configured to provide that the first and second input/output lines have a same electrical potential responsive to an enable signal. Related memory devices are also discussed.

A method to achieve a very low effective dielectric constant in high performance back end of the line chip interconnect wiring and the resulting multilayer structure are disclosed. The process involves fabricating the multilayer interconnect wiring structure by methods and materials currently known in the state of the art of semiconductor processing; removing the intralevel dielectric between the adjacent metal features by a suitable etching process; applying a thin passivation coating over the exposed etched structure; annealing the etched structure to remove plasma damage; laminating an insulating cover layer to the top surface of the passivated metal features; optionally depositing an insulating environmental barrier layer on top of the cover layer; etching vias in the environmental barrier layer, cover layer and the thin passivation layer for terminal pad contacts; and completing the device by fabricating terminal input/output pads. The method obviates issues such as processability and thermal stability associated with low dielectric constant materials by avoiding their use. Since air, which has the lowest dielectric constant, is used as the intralevel dielectric the structure created by this method would possess a very low capacitance and hence fast propagation speeds. Such structure is ideally suitable for high density interconnects required in high performance microelectronic device chips.

A payment validation network having network of payment validation cells, each of which includes: one or more local qualifier systems for assessing the risk of loss in accepting a check; a service finder for identifying the scope of coverage provided by each of the local qualifier systems and for identifying the scope of coverage provided by other cells; and one or more input/output (I/O) sources for obtaining transaction data associated with a check at a point of presentment. The request servicer interfaces with the I/O sources, service finder and the qualifier systems in order to (i) receive transaction data from an I/O source in connection with the check, including the routing/transit number, (ii) maintain a user profile for the I/O source, (iii) consult the service finder to identify which local qualifier systems cover the routing/transit (R/T) number associated with the check, (iv) transmit a payment validation request to the identified local qualifier systems and at least one other remote request servicer in accordance with the user profile, (v) receive one or more validation results from local qualifier systems or remote request servicers, and (vi) process said results to provide a homogeneous validation assessment to the requesting I/O source.

A system for processing semiconductor substrates includes a front-end with at least two vertical levels of input/output ports for transferring substrate cassettes into or out of the housing of the processing system. The front-end also includes at least one level of storage positions, e.g., two levels of storage positions, which can be disposed between the two vertical levels of the input/output ports. The two vertical levels of storage positions can each be provided with two storage positions and each of two levels of input/output ports can be provided with accommodations for two cassettes, allowing for a total of eight cassettes to be accommodated at the front-end of the processing system. Inside the housing of the processing system, interior storage positions can be provided adjacent a wafer handling chamber and spaced apart from a cassette store having rotary platforms for housing cassettes. A single cassette handler can be used to access cassettes at each of the input/output ports and the interior storage positions.