3897 results about "Input/output" patented technology

The invention provides a data all-flash storage optimization method and system based on cloud computing, and the method comprises the steps: receiving a storage operation request stream of a user terminal through collecting a multi-dimensional performance data set of each node of an all-flash storage cluster in real time, wherein the multi-dimensional performance data set comprises a storage space fragmentation rate, an input / output request queue depth and a network link bandwidth utilization rate; analyzing a to-be-stored data block identifier set and an operation mode label, traversing a historical access record library based on to-be-stored data block identifiers, extracting historical access time sequence characteristics and physical storage position proximity of associated data blocks, and combining the multi-dimensional performance data and the historical access time sequence characteristics to obtain a data block identifier set; according to the method, a dynamic access popularity prediction model in a preset time period is constructed, and finally, a cross-node fragmentation storage topological graph and a cache preloading strategy matrix are generated according to the proximity of the dynamic access popularity prediction model and a physical storage position, so that the optimization of all-flash storage is realized, and the data storage performance in a cloud computing environment is improved.

A method and system are arranged for fact checking electronically posted claims. The system includes an input / output device for inputting a textual complex claim as a natural language statement with a combination of two or more facts and outputting an indication that the textual complex claim is true or false. A processor connected to the input / output device generates, by a program generation module, a reasoning program for the input complex claim as a sequence of reasoning steps, where each step directs to a function in a set of sub-task functions. The processor generates, by a program execution module, each step in the reasoning program to a respective sub-task function and executes the respective sub-task function in order to provide the outputted indication.

A value chain network control tower system comprises a processor and memory configured to execute a know your model system that manages the complete lifecycle of Al models in enterprise environments. The know your model system performs model intake and registration actions including model documentation collection, registration procedures, metadata collection, input / output interface standardization, legal and licensing validation checks, and security validation. The system conducts comprehensive model evaluation and risk assessment actions by analyzing foundational properties, task performance, safety and risk management, alignment and compliance characteristics, operational metrics, and tooling transparency capabilities. The know your model system executes model deployment actions through automated environment validation, predeployment approval processes, and controlled production deployment with continuous monitoring.

The invention relates to the technical field of data storage, can be applied to business scenes such as medical health and financial science and technology, and discloses a multi-Pool storage resource adaptive writing method which comprises the following steps: monitoring available storage space, read-write input / output rate, average response time and data access frequency of each Pool; dynamically adjusting the current write-in weight of the Pool according to the monitoring result; converting the current write-in weights of all Pool into probability values, and constructing a discrete probability distribution table; selecting a target Pool through a pseudo-random number generator according to the probability distribution table; and writing the to-be-stored data into the target Pool. According to the method, the running state of each Pool is continuously monitored, and the writing weight is adjusted in real time, so that the problem of resource allocation rigidity under a fixed weight strategy is avoided; in combination with a discrete probability distribution table constructed based on normalized weight and a pseudo-random selection mechanism, selection of the target Pool has certain load balancing elasticity, and data can be more effectively guided to be written into the Pool with light load and excellent performance.

The invention discloses a GPU (Graphics Processing Unit) and parallel IO (Input / Output) collaborative optimization method based on mode heterogeneous computing, and particularly relates to the field of heterogeneous computing optimizing.The method comprises the following steps: monitoring mode characteristics during execution of a target computing task in real time through an instruction analyzer, and synchronously collecting dynamic parameters of a heterogeneous computing environment to generate a multi-dimensional resource situation matrix; based on the mode and the resource situation matrix, collaborative optimization operation of the binding equipment dimension and the scheduling time dimension is executed; and constructing a three-level adaptive transmission mechanism and periodically implementing feedback optimization according to an execution state of the three-level adaptive transmission mechanism. According to the GPU and parallel IO collaborative optimization method based on mode heterogeneous computing, the data prefetching hit rate is increased by dynamically sensing the matching relation between a heterogeneous computing mode and an I / O access mode; end-to-end delay is reduced and task contention conflicts are reduced through a dynamic matching strategy of an equipment capability portrait and a task type; and the heterogeneous storage bandwidth peak value utilization rate and the I / O throughput are improved by differentially utilizing the hierarchical characteristics of the multi-stage storage.

A method includes receiving a machine learning (ML) network model in high-level code; generating an internal representation (IR), the IR is mapped to components in a multi-processing tile device; determining whether a first processing tile with a first on-chip memory (OCM) has a same dimension for an input / output tensor data as a second processing tile with a second OCM performing a same primitive function based on the IR; allocating a same memory address range within the first and the second OCM for the same primitive function if the first processing tile has the same dimension for the input / output tensor data as the second processing tile for the same primitive function; linking the memory address range of the first OCM to the memory address range of the second OCM to form a grouped memory space within the first and the second OCM respectively; and compiling low-level instructions based on the linking.

A system (100) for securing cloud-based large language models through cyber threat defense and compliance monitoring, comprising: (a) an access control and authentication module configured to authenticate users and applications using role-based access control (RBAC) and multi-factor authentication (MFA); (b) a data protection and encryption module configured to encrypt data in transit and at rest and to anonymize sensitive input / output data using cryptographic techniques; (c) a threat detection and behavior monitoring module employing machine learning algorithms to identify anomalies and detect potential cyber threats in real time;(d) a regulatory compliance monitoring module configured to continuously assess system operations against applicable regulatory frameworks and generate alerts in the event of deviations from the regulations; (e) an incident response and mitigation module configured to automatically execute predefined response actions upon detection of threats or regulatory violations; (f) a logging, auditing, and forensic analysis module configured to securely log system activities, interactions, and threat events with cryptographic integrity protection; and (g) a governance and policy management module configured to define, update, and enforce organizational AI usage and compliance policies via the cloud-based LLM infrastructure.

A computer-implemented method comprises transitioning from a unidirectional asynchronous replication to initiating bi-directional synchronous replication between one or more storage objects of a first consistency group (CG1) of a primary storage site and one or more storage objects of a second consistency group (CG2) of a secondary storage site, converting the one or more storage objects of the CG2 from data protection read only access to read write access, and performing a reverse synchronization process between the one or more storage objects of the CG2 and the one or more storage objects of the CG1 including instantiating a reverse splitter on each volume of CG2, establishing reverse sync replication sessions for each storage object of the CG2, and allowing input output (IO) access to the one or more storage objects of the CG2.

A method of scheduling input / output operations for a storage system including determining a deadline for a storage operation, wherein the deadline is dependent on an expected latency of the storage operation; adding the storage operation to a queue of storage operations; and reordering the queue dependent upon the deadline of the storage operation and one or more deadlines of one or more storage operations in the queue of storage operations.

The invention relates to the technical field of storage control, in particular to a memory control method, which comprises the following steps: acquiring a target logic address in response to a reading request from a host system; determining a data access mode associated with the target logic address in real time based on the historical access information, wherein the data access mode at least comprises a continuous mode, a random mode and a hotspot mode; according to the determined data access mode, triggering a data prefetching strategy and a flash translation layer query strategy matched with the access mode; obtaining target data from a memory module based on a data prefetching strategy and a flash translation layer query strategy; and scheduling the cache resources and the input / output bandwidth according to a predetermined resource management strategy, and returning the target data to the host system. The prefetching accuracy and the cache utilization rate are improved.

A system and method for using a semi-polling model to monitor a Non-Volatile Memory Express (NVMe) completion queue (CQ). The method, implemented at an interrupt thread, includes receiving an input / output (I / O) request from an application and submitting a submission queue (SQ) entry into an NVMe SQ in response to the I / O request. The method further includes registering for notifications from a polling thread after submitting the SQ entry and receiving, from the polling thread, a notification of the presence of a CQ entry within an NVMe CQ. Additionally, the method involves removing the CQ entry from the NVMe CQ and notifying the application of completion of the I / O request.

A computer system and method are disclosed for replicating logs in a distributed environment. The method includes identifying a write input / output (I / O) operation and identifying a log to be replicated based on the write I / O operation. The log is then persisted to local non-volatile memory in the computer system. Subsequently, the log is replicated to multiple remote hosts, where each remote host of the plurality of remote hosts stores the log in its corresponding local non-volatile memory without de-staging the log to a backing store. The write I / O operation is committed once the log is replicated to at least a subset of the remote hosts that forms a quorum. Finally, the log is de-staged to the backing store after the write I / O operation is successfully committed.

The invention discloses a hydraulic power plant automatic debugging system with a self-adaptive communication function. The system comprises a processing unit, a storage unit, a communication module, an input / output interface, a task classification module, a model architecture configuration module and other functional modules. The use method comprises the following steps: analyzing task complexity and high-dimensional features of input data through a task classification module, and grading by adopting algorithms such as principal component analysis and a support vector machine; the model architecture configuration module is used for matching a model architecture according to the complexity level and determining an initial calculation path; the dynamic path adjustment module optimizes a calculation path in combination with real-time data, and the resource distribution module redistributes resources when the calculation power exceeds the limit; the model compression module generates a compression model adaptive to the edge device through pruning and quantization algorithms; the parameter fine tuning module is used for jointly optimizing model parameters for a multi-task scene; according to the method, the adaptability and efficiency bottleneck of an existing debugging tool in a complex scene is effectively solved, and the intelligent debugging level of an automatic system of a hydraulic power plant is improved.

A system to perform high speed passive serial configuration of an FPGA is disclosed. The system includes an MCU that includes an interface, an FPGA coupled to the MCU over the interface, and a flash memory coupled to the MCU and to the FPGA over the interface. The flash memory includes MCU firmware for the MCU and FPGA configuration data for the FPGA. To perform passive serial configuration of the FPGA, the MCU is operable to at least: configure the flash memory to an input / output (IO) mode, place the FPGA in a configuration mode, send a read command over the interface to the flash memory for the FPGA configuration data, and continuously provide a clock signal over the interface to the flash memory until the FPGA configuration data is entirely read.

The invention provides a controllable SCADA (supervisory control and data acquisition) industrial production control platform based on an industrial internet architecture. The controllable SCADA industrial production control platform comprises a field layer, an edge layer, a communication layer, a cloud / fog computing layer and a data management layer, wherein the field layer is composed of a sensor array, an execution mechanism, a PLC controller and an RTU terminal; the sensor array comprises a temperature sensor, a pressure sensor, a flow sensor and a position sensor, and adopts 4-20mA current loop signal output; the execution mechanism comprises an electric valve, a servo motor and a variable frequency driver, and communicates with the PLC through a Modbus RTU protocol; the PLC controller is provided with a dual-core processor and is provided with 16 digital quantity input / output channels and 8 analog quantity input channels; the RTU terminal is internally provided with a LoRa wireless communication module; the edge layer comprises an edge computing node and a protocol conversion gateway; the edge computing node is provided with an FPGA coprocessor and supports an edge reasoning framework; and multi-protocol conversion is realized through the protocol conversion gateway.

The invention discloses a coupling iterative algorithm library and a reactor multi-physical field coupling calculation program construction method. The coupling iterative algorithm library comprises an open source library layer used for integrating a plurality of numerical calculation libraries and providing an input / output interface for a reactor multi-physics field coupling framework and each numerical calculation library; the core algorithm layer is used for integrating a plurality of coupling iteration algorithms and a plurality of acceleration algorithms related to each coupling iteration algorithm; the interface layer is used for providing a data interaction interface between a nuclear reactor multi-physics field coupling calculation program and the core algorithm layer; and the iterative algorithm template layer is used for forming an iterative solution process control template function based on the open source library layer, the core algorithm layer and the interface layer, and the iterative solution process control template function is used for constructing a nuclear reactor multi-physics field coupling calculation program based on the process control parameters set in the input file. According to the coupling iterative algorithm library, the development efficiency and the development quality of a nuclear reactor multi-physics field coupling calculation program can be improved.

Disclosed are a method and apparatus for identifying peripheral configuration of server, a method and apparatus for laying out peripheral silkscreen, and a server. The method includes: determining a PCIE external interface of each central processing unit on the basis of configuration requirement information of a server to be identified; determining, in sequence according to a level state of each peripheral ID signal transmitted by each PCIE external interface, a peripheral type that is capable of being configured for a peripheral bandwidth corresponding to the peripheral ID signal, allocating corresponding serial numbers to peripherals of different peripheral types, generating a peripheral silkscreen including all peripheral sequences managed by the server to be identified; sending the peripheral silkscreen to a basic input output system and / or a baseboard management controller, and allowing the basic input output system and / or the baseboard management controller to unify respective default silkscreen into the peripheral silkscreen.

The invention provides a signal exception processing method and system, a server and a storage medium, and relates to the field of servers, the method is applied to the signal exception processing system, the signal exception processing system comprises a substrate management controller and a hardware extension module, and the hardware extension module is used for performing function extension on a central processing unit and a universal input and output interface. Wherein the substrate management controller does not immediately respond to the signal sent by the hardware extension module, but can firstly take the signal as a to-be-detected signal, and detect the signal according to a preset signal parameter to determine whether the signal form is abnormal or not. And if the to-be-detected signal is determined to be abnormal, in order to distinguish whether the to-be-detected signal is a normal signal, the substrate management controller can also actively acquire a register value corresponding to the signal from the hardware extension module, and determines whether to respond to the to-be-detected signal according to whether the logic meaning of the to-be-detected signal is consistent with the logic meaning of the register value. In this way, signal abnormity can be actively detected, and error response can be avoided.

The invention relates to the technical field of distributed computing and computing power scheduling, in particular to a computing power resource fusion method based on a distributed flow pipeline, which comprises the following steps of: disassembling a user computing power request into a flow pipeline unit for packaging computing logic, an input / output interface and a resource demand label; meanwhile, computing power types, real-time load rates, memory occupancy rates, network round-trip delays, geographic positioning and energy consumption data of cloud edge end nodes are collected, a hierarchical topology network framework is constructed based on the collected data, node computing power available values are calculated, an inter-node transmission cost matrix is generated, a fault probability prediction model is constructed, and a fault probability prediction model is constructed. And finally, analyzing a data dependency relationship of the pipeline unit through a four-dimensional joint decision engine, executing dynamic mapping, and preferentially mapping the high-computing-power demand unit to a GPU cluster node, so as to realize non-interruption reconstruction during pipeline topology operation. And the global computing power resource utilization rate, the task operation efficiency and the service stability are improved.

A method of calibrating a pump system can include providing a pump, calibrating a pump input with an input device connected to the pump, and calibrating a pump output with an output device connected to the pump. Calibrating the pump input can include selecting a first input signal value, generating a transmitted input signal corresponding to the first input signal value, and setting a nominative pump input value to the first input signal value. Calibrating the pump output can include receiving a received output signal outputted from the pump, and setting a nominative pump output value to the first input signal value.

The invention relates to the technical field of torque converters, in particular to a hydrodynamic transmission power chain optimization method and system.The method comprises the steps that a hydrodynamic torque converter parameterized geometric model is built, and a pump impeller blade outflow angle, a guide wheel runner input / output angle, turbine blade geometric parameters and the relative position of a pump impeller and a turbine are set as design variables; based on CFD three-dimensional flow field simulation, a k-epsilon model is adopted for rapid analysis, an SST model is adopted for transient simulation, and simulation data under different variable combinations are obtained; training a BP neural network by using the simulation data, inputting each design variable, and constructing a multi-target optimization model with maximization of efficiency and minimization of noise as targets; a design variable combination is selected in the Pareto optimal solution set, a model is reconstructed, and an optimized hydraulic torque converter is obtained; according to the method, the problems that the design optimization efficiency of the hydraulic torque converter is low, the parameter adjusting period is long, and good compromise between the transmission efficiency and noise suppression is difficult to obtain can be solved.

In some examples, a system monitors input / output (I / O) operations to identify data matching a honeypot pattern. The system determines storage location information associated with the data identified as matching the honeypot pattern, and detects an access of the data at a storage location indicated by the storage location information. The system indicates a potential attack based on detecting the access of the data at the storage location indicated by the storage location information.

Aspects of embodiments pertain to a method for determining an Input / Output (I / O) device configuration for a music teaching system. The method may comprise receiving a plurality of I / O device configurations of a music teaching system; receiving, for a given I / O device of the music teaching system, an initial I / O device configuration; and determining an updated I / O device configuration for the given I / O Device, based on the initial I / O device configuration of the given I / O Device and at least one of the plurality of received I / O device configurations. The determining is performed such that the updated I / O device configuration has improved device performance compared to the initial I / O device configuration.

Examples include techniques to utilize near memory compute circuitry for memory-bound workloads. Examples include the near memory compute circuitry being resident on an input / output (I / O) arranged to couple with a plurality of memory devices configured as a memory pool that is accessible to a host central processing unit (CPU) through the I / O switch. The near memory compute circuitry may receive a request to obtain data from the memory pool and generate a result that is made available to the host CPU to facilitate acceleration of a memory-bound workload.

Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for compressing data. The method includes determining a plurality of access levels of a plurality of storage areas in a storage space based on a plurality of input / output (IO) counts of the plurality of storage areas in a historical time period. The method further includes determining an access level threshold based on the utilization of the storage space. The method further includes selecting at least one target storage area among the plurality of storage areas based on the plurality of access levels and the access level threshold. The method further includes compressing a plurality of pages in the at least one target storage area. Embodiments of the present disclosure provide a strategy of merging and compression based on a system state, which balances data compression efficiency and system performance.

The invention relates to the technical field of computer hardware and network communication, in particular to a high-speed I / O (input / output) virtualization server based on an FPGA (field programmable gate array) and a remote forwarding method.The high-speed I / O virtualization server comprises an FPGA chip, a network processing unit, an I / O protocol processing unit, a protocol conversion and scheduling unit, a time sequence and transaction management unit and a data buffering and flow control unit are integrated in the FPGA chip; the optical fiber Ethernet interface module comprises a physical layer interface and an MAC layer processing and network configuration interface; the local I / O interface module comprises a USB interface circuit, a serial port interface circuit, a PCIe interface circuit and an interface expansion connector; the power supply and monitoring module comprises a multi-path power supply management system, a state monitoring and diagnosis system and an LED indication system; according to the self-adaptive Baud rate detection circuit, the Baud rate can be accurately locked under the condition that data with less than two characters is received, the number of data bits, the type of a check bit and the length of a stop bit are automatically identified, and compared with a traditional microcontroller scheme, the self-adaptive Baud rate detection circuit has higher precision and higher detection speed.

A system includes a neural network architecture. It a new type of neural network able to process statically mapped as well as temporally sequenced information with much better power utilization, data requirements and operational efficiencies. Unlike prior artificial neural network approaches, the present invention includes uniquely defined sets of relationships. The unique use of non-linear input-output mapping functions combined with a time-variant pilot function, and a deterministically bounded, fully-differentiable, nonlinear resonance field subsystem allows the present invention to be readily deployed to work with virtually any neural network architecture / implementation including photonic, opto-acoustic or other variants. This dramatically reduces the size and complexity of virtually any neural network architecture because it offloads what would otherwise need to be done in the form of back / forward propagation trained weights and biases to much simpler, more scalable differentiable input / output mapping functions.

A first power profile for servicing a first type of workload is provided to a particular storage device. An input / output (I / O) request for a second type of workload is received. A second power profile for servicing the second type of workload that is different than the first power profile is provided to the particular storage device. The I / O request is transmitted to the particular storage device, wherein the particular storage device is to service the I / O request using the second power profile.

Examples include techniques to implement confidential computing with a remote device via use of trust domains. Examples are described of establishing secure communication sessions between a trust domain supported by a hardware processor core on a first host platform and an input / output (I / O) device resident on a second host platform.