2735 results about "Input/output" patented technology

A value chain network control tower system comprises a processor and memory configured to execute a know your model system that manages the complete lifecycle of Al models in enterprise environments. The know your model system performs model intake and registration actions including model documentation collection, registration procedures, metadata collection, input / output interface standardization, legal and licensing validation checks, and security validation. The system conducts comprehensive model evaluation and risk assessment actions by analyzing foundational properties, task performance, safety and risk management, alignment and compliance characteristics, operational metrics, and tooling transparency capabilities. The know your model system executes model deployment actions through automated environment validation, predeployment approval processes, and controlled production deployment with continuous monitoring.

The invention relates to the technical field of storage control, in particular to a memory control method, which comprises the following steps: acquiring a target logic address in response to a reading request from a host system; determining a data access mode associated with the target logic address in real time based on the historical access information, wherein the data access mode at least comprises a continuous mode, a random mode and a hotspot mode; according to the determined data access mode, triggering a data prefetching strategy and a flash translation layer query strategy matched with the access mode; obtaining target data from a memory module based on a data prefetching strategy and a flash translation layer query strategy; and scheduling the cache resources and the input / output bandwidth according to a predetermined resource management strategy, and returning the target data to the host system. The prefetching accuracy and the cache utilization rate are improved.

The invention discloses a coupling iterative algorithm library and a reactor multi-physical field coupling calculation program construction method. The coupling iterative algorithm library comprises an open source library layer used for integrating a plurality of numerical calculation libraries and providing an input / output interface for a reactor multi-physics field coupling framework and each numerical calculation library; the core algorithm layer is used for integrating a plurality of coupling iteration algorithms and a plurality of acceleration algorithms related to each coupling iteration algorithm; the interface layer is used for providing a data interaction interface between a nuclear reactor multi-physics field coupling calculation program and the core algorithm layer; and the iterative algorithm template layer is used for forming an iterative solution process control template function based on the open source library layer, the core algorithm layer and the interface layer, and the iterative solution process control template function is used for constructing a nuclear reactor multi-physics field coupling calculation program based on the process control parameters set in the input file. According to the coupling iterative algorithm library, the development efficiency and the development quality of a nuclear reactor multi-physics field coupling calculation program can be improved.

The invention relates to the technical field of distributed computing and computing power scheduling, in particular to a computing power resource fusion method based on a distributed flow pipeline, which comprises the following steps of: disassembling a user computing power request into a flow pipeline unit for packaging computing logic, an input / output interface and a resource demand label; meanwhile, computing power types, real-time load rates, memory occupancy rates, network round-trip delays, geographic positioning and energy consumption data of cloud edge end nodes are collected, a hierarchical topology network framework is constructed based on the collected data, node computing power available values are calculated, an inter-node transmission cost matrix is generated, a fault probability prediction model is constructed, and a fault probability prediction model is constructed. And finally, analyzing a data dependency relationship of the pipeline unit through a four-dimensional joint decision engine, executing dynamic mapping, and preferentially mapping the high-computing-power demand unit to a GPU cluster node, so as to realize non-interruption reconstruction during pipeline topology operation. And the global computing power resource utilization rate, the task operation efficiency and the service stability are improved.

The invention relates to the technical field of torque converters, in particular to a hydrodynamic transmission power chain optimization method and system.The method comprises the steps that a hydrodynamic torque converter parameterized geometric model is built, and a pump impeller blade outflow angle, a guide wheel runner input / output angle, turbine blade geometric parameters and the relative position of a pump impeller and a turbine are set as design variables; based on CFD three-dimensional flow field simulation, a k-epsilon model is adopted for rapid analysis, an SST model is adopted for transient simulation, and simulation data under different variable combinations are obtained; training a BP neural network by using the simulation data, inputting each design variable, and constructing a multi-target optimization model with maximization of efficiency and minimization of noise as targets; a design variable combination is selected in the Pareto optimal solution set, a model is reconstructed, and an optimized hydraulic torque converter is obtained; according to the method, the problems that the design optimization efficiency of the hydraulic torque converter is low, the parameter adjusting period is long, and good compromise between the transmission efficiency and noise suppression is difficult to obtain can be solved.

In some examples, a system monitors input / output (I / O) operations to identify data matching a honeypot pattern. The system determines storage location information associated with the data identified as matching the honeypot pattern, and detects an access of the data at a storage location indicated by the storage location information. The system indicates a potential attack based on detecting the access of the data at the storage location indicated by the storage location information.

Aspects of embodiments pertain to a method for determining an Input / Output (I / O) device configuration for a music teaching system. The method may comprise receiving a plurality of I / O device configurations of a music teaching system; receiving, for a given I / O device of the music teaching system, an initial I / O device configuration; and determining an updated I / O device configuration for the given I / O Device, based on the initial I / O device configuration of the given I / O Device and at least one of the plurality of received I / O device configurations. The determining is performed such that the updated I / O device configuration has improved device performance compared to the initial I / O device configuration.

The invention relates to the technical field of computer hardware and network communication, in particular to a high-speed I / O (input / output) virtualization server based on an FPGA (field programmable gate array) and a remote forwarding method.The high-speed I / O virtualization server comprises an FPGA chip, a network processing unit, an I / O protocol processing unit, a protocol conversion and scheduling unit, a time sequence and transaction management unit and a data buffering and flow control unit are integrated in the FPGA chip; the optical fiber Ethernet interface module comprises a physical layer interface and an MAC layer processing and network configuration interface; the local I / O interface module comprises a USB interface circuit, a serial port interface circuit, a PCIe interface circuit and an interface expansion connector; the power supply and monitoring module comprises a multi-path power supply management system, a state monitoring and diagnosis system and an LED indication system; according to the self-adaptive Baud rate detection circuit, the Baud rate can be accurately locked under the condition that data with less than two characters is received, the number of data bits, the type of a check bit and the length of a stop bit are automatically identified, and compared with a traditional microcontroller scheme, the self-adaptive Baud rate detection circuit has higher precision and higher detection speed.

To provide a development support system allowing users to freely create nodes and edges on a workspace, the development support system allowing selection of a large-scale language model for every prompt node, and enabling prompt provision (transmission) and acquisition of output results on a per-node basis.SOLUTION: A development support system 1 includes a workspace creation unit and a large-scale language model input / output unit, where a prompt node created on the workspace includes a large-scale language model selection field, a prompt reception field, and an output result display field for displaying an output to a prompt. Each prompt node also enables provision of prompts to the large-scale language model and acquisition of results, and the prompt node displays the output results.SELECTED DRAWING: Figure 1

The present disclosure provides a computer-implemented system for automated augmentation of differential equation models. The system stores differential equations representing mechanistic behavior of physical or computational processes and constructs a hybrid computational solver by embedding a trainable universal approximator with adjustable parameters into the differential equations, where approximator outputs augment time derivatives during numerical integration. An iterative training process adjusts parameters through numerical integration, monitors integration failures, assigns infinite penalty values to loss functions when failures occur, and computes gradients using automatic differentiation otherwise. The system computes sensitivity metrics via Jacobian matrix evaluation, classifies input / output subsets as significant based on threshold-exceeding sensitivity metrics, generates a reduced approximator operating on classified subsets, and replaces the universal approximator with the reduced version to create an optimized solver.

A method includes performing a gradient descent mutation of a current generation of prompts by an evolutionary algorithm framework engine. The gradient descent mutation includes sending a prompt to a large language model (LLM) with an evaluation input-output pair and instructing the LLM to generate a modification recommendation for the prompt. The prompt is modified according to the modification recommendation. The modified prompt is processed by the LLM with the evaluation input output pair, causing the LLM to generate a response matching the output of the evaluation input-output pair. The modified prompt is added to a next generation of prompts.

The invention discloses an automatic batch interface connection method, which relates to the technical field of interface connection, and comprises the following steps: S1, confirming an input / output port; s2, parameterizing macro definition; s3, a connection code is generated; s4, generating interfaces in batches; and S5, carrying out batch connection. According to the method, automatic generation of batch interface connections is achieved through parameterized macro definition, the requirement for manual coding is reduced, the risk of human errors is reduced, the efficiency of the verification process is improved, a designer only needs to specify macro parameters in the configuration file, a large number of different interface connections can be rapidly configured, complex connection codes do not need to be written, and the method is convenient and fast to operate. The reusability of codes is enhanced through parameterized macro definition, the same macro definition can be repeatedly used in different items or different verification platforms, high flexibility is provided through the parameterized macro definition, interface connection is supported to be rapidly modified and adapted, and the large-scale integrated circuit design method and device can adapt to various complex scenes in the large-scale integrated circuit design process.

In an implementation, a memory subsystem may include input / output (I / O) circuitry having a data signal (DQ) group, the DQ group having multiple DQ lanes and a read data strobe, and one or more controllers coupled to the I / O circuitry, the one or more controllers being configured to assign, respectively to multiple DQ lanes of the DQ group, multiple read test delays that monotonically increase with respect to a read eye edge, read a read test value one time, using the DQ group, with the multiple read test delays respectively for each DQ lane in the DQ group, and update the read eye edge by adding a first read test delay, corresponding to a first DQ lane of the DQ lanes from the read test value that does not match a read eye training pattern, to the read eye edge to calculate a trained read eye edge.

The invention discloses a flash memory switching starting method, system and device, electronic equipment and a medium, and relates to the technical field of servers, and the method comprises the steps of obtaining address information in a memory in response to completion of power-on initialization of a controller; historical starting information is determined according to the mapping relation between the address information and the flash memories, and the historical starting information comprises at least one of non-starting, first flash memory starting and second flash memory starting; determining a target flash memory corresponding to the address information based on the historical startup information; the target flash memory is used for starting the basic input / output system, so that the technical problem that firmware of the basic input / output system is started from the faulty flash memory at first and then switched to the non-faulty flash memory after the controller receives the switching mark every time when the basic input / output system is started is solved, and the aim of preventing the firmware from being started from the faulty flash memory every time when the basic input / output system is started is achieved. And the starting time is reduced.

Various systems and methods are presented regarding a threat analysis and risk assessment (TARA) system for implementation during design of a device, such as a software-defined vehicle. The system can be implemented across a manufacturing organization and combines knowledge from a range of entities, e.g., software programmers, hardware designers, network designers, and suchlike. Items and assets can be utilized to define respective features of components, e.g., defining software functionality, electronic control unit (ECU) configuration, a communication network connecting one or more ECUs and various signal inputs / outputs, etc. By representing components / features as items and assets, knowledge regarding potential / actual threats (e.g., cybersecurity attack(s)) can be respectively applied, damage scenarios and mitigation identified, threat risks assessed and reduced, with the whole system iteratively updated in response to newly derived configurations and knowledge regarding component of interest. Respective entities can apply their knowledge to supplement knowledge across the system, enabling interaction from multiple sources.

The present disclosure belongs to the technical field of storage chip designs. Disclosed are a memory module and an electronic device. The memory module includes at least two memory expander controller (MXC) chips, a peripheral component Interconnect express (PCIe) golden finger, a multichannel input / output (MCIO) connector, and a dual inline memory module (DIMM), wherein the MXC chips are connected to the DIMM through a double data rate 5 (DDR5) synchronous dynamic random access memory (DRAM) interface controller port, a compute express link (CXL) port of at least one of the MXC chips interacts with an external device through the PCIe golden finger, and the CXL port of at least one of the MXC chips interacts with the external device through the MCIO connector. The present disclosure may improve the memory capacity of the memory module.

The invention provides an automatic testing device for an electrical interface of hardware equipment, which comprises a core control unit, an AT32F415CBT7 single chip microcomputer, an RS232 serial port testing interface and an RS485 serial port testing interface, the test unit comprises eight paths of optical coupling isolation switching value input / output interfaces, a test module power supply input interface, a 24V power supply input interface of equipment to be tested, a state indication LED module and a vacancy detection module which are respectively used for host communication and equipment test, and a travel switch is adopted to detect the occupation state of the test unit, wherein the 24V power supply input interface of the equipment to be tested is powered by an ejector pin. According to the invention, the efficiency and accuracy of hardware equipment interface function testing can be improved, the labor cost is reduced, and batch detection requirements are met.

The invention relates to the technical field of electronic systems of spacecrafts, and discloses a fault-tolerant method for non-redundant fault reconstruction of a spaceborne computer, which comprises the following steps of: 1, accessing a hardware state manager by a BIOS (Basic Input / Output System) after the system is started; obtaining health state data recording the health state of the local storage device, a current starting target ID used for indicating a current starting target, and a retry count value associated with the current starting target ID; a BIOS (Basic Input Output System) accesses a hardware state manager to obtain health state data and a retry count value of local storage equipment, so that normal equipment is autonomously selected for starting, and the fault-tolerant effect of dynamically avoiding a fault starting path is achieved; compared with the technical scheme in the prior art that the computer starting process highly depends on a solidified single physical storage device, the single-point fault risk of permanent paralysis of the computing system caused by damage of the single storage device is solved.

The invention discloses a large model gateway security protection system and a security protection method, and relates to the field of large model information security protection, and the system comprises the following steps: a gateway input and output module carries out compliance verification on a user request, sends a non-compliance request to a blocking isolation module, and inputs a compliance request to a called large model; the filtering and cleaning module is used for screening the original response content generated by the large model in real time; the classification and grading module identifies and marks the cleaned response content and determines a classification and grading result; the authority control module is used for verifying the access authority of the requesting user; the data desensitization module is used for desensitizing the sensitive fields according to the classification and grading result of the classification and grading module and the user permission; the desensitization data is output to a target application system through the gateway input and output module; and the blocking and isolating module is used for blocking and isolating the non-compliance requests, the high-proportion non-compliance responses and the requests corresponding to the high-risk behaviors, and has a multi-dimensional safety protection capability.

The invention discloses a memory management method, device and equipment and a computer readable storage medium. The method comprises the following steps: when a mapping request exists, determining a target I / O virtual address corresponding to the mapping request and triggering an application identity identifier of the mapping request; detecting whether the target I / O virtual address is associated with the application identity label or not; and if yes, establishing mapping between the target I / O virtual address and the corresponding memory physical address. According to the method and the device, the memory protection capability of the equipment can be enhanced on a system without IOMMU (Input / Output Management Unit); and the complexity of hardware design can be reduced on a system with an IOMMU, and the hardware cost is reduced.

The invention discloses a basic input and output system firmware upgrading method and electronic equipment, and relates to the technical field of servers, and the method comprises the following steps: obtaining current configuration data of basic input and output system firmware, and carrying out structured conversion on the current configuration data to obtain a first configuration file; obtaining upgrading configuration data of standard upgrading firmware of the basic input and output system to obtain a second configuration file; comparing the configuration parameter of the first configuration file with the configuration parameter of the second configuration file, and determining a difference configuration item; and processing the difference configuration item according to the difference processing rule to obtain a target configuration file, and upgrading the firmware of the basic input / output system according to the target configuration file, thereby solving the technical problem of firmware upgrading compatibility in related technologies, and achieving the purposes of reserving user configuration as much as possible and improving the user experience. The method has the advantages that upgrading failure or starting failure caused by configuration conflicts is avoided, firmware upgrading is efficiently completed, and the accuracy rate and the automation rate are increased.

The embodiment of the invention discloses an internal memory, a chip and related electronic equipment. A target computing unit of the internal memory comprises a plurality of groups of primary multipliers, a plurality of adder trees and a plurality of secondary multipliers, one group of first-level multipliers is connected with one second-level multiplier through one adder tree; the group of first-level multipliers comprises a plurality of pairs of first multipliers, and each adder tree comprises a first adder, a second adder and a third adder; each pair of first multipliers respectively receive data to perform multiplication operation, and respectively input output results into the first adder to perform addition operation; each second adder receives the output results of the plurality of first adders or the second adder at the upper level to carry out addition operation, and respectively inputs the output results to the second adder at the lower level or the third adder; and each third adder receives the output results of the plurality of second adders to carry out addition operation, and inputs the output results to the secondary multiplier to carry out multiplication operation. By implementing the embodiment of the invention, the memory computing capability can be improved.

The invention discloses a POL power supply automatic test method based on modular design, and belongs to the technical field of power supply test. The method comprises the following steps: firstly, under the control of an upper computer, automatically reading POL power supply basic parameters including key characteristic parameters such as input / output voltage, rated current and frequency from a preset Excel table, and establishing a judgment reference for testing; then, instrument initialization is completed, communication connection with test equipment such as an oscilloscope, an electronic load and a direct-current power supply is established, and configuration of initialization function parameters is completed; then, executing a measurement task of each core parameter of the POL power supply to be tested, and in the test process, executing a parallel measurement management mechanism, namely configuring each instrument parameter and channel state in real time according to a specific test item, and triggering a retry or interrupt logic under the conditions of communication abnormality, data timeout and the like until the test recovers a running state; and finally, after the test is completed, performing Excel storage and interaction on the standardized test data and the waveform screenshot, and finally safely exiting. According to the POL power supply automatic test method based on the modular design, the whole test process is divided into a plurality of serial or parallel function processing units such as parameter reading, instrument initialization, test execution and test management, data storage and interaction and the like, and high efficiency and usability of a test system are achieved.

Adaptive system probe action to minimize input / output dirty data transfers is described. In one or more implementations, a system includes a processor, a memory configured to store data, and a cache configured to store a portion of the data stored in the memory for execution by the processor. The system also includes a cache coherence controller including a cache line history. The cache coherence controller is configured detect a direct memory access request from an input / output device. The direct memory access request is associated with an input / output operation involving the data. The cache coherence controller is further configured to identify a cache line associated with the direct memory access request, and, in response to the cache line history including a dirty data transfer record corresponding to the cache line, selectively send a probe to the cache based on a state of the cache line.

Various systems and methods are presented regarding a threat analysis and risk assessment (TARA) system for implementation during design of a device, such as a software-defined vehicle. The system can be implemented across a manufacturing organization and combines knowledge from a range of entities, e.g., software programmers, hardware designers, network designers, and suchlike. Items and assets can be utilized to define respective features of components, e.g., defining software functionality, electronic control unit (ECU) configuration, a communication network connecting one or more ECUs and various signal inputs / outputs, etc. By representing components / features as items and assets, knowledge regarding potential / actual threats (e.g., cybersecurity attack(s)) can be respectively applied, damage scenarios and mitigation identified, threat risks assessed and reduced, with the whole system iteratively updated in response to newly derived configurations and knowledge regarding component of interest. Respective entities can apply their knowledge to supplement knowledge across the system, enabling interaction from multiple sources.

The invention discloses a virtual machine memory processing method and device, a product, a virtualization server and a medium, and relates to the field of server virtualization. In the method, through a virtual input and output rear-end module arranged on a virtual machine monitor in a host and a virtual input and output front-end module on a virtual machine, it is ensured that the virtual input and output rear-end module can obtain information of a memory allocation event of direct memory access; secondly, after acquiring the information of the memory allocation event of the direct memory access, the virtual input / output rear-end module locks the address related to the memory allocation event, namely, the locked address meets the direct memory access requirement, and the memory of the virtual machine is dynamically locked, so that the memory utilization rate is improved, and the waste of resources is reduced; and only part of the memory of the virtual machine is locked, and only the locked memory part is migrated after the host is replaced, so that the amount of data to be migrated after the host is replaced is reduced.

An embodiment of an integrated circuit may comprise memory to store respective resource control descriptors in correspondence with respective identifiers, and an input / output (IO) memory management unit (IOMMU) communicatively coupled to the memory, the IOMMU including circuitry to determine resource control information for an IO transaction based on a resource control descriptor stored in the memory that corresponds to an identifier associated with the IO transaction, and control utilization of one or more resources of the IOMMU based on the determined resource control information. Other embodiments are disclosed and claimed.

Various systems and methods are presented regarding a threat analysis and risk assessment (TARA) system for implementation during design of a device, such as a software-defined vehicle. The system can be implemented across a manufacturing organization and combines knowledge from a range of entities, e.g., software programmers, hardware designers, network designers, and suchlike. Items and assets can be utilized to define respective features of components, e.g., defining software functionality, electronic control unit (ECU) configuration, a communication network connecting one or more ECUs and various signal inputs / outputs, etc. By representing components / features as items and assets, knowledge regarding potential / actual threats (e.g., cybersecurity attack(s)) can be respectively applied, damage scenarios and mitigation identified, threat risks assessed and reduced, with the whole system iteratively updated in response to newly derived configurations and knowledge regarding component of interest. Respective entities can apply their knowledge to supplement knowledge across the system, enabling interaction from multiple sources.

The invention discloses an optical computing system, a data processing method, a product, equipment and a medium, and relates to the technical field of optical computation.The method comprises the steps that two input and output modules and an optical computing module are arranged, a parameter matrix in the optical computing module is updated according to a to-be-processed feature matrix, and in each iteration, the parameter matrix of the optical computing module is updated; the optical signal modulated by the first input and output module is positively input to the optical calculation module and calculated with the parameter matrix, and the optical signal modulated by the second input and output module is reversely input to the optical calculation module and calculated with a transpose matrix of the parameter matrix, so that an output vector of current iteration is obtained; the key feature information of the feature matrix is determined according to the output vector obtained by the last iteration at the end of iteration, so that the problems of high processing complexity and low processing efficiency caused by processing data through electric calculation are solved, efficient calculation of the parameter matrix and the transpose matrix is completed through optical calculation, the processing complexity is reduced, and the processing efficiency is improved. And the treatment efficiency is improved.

The invention discloses a safety and disinfection integrated system based on AI analysis linkage control electromagnetic valves, and relates to the technical field of intelligent fire fighting, and the safety and disinfection integrated system comprises a flame detection camera, a network input and output module, a safety and disinfection integrated machine, an execution module and an acousto-optic alarm bell. According to the security and disinfection integrated system for linkage control of the electromagnetic valve based on AI analysis, the advanced AI visual recognition technology and an electromagnetic valve linkage control mechanism are deeply fused, the efficiency and the precision degree of fire safety management are greatly improved, flame characteristics are precisely recognized by means of a deep learning model, and the safety and disinfection effect is improved. The limitation that traditional fire behavior detection is easily influenced by environmental factors is broken through, the accuracy and reliability of fire behavior recognition are greatly enhanced, the system supports multi-modal data fusion, the confidence coefficient of fire behavior judgment is further improved, adjacent electromagnetic valves can be automatically started according to the position of a fire behavior in the linkage control link, an effective fire extinguishing isolation belt is constructed, and the fire extinguishing efficiency is improved. And fire spreading is effectively restrained.